• Journal of Power Electronics
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• v.19 no.6
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• pp.1413-1428
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• 2019

In this paper, a novel zero-voltage and zero-current switching (ZVZCS) interleaved two switch forward converter is proposed. By using a coupled-inductor-type smoothing filter, a snubber capacitor, the parallel capacitance of the leading switches and the transformer parasitic inductance, the proposed converter can realize soft-switching for the main power switches. This converter can effectively reduce the primary circulating current loss by using the coupled inductor and the snubber capacitor. Furthermore, this converter can reduce the reverse recovery loss, parasitic ringing and transient voltage stress in the secondary rectifier diodes caused by the leakage inductors of the transformer and the coupled inductance. The operation principle and steady state characteristics of the converter are analyzed according to the equivalent circuits in different operation modes. The practical effectiveness of the proposed converter was is illustrated by simulation and experimental results via a 500W, 100 kHz prototype using the power MOSFET.

• Journal of IKEEE
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• v.21 no.3
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• pp.219-226
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• 2017

This paper was studied the double-band monopole antenna design with Mu-negative metamaterial unit cell, which operates at 700MHz and 2.45GHz band. Mu-negative unit cell made of the interdigital capacitor structure to operate a double-band antenna by inserting it into an antenna radiator unit. In addition, the parasitic conductor is implemented on the back side of the antenna radiation part, so that the resonance point of the antenna can be controlled and the bandwidth is improved. Finally, we implemented an antenna operating in the 750MHz UHD band and the 2.45GHz WiFi band. The designed antenna has a size of $200{\times}100mm^2$. Experimental results show that the 8dB bandwidth and gain characteristics at 750MHz band are 320MHz(42.7%), 5.28dB, 6dB bandwidth and gain at 2.45GH are 540MHz (21.6%), -0.46dB. From the experimental results, we confirmed that the resonance point with theoretical value is in agreement with experimental value, and the radiation patterns are have the omnidirectional characteristic in both bands.

• Transactions on Electrical and Electronic Materials
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• v.17 no.3
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• pp.172-177
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• 2016

Miller feedback compensation is introduced in a low dropout regulator (LDO) in order to obtain a capacitor-free regulator and improve the fast transient response. The conventional LDO has a limited bandwidth because of the large-size output capacitor and parasitic gate capacitance in the power MOSFET. In order to obtain a stable frequency response without the output capacitor, LDO is designed with resistor-capacitor (R-C) compensation and this is achieved with a connection between the gain-stage and the power MOS. An R-C compensator is suggested to provide a pole and zero to improve the stability. The proposed LDO is designed with the 0.35 μm CMOS process. Simulation testing shows that the phase margin in the Bode plot indicates a stable response, which is over 100^o. In the load regulation, the transient time is within 55 μs when the load current changes from 0.1 to 1 mA.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.67 no.4
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• pp.538-542
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• 2018

In order to generate a clock source with low cost and high performance in system on chip(SoC), a relaxation oscillator with stable output characteristics according to PVT(process, voltage and temperature) fluctuation require a low area and a low power. In this paper, we propose a solution to reduce the current loss caused by parasitic components in the conventional relaxation oscillator. Since the slew rate of the bias current and the capacitor are adjusted to be the same through the proposed solution, a relaxation oscillator with low area characteristics is designed for the same clock source frequency implementation. The proposed circuit is designed using the TSMC CMOS 0.18um process. The Simulation results show that the relaxation oscillator using the proposed solution can prevent the current loss of about $279{\mu}A$ and reduce the total chip area by 20.8% compared with the conventional oscillator in the clock source frequency of 96 MHz.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.29 no.1
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• pp.94-102
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• 2015

The electronic ballast for HID lamps needs to ignite lamps even though the length from the ballast to lamp is far away. Therefore, it needs to do the research on a resonant ignition to turn on the HID lamps because the reduction of ignition voltage is not much depending on the distance. However, the parasitic capacitance is increased depending the length of the cable, and it affects the resonant frequency. The ignitor voltage can be increased drastically under the resonant ignition through frequency sweep, and it is the main reason of blowing up. Therefore, the clamping diode is proposed to suppress the voltage of the primary winding during resonant ignition.

• Journal of electromagnetic engineering and science
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• v.14 no.4
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• pp.376-381
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• 2014

We present a CMOS rail-to-rail class-AB amplifier using dynamic current biasing to improve the delay response of the error amplifier in a low-dropout (LDO) regulator, which is a building block for a wireless power transfer receiver. The response time of conventional error amplifiers deteriorates by slewing due to parasitic capacitance generated at the pass transistor of the LDO regulator. To enhance slewing, an error amplifier with dynamic current biasing was devised. The LDO regulator with the proposed error amplifier was fabricated in a $0.35-{\mu}m$ high-voltage BCDMOS process. We obtained an output voltage of 4 V with a range of input voltages between 4.7 V and 7 V and an output current of up to 212 mA. The settling time during line transient was measured as $9{\mu}s$ for an input variation of 4.7-6 V. In addition, an output capacitor of 100 pF was realized on chip integration.

• Journal of Power Electronics
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• v.9 no.1
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• pp.18-25
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• 2009

Conventional series-resonant pulse frequency modulation controlled DC-DC high power converters with a high-frequency transformer link which is designed for driving the high power microwave generator has the problem of hard switching commutation at turn-on and turn-off of active power switching devices. This problem is due to the influence of the magnetizing current of the high-frequency transformer. This paper presents a novel prototype for a high-frequency transformer using parasitic parameters with a lossless inductive snubber and a series resonant capacitor assisted series-resonant zero current switching pulse frequency modulated DC-DC power converter, which is designed using a high power magnetron for microwave ovens. In order to implement a complete and efficient soft switching commutation, the performance of the new converter topology is practically confirmed and evaluated in the prototype of a power microwave generator.

• The Transactions of the Korean Institute of Power Electronics
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• v.24 no.1
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• pp.56-61
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• 2019

In this study, a reduction method of leakage current in a three-level photovoltaic power-conditioning system (PCS) is proposed and verified by simulation and experiment. Leakage current generation is analyzed through an equivalent model of the common mode voltage considering a significant parasitic capacitance existing between the photovoltaic array and ground. A leakage current reduction method using pulse-width modulation (PWM) method is also proposed, and a 10-kW three-level photovoltaic PCS simulation and experiment is performed with a $1{\mu}F$ parasitic capacitor based on 100 nF/kW. The proposed method using the PWM method is verified to reduce the leakage current by 73% compared with the conventional PWM method.

• ETRI Journal
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• v.27 no.5
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• pp.628-634
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• 2005

From AC analysis results utilizing a 2-dimensional device simulator, we extracted an AC-equivalent circuit of a grounded-gate NMOS (ggNMOS) electrostatic discharge (ESD) protection device. The extracted equivalent circuit is utilized to analyze the effects of the parasitics in a ggNMOS protection device on the characteristics of a low noise amplifier (LNA). We have shown that the effects of the parasitics can appear exaggerated for an impedance matching aspect and that the noise contribution of the parasitic resistances cannot be counted if the ggNMOS protection device is modeled by a single capacitor, as in prior publications. We have confirmed that the major changes in the characteristics of an LNA when connecting an NMOS protection device at the input are reduction of the power gain and degradation of the noise performance. We have also shown that the performance degradation worsens as the substrate resistance is reduced, which could not be detected if a single capacitor model is used.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2002.05a
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• pp.288-292
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• 2002

We propose the new type of on-chip ESD protection method for RF applications. By using the properties of RF circuits, we can use the short-circuited stub as ESD protection device in front of the DC blocking capacitor Specially, we can use short-circuited stub as the portion of the matching circuit so to reduce the and various parameters of the transmission line. This new type ESD protection method is very different from the conventional ESD protection method. With the new type ESD protection method, we remove the parasitic capacitance of ESD protection device which degrade the performance of core circuit.