• Title/Summary/Keyword: Parallel-Machine Scheduling

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A Note on the Scheduling Problem in the Two-stage Assembly-type Flowshop (두단계 조립시스템에서의 일정계획문제에 관한 소고)

  • Yoon Sang-Hum;Kim Ho-Joon;Kwon Soo-Tae
    • Journal of Korean Society of Industrial and Systems Engineering
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    • v.27 no.2
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    • pp.24-28
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    • 2004
  • This paper considers a scheduling problem concerned with an assembly system where two components are first treated In their own parallel machines and then pulled to be assembled into a final product at a single assembly machine. The objective measure is the mean completion time of jobs(a finite number of products). Through characterizing solution properties, we obtain the worst case error bounds of an arbitrary permutation and a SPT based heuristic.

Scheduling Generation Model on Parallel Machines with Due Date and Setup Cost Based on Deep Learning (납기와 작업준비비용을 고려한 병렬기계에서 딥러닝 기반의 일정계획 생성 모델)

  • Yoo, Woosik;Seo, Juhyeok;Lee, Donghoon;Kim, Dahee;Kim, Kwanho
    • The Journal of Society for e-Business Studies
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    • v.24 no.3
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    • pp.99-110
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    • 2019
  • As the 4th industrial revolution progressing, manufacturers are trying to apply intelligent information technologies such as IoT(internet of things) and machine learning. In the semiconductor/LCD/tire manufacturing process, schedule plan that minimizes setup change and due date violation is very important in order to ensure efficient production. Therefore, in this paper, we suggest the deep learning based scheduling generation model minimizes setup change and due date violation in parallel machines. The proposed model learns patterns of minimizing setup change and due date violation depending on considered order using the amount of historical data. Therefore, the experiment results using three dataset depending on levels of the order list, the proposed model outperforms compared to priority rules.

Investment Scheduling of Maximizing Net Present Value of Dividend with Reinvestment Allowed

  • Sung, Chang-Sup;Song, Joo-Hyung;Yang, Woo-Suk
    • Proceedings of the Korean Operations and Management Science Society Conference
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    • 2005.05a
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    • pp.506-516
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    • 2005
  • This paper deals with an investment scheduling problem of maximizing net present value of dividend with reinvestment allowed, where each investment has certain capital requirement and generates deterministic profit. Such deterministic profit is calculated at completion of each investment and then allocated into two parts, including dividend and reinvestment, at each predetermined reinvestment time point. The objective is to make optimal scheduling of investments over a fixed planning horizon which maximizes total sum of the net present values of dividends subject to investment precedence relations and capital limit but with reinvestment allowed. In the analysis, the scheduling problem is transformed to a kind of parallel machine scheduling problem and formulated as an integer programming which is proven to be NP-complete. Thereupon, a depth-first branch-and-bound algorithm is derived. To test the effectiveness and efficiency of the derived algorithm, computational experiments are performed with some numerical instances. The experimental results show that the algorithm solves the problem relatively faster than the commercial software package (CPLEX 8.1), and optimally solves the instances with up to 30 investments within a reasonable time limit.

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Heuristics for Scheduling Wafer Lots at the Deposition Workstation in a Semiconductor Wafer Fab (반도체 웨이퍼 팹의 흡착공정에서 웨이퍼 로트들의 스케쥴링 알고리듬)

  • Choi, Seong-Woo;Lim, Tae-Kyu;Kim, Yeong-Dae
    • Journal of Korean Institute of Industrial Engineers
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    • v.36 no.2
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    • pp.125-137
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    • 2010
  • This study focuses on the problem of scheduling wafer lots of several product families in the deposition workstation in a semiconductor wafer fabrication facility. There are multiple identical parallel machines in the deposition workstation, and two types of setups, record-dependent setup and family setup, may be required at the deposition machines. A record-dependent setup is needed to find optimal operational conditions for a wafer lot on a machine, and a family setup is needed between processings of different families. We suggest two-phase heuristic algorithms in which a priority-rule-based scheduling algorithm is used to generate an initial schedule in the first phase and the schedule is improved in the second phase. Results of computational tests on randomly generated test problems show that the suggested algorithms outperform a scheduling method used in a real manufacturing system in terms of the sum of weighted flowtimes of the wafer lots.

A Scheduling Scheme for Restricted Parallel Machines with Cycling Process (반복 공정을 가지는 제약적 병렬기계에서의 일정 계획 수립)

  • Ko, Hyo-Heon;Baek, Jong-Kwan;Kang, Yong-Ha;Kim, Sung-Shick
    • Journal of Korean Institute of Industrial Engineers
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    • v.30 no.2
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    • pp.107-119
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    • 2004
  • A study on the following parallel machine problem is addressed in this research. An order is completed only when a given number of processes (cycle) are repeated. Anew cycle is possible only upon the completion of the previous cycle. Orders are classified into job group according to product feature. For a machine to switch to a different job group from the currently processing one a major setup is required while a minor setup time is inserted in between two jobs of the same job group. The objective of the study is to find a schedule that minimizes total weighted tardiness. An initial solution is obtained by the RATCS(Restricted Apparent Tardiness Cost with Setup) rule, and a Tabu search is applied to improve the solution. Numerical examples are also presented.

Implementation of Optimizing Compiler for Bus-based VLIW Processors (버스기반의 VLIW형 프로세서를 위한 최적화 컴파일러 구현)

  • Hong, Seung-Pyo;Moon, Soo-Mook
    • Journal of KIISE:Computer Systems and Theory
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    • v.27 no.4
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    • pp.401-407
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    • 2000
  • Modern microprocessors exploit instruction-level parallel processing to increase the performance. Especially VLIW processors supported by the parallelizing compiler are used more and more in specific applications such as high-end DSP and graphic processing. Bus-based VLIW architecture was proposed for these specific applications and it was designed to reduce the overhead of forwarding unit and the instruction width. In this paper, a optimizing scheduling compiler developed for the proposed bus-based VLIW processor is introduced. First, the method to model interconnections between buses and resource usage patterns is described. Then, on the basis of the modeling, machine-dependent optimization techniques such as bus-to-register promotion, copy coalescing and operand substitution were implemented. Optimization techniques for general-purpose VLIW microprocessors such as selective scheduling and enhanced pipelining scheduling(EPS) were also implemented. The experiment result shows about 20% performance gain for multimedia application benchmarks.

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Speedup Analysis Model for High Speed Network based Distributed Parallel Systems (고속 네트웍 기반의 분산병렬시스템에서의 성능 향상 분석 모델)

  • 김화성
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.26 no.12C
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    • pp.218-224
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    • 2001
  • The objective of Distributed Parallel Computing is to solve the computationally intensive problems, which have several types of parallelism, on a suite of high performance and parallel machines in a manner that best utilizes the capabilities of each machine. In this paper, we propose a computational model including the generalized graph representation method of distributed parallel systems for speedup analysis, and analyze how the super-linear speedup is achieved when scheduling of programs with diverse embedded parallelism modes onto a distributed heterogeneous supercomputing network environment. The proposed representation method can also be applied to simple homogeneous or heterogeneous systems whose components are heterogeneous only in terms of the processor speed. In order to obtain the core speedup, the matching of the parallelism characteristics between tasks and parallel machines should be carefully handled while minimizing the communication overhead.

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A Genetic Algorithm for the Parallel-Machine Total Weighted Tardiness Problem (병렬기계에서 납기지연 가중 합을 최소화하기 위한 유전 알고리듬)

  • Park, Moon-Won
    • Journal of Korean Institute of Industrial Engineers
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    • v.26 no.2
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    • pp.183-192
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    • 2000
  • This paper considers the problem of scheduling a set of n jobs on m parallel machines to minimize total weighted tardiness. For the problem a genetic algorithm is proposed, in which solutions are encoded using the random key method suggested by Bean and new crossover operators are employed to increase performance of the algorithm. The algorithm is compared with the Modified Due-Date (MDD) algorithm after series of tests to find appropriate values for genetic parameters. Results of computational tests on randomly generated test problems show that the suggested algorithm performs better than the MDD algorithm and gives good solutions in a reasonable amount of computation time.

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Study on Dispatching for Quality and Productivity with estimated completion time (품질과 생산성을 위한 작업완료시간 예측을 통한 작업투입방법)

  • Ko, Hyo-Heon;Baek, Jong-Kwan
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.11 no.3
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    • pp.1095-1100
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    • 2010
  • Customer satisfaction is a main issue in the modern competitive industrial environment. So quality and productivity are the most important requisites. This paper presents a method for effective real time dispatching for parallel machines with multi product that minimizes mean tardiness and maximizes the quality of the product. In this paper, the effectiveness of the method has been examined in the simulation and compared with other dispatching methods. Using this method presented in this paper, companies can improve customer satisfaction.

Lot Planning & Scheduling in the Integrated Steelmaking Process

  • Park Hyungwoo;Hong Yushin
    • Proceedings of the Korean Operations and Management Science Society Conference
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    • 2002.05a
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    • pp.109-113
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    • 2002
  • Steel industry is the most capital intensive and the largest energy consuming industry, which operate huge and complex facilities to supply various steel products as the primary materials to almost every manufacturing industry Major steel products are hot-rolled and cold-rolled coils, plates, and wires that are produced through molten iron making, molten steel making, casting, and rolling. Each process runs in batch between setups and the specifications or bach are different with each other High energy consuming and heavy material handling require careful synchronization or processes, as well. Considering the synchronization or processes, the lot planning and scheduling problem in the integrated steelmaking process rovers the roll grouping with given casts. the sequencing or rolls over time, and the machine assignment and time scheduling or charges and casts. The problem is investigated by dividing it into two cases whether single or parallel machines at the molten steel making and the continuous casting processes. Problem descriptions and solution approaches or each instance are introduced. To test their performance and conformity, implementation or the algorithms and numerical experiments are carried out with real world and constructed data sets.

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