• KSII Transactions on Internet and Information Systems (TIIS)
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• 제10권9호
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• pp.4467-4486
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• 2016

Discrete cosine transform (DCT) based JPEG standard significantly improves the coding efficiency of image compression, but it is unacceptable event in serious blocking artifacts at low bit rate and low efficiency of high-definition image. In the light of all phase digital filtering theory, this paper proposes a novel transform based on discrete sine transform (DST), which is called all phase discrete sine biorthogonal transform (APDSBT). Applying APDSBT to JPEG scheme, the blocking artifacts are reduced significantly. The reconstructed image of APDSBT-JPEG is better than that of DCT-JPEG in terms of objective quality and subjective effect. For improving the efficiency of JPEG coding, the structure of JPEG is analyzed. We analyze key factors in design and evaluation of JPEG compression on the massive parallel graphics processing units (GPUs) using the compute unified device architecture (CUDA) programming model. Experimental results show that the maximum speedup ratio of parallel algorithm of APDSBT-JPEG can reach more than 100 times with a very low version GPU. Some new parallel strategies are illustrated in this paper for improving the performance of parallel algorithm. With the optimal strategy, the efficiency can be improved over 10%.

• KSII Transactions on Internet and Information Systems (TIIS)
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• 제11권3호
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• pp.1684-1699
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• 2017

The deblocking filter (DF) reduces blocking artifacts in encoded video sequences, and thereby significantly improves the subjective and objective quality of videos. Statistics show that the DF accounts for 5-18% of the total decoding time in high-efficiency video coding. Therefore, speeding up the DF will improve codec performance, especially for the decoder. In view of the rapid development of multicore technology, we propose a parallel DF scheme based on a modified order of accessing the coding tree units (CTUs) by analyzing the data dependencies between adjacent CTUs. This enables the DF to run in parallel, providing accelerated performance and more flexibility in the degree of parallelism, as well as finer parallel granularity. We additionally solve the problems of variable privatization and thread synchronization in the parallelization of the DF. Finally, the DF module is parallelized based on the HM16.1 reference software using OpenMP technology. The acceleration performance is experimentally tested under various numbers of cores, and the results show that the proposed scheme is very effective at speeding up the DF.

• Journal of applied mathematics & informatics
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• 제3권1호
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• pp.35-46
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• 1996

This paper suggests a new coding method for the parallel machine which compresses the data be reducing redundancy. Paral-lel Dynamic octal Compact Mapping (PDOCM) compresses at least 1 byte per word compared with other coding techniques and achieves a 54. 188-fold speedup with 64 processors to transmit 10 million charac-ters.

• IEIE Transactions on Smart Processing and Computing
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• 제6권4호
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• pp.292-298
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• 2017

The complexity of image compression algorithms has increased in order to improve image compression efficiency. One way to resolve high computational complexity is parallel processing. However, entropy coding, which is lossless compression, does not fit into the parallel processing form because of the correlation between consecutive symbols. This paper proposes a new application-specific instruction set processor (ASIP) platform by adding new context-adaptive binary arithmetic coding (CABAC) instructions to the existing platform to quickly process a variety of entropy coding. The newly added instructions work without conflicts with all other existing instructions of the platform, providing the flexibility to handle many coding standards with fast processing speeds. CABAC software is implemented for High Efficiency Video Coding (HEVC) and the performance of the proposed ASIP platform was verified with a field programmable gate array simulation.

• 대한전자공학회논문지
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• 제23권3호
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• pp.309-316
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• 1986

A concatenated coding system using a binary code as the inner code and a nonbinary code as the outer code has been constructed for the purpose of error correction. The complexity of a conventional coding system grows exponentially as the code length of a block code becomes longer. To reduce the complexity for ling code, an effective communication system has been proposed by cascading two codes-binary and norbinary codes. Using a parallel-to-serial circuit and a serial-to-parallel circuit, the concatenated coding system has been designed and constructed by empolying a (7,3) burst error correcting code as the inner code and a (7,3) Reed-Solomon code as the outer code. This system has been simulated and tested using a micro-computer. For the (49,9) concatenated coding system, the error probability of the channel has been evaluated and compared to different coding systems.

• 한국통신학회논문지
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• 제17권12호
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• pp.1484-1493
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• 1992

본 논문에서는 필터와 LCTV를 사용하여 광논리 게이트의 편광부호화를 제안하고, 올림수 지연시간을 개선하는 광병렬 가산기의 실시간 시스템을 제시한다. 셀의 편광부호화를 위하여 편광필터를 제작하고, 광병렬가산기 시스템에 필요한 광플립플롭 대신에 사용할 전기적인 시스템을 제작했다. 또, 광병렬가산기 시스템에 디코딩마스트 역할과 상호연결 역할을 동시에 할 수 있도록 광섬유를 사용했다. 실험결과에 의해 셀의 편광 부호화는 16가지 광논리함수를 표현할 수 있고, 광병렬 가산기는 실시간에 동작할 수 있음을 보였다.

• Journal of applied mathematics & informatics
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• 제3권2호
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• pp.157-168
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• 1996

This paper describes an efficient coding method for Ko-rean characters (alphabet) using a three-state transition graph. Par-allel hangul Dynamic Coding Method (PHDCM) compresses about 3.5 bits per Korean character compared with other coding techinques. When we ran the method on a MasPar machine it achieved a 49.314-fold speedup with 64 processors having 10 million orean characters

• IEIE Transactions on Smart Processing and Computing
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• 제4권6호
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• pp.434-442
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• 2015

In this paper, we propose an integrated spatial and view scalable video codec based on high efficiency video coding (HEVC). The proposed video codec is developed based on similarity and uniqueness between the scalable extension and 3D multi-view extension of HEVC. To improve compression efficiency using the proposed scalable multi-view video codec, inter-layer and inter-view predictions are jointly employed by using high-level syntaxes that are defined to identify view and layer information. For the inter-view and inter-layer predictions, a decoded picture buffer (DPB) management algorithm is also proposed. The inter-view and inter-layer motion predictions are integrated into a consolidated prediction by harmonizing with the temporal motion prediction of HEVC. We found that the proposed scalable multi-view codec achieves bitrate reduction of 36.1%, 31.6% and 15.8% on the top of ${\times}2$, ${\times}1.5$ parallel scalable codec and parallel multi-view codec, respectively.

• 방송공학회논문지
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• 제22권3호
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• pp.401-404
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• 2017

360 VR 영상은 등장방형 또는 정육면체, 정십이면체 등의 입체 도형의 전개도 형태의 포맷을 가진다. 이러한 포맷들은 각각 다른 특성을 가지고 있지만, 공통적으로 해상도가 일반 2D 영상에 비해 높다는 공통점을 가지고 있다. 따라서 부호화/복호화를 할 때 시간이 많이 걸리며, 병렬 처리가 필수적으로 요구된다. 최신 2D 비디오 코덱인 HEVC에는 병렬화 기술로 Wavefront Parallel Processing(WPP) 기술이 표준으로 적용되어 있는데, 이 기술은 2D 영상을 고려하여 만들어진 기술으로 3D 영상에서 사용했을 때 최적의 성능을 보이지 않는다. 따라서, WPP를 3D 영상에 적절한 방법이 필요하며 본 논문에서는 큐브맵 포맷에서 개선된 WPP 부호화/복호화 방법을 제안한다. 실험은 HEVC 참조 소프트웨어인 HM 12.0에 적용하였고, 실험 결과 기존 WPP와 비교하여 PSNR에는 큰 손실이 없으며 15%~20% 정도의 부호화 복잡도가 추가로 감소했다. 제안하는 방법은 향후 3D VR 영상을 위한 코덱에 필수적으로 포함될 것으로 기대된다.

• 전자공학회논문지B
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• 제30B권10호
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• pp.1-12
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• 1993

A multiprocessor system for high-speed processing of hybrid image coding algorithms such as H.261, MPEG, or Digital HDTV is presented in this study. Using a combination of highly parallel 32-bit microprocessor, DCT(Discrete Cosine Transform), and motion detection processor, a new processing module is designed for the implementation of high performance coding system. The sysyem is implemented to allow parallel processing since a single module alone cannot perform hybrid coding algorithms at high speed, and crossbar switch is used to realize various parallel processing architectures by altering interconnections between processing modules within the system.