• Journal of the Korean Institute of Telematics and Electronics B
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• v.28B no.9
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• pp.703-711
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• 1991

In this paper, an efficient storage reclamation algorithm for RISC parallel processing in the object orented programming environments is presented. The memory management for the dynamic memory allocation and the frequent memory access in object oriented programming is the main factor that decreases RISC parallel processing performance. The proposed algorithm can be efficiently allocated the memory space of RISCy computer which is required the frequent memory access, so it can be increased RISC parallel processing performance. The proposed algorithm is verified the efficiency by implementing C language on SUN SPARC(4.3 BSD UNIX).

• Bulletin of the Korean Mathematical Society
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• v.53 no.3
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• pp.853-874
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• 2016

Based on a particular overlapping domain decomposition technique, a parallel finite element discretization algorithm for the generalized Stokes equations is proposed and investigated. In this algorithm, each processor computes a local approximate solution in its own subdomain by solving a global problem on a mesh that is fine around its own subdomain and coarse elsewhere, and hence avoids communication with other processors in the process of computations. This algorithm has low communication complexity. It only requires the application of an existing sequential solver on the global meshes associated with each subdomain, and hence can reuse existing sequential software. Numerical results are given to demonstrate the effectiveness of the parallel algorithm.

• Journal of the Optical Society of Korea
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• v.19 no.1
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• pp.45-54
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• 2015

In this study, a novel parallel wavefront correction system architecture is proposed, and a model-based tabu search (MBTS) algorithm is introduced for this new system to compensate wavefront aberration caused by atmospheric turbulence in a free-space optical (FSO) communication system. The algorithm flowchart is presented, and a simple hypothetical design for the parallel correction system with multiple adaptive optical (AO) subsystems is given. The simulated performance of MBTS for an AO-FSO system is analyzed. The results indicate that the proposed algorithm offers better performance in wavefront aberration compensation, coupling efficiency, and convergence speed than a stochastic parallel gradient descent (SPGD) algorithm.

• Journal of the Korea Safety Management & Science
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• v.13 no.3
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• pp.107-114
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• 2011

Traveling salesman problem is to minimize the total cost for a traveling salesman who wants to make a tour given finite number of cities along with the cost of travel between each pair them, visiting each cities exactly once before returning home. Traveling salesman problem is known to be NP-hard, and it needs a lot of computing time to get the optimal solution, so that heuristics are more frequently developed than optimal algorithms. This study suggests a hybrid parallel genetic algorithm(HPGA) for traveling salesman problem The suggested algorithm combines parallel genetic algorithm, nearest neighbor search, and 2-opt. The suggested algorithm has been tested on 7 problems in TSPLIB and compared the results of existing methods(heuristics, meta-heuristics, hybrid, and parallel). Experimental results shows that HPGA could obtain good solution in total travel distance minimization.

• Journal of the Korea Society of Computer and Information
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• v.17 no.1
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• pp.171-181
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• 2012

This paper defines the AES password algorithm used as a symmetric-key-based password algorithm, and proposes the design of parallel password algorithm to utilize the resources of multi-core processor as much as possible. The proposed parallel password algorithm was confirmed for parallel execution of password computation by allocating the password algorithm according to the number of cores, and about 30% of performance increase compared to AES password algorithm. The encryption/decryption performance of the password algorithm was confirmed through binary comparative analysis tool, which confirmed that the binary results were the same for AES password algorithm and proposed parallel password algorithm, and the decrypted binary were also the same. The parallel password algorithm for multi-core environment proposed in this paper can be applied to authentication/payment of financial service in PC, laptop, server, and mobile environment, and can be utilized in the area that required high-speed encryption operation of large-sized data.

• Journal of KIISE:Computer Systems and Theory
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• v.30 no.3_4
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• pp.117-129
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• 2003

In this paper, we propose advanced parallel join algorithm to efficiently process join operation on hypercube systems. This algorithm uses a broadcasting method in processing relation R which is compatible with hypercube structure. Hence, we can present optimized parallel join algorithm for that hypercube structure. The proposed algorithm has a complete solution of two essential problems - load balancing problem and data skew problem - in parallelization of join operation. In order to solve these problems, we made good use of the characteristics of clustering effect in the algorithm. As a result of this, performance is improved on the whole system than existing algorithms. Moreover. new algorithm has an advantage that can implement non-equijoin operation easily which is difficult to be implemented in hash based algorithm. Finally, according to the cost model analysis. this algorithm showed better performance than existing parallel join algorithms.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.32 no.10
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• pp.38-45
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• 2004

In this paper, a parallel visualization algorithm is proposed for efficient visualization of the massive data generated from large-scale parallel finite element analysis through investigating the characteristics of parallel rendering methods. The proposed parallel visualization algorithm is designed to be highly compatible with the characteristics of domain-wise computation in parallel finite element analysis by using the sort-last-sparse approach. In the proposed algorithm, the binary tree communication pattern is utilized to reduce the network communication time in image composition routine. Several benchmarking tests are carried out by using the developed in-house software, and the performance of the proposed algorithm is investigated.

• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.4
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• pp.477-483
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• 2015

The k-Winners-Take-All (kWTA) is an operation to find the largest k (>1) inputs among N inputs. Parallel search algorithm of kWTA for digital inputs is not invented yet, so most of digital kWTA architectures have O(N) time complexity. A parallel search algorithm for digital kWTA operation and the circuits for its VLSI implementation are presented in this paper. The proposed kWTA architecture can compare all inputs simultaneously in parallel. The time complexity of the new architecture is O(logN), so that it is scalable to a large number of digital data. The high-speed kWTA operation and its O(logN) dependency of the new architecture are verified by simulations. It takes 290 ns in searching for 5 winners among 1024 of 32 bit data, which is more than thousands of times faster than existing digital kWTA circuits, as well as existing analog kWTA circuits.

• Journal of information and communication convergence engineering
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• v.11 no.4
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• pp.298-306
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• 2013

The scale invariant feature transform (SIFT) is an effective algorithm used in object recognition, panorama stitching, and image matching. However, due to its complexity, real-time processing is difficult to achieve with current software approaches. The increasing availability of parallel computers makes parallelizing these tasks an attractive approach. This paper proposes a novel parallel approach for SIFT algorithm implementation using a block filtering technique in a Gaussian convolution process on the SIMD Pixel Processor. This implementation fully exposes the available parallelism of the SIFT algorithm process and exploits the processing and input/output capabilities of the processor, which results in a system that can perform real-time image and video compression. We apply this implementation to images and measure the effectiveness of such an approach. Experimental simulation results indicate that the proposed method is capable of real-time applications, and the result of our parallel approach is outstanding in terms of the processing performance.

• The Transactions of the Korean Institute of Power Electronics
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• v.22 no.1
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• pp.9-17
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• 2017

A parallel control algorithm of thyristor dual-converter power system for the DC power supply of railway is proposed. The circulating current and current imbalance generated during parallel operation can be limited to control the output voltage of each power system by using the proposed parallel control algorithm. The proposed control algorithm can also eliminate output current sensor to achieve the same output response without additional costs. The validity of the proposed algorithm is verified through simulation and experiment.