• Proceedings of the KIEE Conference
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• 2008.07a
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• pp.303-304
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• 2008

For the state estimation problem, the weighted least squares (WLS) method and the fast decoupled method are widely used at present. However, these algorithms can converge to local optimal solutions. Recently, modern heuristic optimization methods such as Particle Swarm Optimization (PSO) have been introduced to overcome the disadvantage of the classical optimization problem. However, heuristic optimization methods based on populations require a lengthy computing time to find an optimal solution. In this paper, we used PSO to search for the optimal solution of state estimation in power systems. To overcome the shortcoming of heuristic optimization methods, we proposed parallel processing of the PSO algorithm based on the PC cluster system. the proposed approach was tested with the IEEE-118 bus systems. From the simulation results, we found that the parallel PSO based on the PC cluster system can be applicable for power system state estimation.

• Journal of the Korean Operations Research and Management Science Society
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• v.30 no.1
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• pp.27-41
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• 2005

This paper considers identical parallel machine scheduling problem. Each job has a processing time. due date. weight and family type. If a different type of job is followed by prior job. a family setup is incurred. A two phased heuristic is presented for minimizing the sum of weighted tardiness. In the first phase. using roiling horizon technique. group each job into same family and schedule each family. In the second phase. assign each job to machines using schedule obtained in the first phase. Extensive computational experiments and comparisons among other algorithms are carried out to show the efficiency of the proposed algorithm.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2002.10a
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• pp.576-579
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• 2002

This paper presents the jacobian analysis of new type Casing Oscillator using the inverse kinematics, and to search for it's singularities through the jacobian analysis. All parallel manipulator have some singularities in workspace or it's outside workspace. Singularities were cleared by many other study of parallel manipulator f3r that reason recent publication of device control. In this paper defined that singularities of new file of Casing Oscillator and, to show it's graph. Finally this paper will be used for a practical example for construction spot, aviation simulator, vehicles simulator, military equipment etc.

• Proceedings of the KIEE Conference
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• 1996.11a
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• pp.137-140
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• 1996

This paper proposes a unit commitment scheduling method based on Parallel Genetic Algorithm(PGA). Due to a variety of constraints to be satisfied, such as the minimum up and down time constraints, the search space of the UC problem is highly nonconvex. So, we used transputer which is one of the practical parallel processors. It can give us fastness and effectiveness features of the proposed method for solving the problem. To show the effectiveness of the PGA based unit commitment scheduling, we tested results for system of 5 units and we can get desirable results.

• Journal of Korean Society of Industrial and Systems Engineering
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• v.23 no.56
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• pp.9-18
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• 2000

This paper considers the problem of two-machine, M-parallel flow shop scheduling to minimize makespan, and proposes a series of heuristic algorithms and a branch and bound algorithm. Two processing times of each job at two machines on each line are identical on any line. Since each flow-shop line consists of two machines, Johnson's sequence is optimal for each flow-shop line. Heuristic algorithms are developed in this paper by combining a "list scheduling" method and a "local search with global evaluation" method. Numerical experiments show that the proposed heuristics can efficiently give optimal or near-optimal schedules with high accuracy. with high accuracy.

• Journal of the Korea Safety Management & Science
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• v.25 no.2
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• pp.1-8
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• 2023

This paper is proposing a novel machine scheduling model for the unrelated parallel machine scheduling problem without setup times to minimize the total completion time, also known as "makespan". This problem is a NP-complete problem, and to date, most approaches for real-life situations are based on the operator's experience or simple heuristics. The new model based on the Memetic Algorithm, which was proposed by P. Moscato in 1989, is a hybrid algorithm that includes genetic algorithm and local search optimization. The new model is tested on randomly generated datasets, and is compared to optimal solution, and four scheduling models; three rule-based heuristic algorithms, and a genetic algorithm based scheduling model from literature; the test results show that the new model performed better than scheduling models from literature.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 1997.10a
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• pp.25-30
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• 1997

Genetic Algorithm(GA) is a parallel, global search technique modeled with the Darwinian principle of survival and reproduction of the fittest. Since Holland has proposed GA called the Simple GA, considerable research has focused of improving Simple GA performance. In this paper, I describe some methods of GA's modeling in different field.

• Journal of Advanced Navigation Technology
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• v.12 no.2
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• pp.146-153
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• 2008

Due to the extremely short pulse in the Ultra-Wideband (UWB) technology, the accurate synchronization acquisition method is very important for both high data-rate WPAN and low data-rate WPAN. In this paper, we propose the synchronization acquisition algorithm based on two-step signal search method to acquire the synchronization in the UWB multi-path channel. At the first step, the search window is divided by two and the window that has higher power is chosen as a next search window. This operation is repeated until the measure power of the search window is smaller than the threshold value. At the second step, we employ Linear Search algorithm to the search window obtained at the first step for fine search. The proposed algorithm is proved that the synchronization acquisition is faster than the parallel search algorithm and it shows good performance in environment of the SNR extreme changes by the simulation.

• Journal of KIISE:Databases
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• v.32 no.5
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• pp.558-566
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• 2005

The XML is the new standard fir data representation and exchange on the Internet. In this paper, we describe a new approach for evaluating a path-oriented query against XML document. In our approach, we propose the Parallel Match Indexing Fabric to speed up evaluation of path-oriented query using path signature and design the parallel match algorithm to perform a match process between a path signature of input query and path signatures of elements stored in the database. To construct a structure of the parallel match indexing, we first make the binary tie for all path signatures on an XML document and then which trie is transformed to the Parallel Match Indexing Fabric. Also we use the Parallel Match Indexing Fabric and a parallel match algorithm for executing a search operation of a path-oriented query. In our proposed approach, Time complexity of the algorithm is proportional to the logarithm of the number of path signatures in the XML document.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.12
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• pp.110-119
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• 1996

A novel high speed VLSI architecture and its VLSI realization methodologies for a motion estimation processor based on full search block matching algorithm are presentd. The presented architecture is designed in order to be suitable for highly parallel and pipelined processing with identical PE's and adjustable in performance and hardware amount according to various application areas. Also, the throughput is maximized by enhancing PE utilization up to 100% and the chip pin count is reduced by reusing image data with embedded image memories. Also, the uniform and identical data processing structure of PE's eases VLSI implementation and the clock rate of external I/O data can be made slower compared to internal clock rate to resolve I/O bottleneck problem. The logic and spice simulation results of the proposed architecture are presented. The performances of the proposed architecture are evaluated and compared with other architectures. Finally, the chip layout is shown.