• Title/Summary/Keyword: Parallel Implementation

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Lot Planning & Scheduling in the Integrated Steelmaking Process

  • Park Hyungwoo;Hong Yushin
    • Proceedings of the Korean Operations and Management Science Society Conference
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    • 2002.05a
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    • pp.109-113
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    • 2002
  • Steel industry is the most capital intensive and the largest energy consuming industry, which operate huge and complex facilities to supply various steel products as the primary materials to almost every manufacturing industry Major steel products are hot-rolled and cold-rolled coils, plates, and wires that are produced through molten iron making, molten steel making, casting, and rolling. Each process runs in batch between setups and the specifications or bach are different with each other High energy consuming and heavy material handling require careful synchronization or processes, as well. Considering the synchronization or processes, the lot planning and scheduling problem in the integrated steelmaking process rovers the roll grouping with given casts. the sequencing or rolls over time, and the machine assignment and time scheduling or charges and casts. The problem is investigated by dividing it into two cases whether single or parallel machines at the molten steel making and the continuous casting processes. Problem descriptions and solution approaches or each instance are introduced. To test their performance and conformity, implementation or the algorithms and numerical experiments are carried out with real world and constructed data sets.

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Signal Space Detection for High Data Rate Channels (고속 데이터 전송 채널을 위한 신호공간 검출)

  • Jeon , Taehyun
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.42 no.10 s.340
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    • pp.25-30
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    • 2005
  • This paper generalizes the concept of the signal space detection to construct a fixed delay tree search (FDTS) detector which estimates a block of n channel symbols at a time. This technique is applicable to high speed implementation. Two approaches are discussed both of which are based on efficient signal space partitioning. In the first approach, symbol detection is performed based on a multi-class partitioning of the signal space. This approach is a generalization of binary symbol detection based on a two-class pattern classification. In the second approach, binary signal detection is combined with a look-ahead technique, resulting in a highly parallel detector architecture.

Improved Physical Layer Implementation of VANETs

  • Khan, Latif Ullah;Khattak, M. Irfan;Khan, Naeem;Khan, Atif Sardar;Shafi, M.
    • IEIE Transactions on Smart Processing and Computing
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    • v.3 no.3
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    • pp.142-152
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    • 2014
  • Vehicular Ad-hoc Networks (VANETs) are comprised of wireless mobile nodes characterized by a randomly changing topology, high mobility, availability of geographic position, and fewer power constraints. Orthogonal Frequency Division Multiplexing (OFDM) is a promising candidate for the physical layer of VANET because of the inherent characteristics of the spectral efficiency and robustness to channel impairments. The susceptibility of OFDM to Inter-Carrier Interference (ICI) is a challenging issue. The high mobility of nodes in VANET causes higher Doppler shifts, which results in ICI in the OFDM system. In this paper, a frequency domain com-btype channel estimation was used to cancel out ICI. The channel frequency response at the pilot tones was estimated using a Least Square (LS) estimator. An efficient interpolation technique is required to estimate the channel at the data tones with low interpolation error. This paper proposes a robust interpolation technique to estimate the channel frequency response at the data subcarriers. The channel induced noise tended to degrade the Bit Error Rate (BER) performance of the system. Parallel concatenated Convolutional codes were used for error correction. At the decoding end, different decoding algorithms were considered for the component decoders of the iterative Turbo decoder. A performance and complexity comparison among the various decoding algorithms was also carried out.

Implementation of a Viterbi Decoder Operated in the 1000Base-T (1000Base-T에서 동작하는 Viterbi Decoder 구현)

  • Jung, Jae-woo;Chung, Hae
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2013.10a
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    • pp.41-44
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    • 2013
  • As appearance of high-quality service such as UDTV application, high-speed and high-capacity communication services are required. For this, communication systems increase the data processing speed and use various error correction techniques. In this paper, we implement the Viterbi decoder applied in 1000BASE-T with 4 pairs UTP cable. The minimum operating speed of the Viterbi decoer should be more than 125 MHz because 125 MHz PAM-5 signal is transmitted on each pair of cables in 1000BASE-T. To do this, we implement the decoder by using the pipeline and parallel processing and verify the operation with 125 MHz by using a logic analyzer. Finally, we will show that the decoder recovers the original data for the added random error data.

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Analysis, Design and Implementation of a Soft Switching DC/DC Converter

  • Lin, Bor-Ren
    • Journal of Power Electronics
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    • v.13 no.1
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    • pp.20-30
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    • 2013
  • This paper presents a soft switching DC/DC converter for high voltage application. The interleaved pulse-width modulation (PWM) scheme is used to reduce the ripple current at the output capacitor and the size of output inductors. Two converter cells are connected in series at the high voltage side to reduce the voltage stresses of the active switches. Thus, the voltage stress of each switch is clamped at one half of the input voltage. On the other hand, the output sides of two converter cells are connected in parallel to achieve the load current sharing and reduce the current stress of output inductors. In each converter cell, a half-bridge converter with the asymmetrical PWM scheme is adopted to control power switches and to regulate the output voltage at a desired voltage level. Based on the resonant behavior by the output capacitance of power switches and the transformer leakage inductance, active switches can be turned on at zero voltage switching (ZVS) during the transition interval. Thus, the switching losses of power MOSFETs are reduced. The current doubler rectifier is used at the secondary side to partially cancel ripple current. Therefore, the root-mean-square (rms) current at output capacitor is reduced. The proposed converter can be applied for high input voltage applications such as a three-phase 380V utility system. Finally, experiments based on a laboratory prototype with 960W (24V/40A) rated power are provided to demonstrate the performance of proposed converter.

The Design of GF(2m) Parallel Multiplier using data select methodology (데이터 선택방식에 의한 GF(2m)상의 병렬 승산기 설계)

  • Byun, Gi-Young;Choi, Young-Hee;Kim, Heong-Soo
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.28 no.2A
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    • pp.102-109
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    • 2003
  • In this paper, the new multiplicative algorithm using standard basis over GF(2m) is proposed. The multiplicative process is simplified by data select method in proposed algorithm. After multiplicative operation, the terms of degree greater than m can be expressed as a polynomial of standard basis with degree less than m by irreducible polynomial. For circuit implementation of proposed algorithm, we design the circuit using multiplexer and show the example over GF(24). The proposed architectures are regular and simple extension for m. Also, the comparison result show that the proposed architecture is more simple than privious multipliers. Therefore, it well suited for VLSI realization and application other operation circuits.

A Simulation-Based Study of FAST TCP Compared to SCTP: Towards Multihoming Implementation Using FAST TCP

  • Arshad, Mohammad Junaid;Saleem, Mohammad
    • Journal of Communications and Networks
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    • v.12 no.3
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    • pp.275-284
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    • 2010
  • The current multihome-aware protocols (like stream control transmission protocol (SCTP) or parallel TCP for concurrent multipath data transfer (CMT) are not designed for high-capacity and large-latency networks; they often have performance problems transferring large data files over shared long-distance wide area networks. It has been shown that SCTP-CMT is more sensitive to receive buffer (rbuf) constraints, and this rbuf-blocking problem causes considerable throughput loss when multiple paths are used simultaneously. In this research paper, we demonstrate the weakness of SCTP-CMT rbuf constraints, and we then identify that rbuf-blocking problem in SCTP multihoming is mostly due to its loss-based nature for detecting network congestion. We present a simulation-based performance comparison of FAST TCP versus SCTP in high-speed networks for solving a number of throughput issues. This work proposes an end-to-end transport layer protocol (i.e., FAST TCP multihoming as a reliable, delaybased, multihome-aware, and selective ACK-based transport protocol), which can transfer data between a multihomed source and destination hosts through multiple paths simultaneously. Through extensive ns-2 simulations, we show that FAST TCP multihoming achieves the desired goals under a variety of network conditions. The experimental results and survey presented in this research also provide an insight on design decisions for the future high-speed multihomed transport layer protocols.

Alarm Diagnosis Monitoring System of RCP using Self Dynamic Neural Networks (자기 동적 신경망을 이용한 RCP의 경보 진단 시스템)

  • Ryoo, Dong-Wan;Kim, Dong-Hoon;Lee, Cheol-Kwon;Seong, Seung-Hwan;Seo, Bo-Hyeok
    • Proceedings of the KIEE Conference
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    • 2000.07d
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    • pp.2488-2491
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    • 2000
  • A Neural network is possible to nonlinear function mapping and parallel processing. Therefore It has been developing for a Diagnosis system of nuclear plower plant. In general Neural Networks is a static mapping but Dynamic Neural Network(DNN) is dynamic mapping. When a fault occur in system, a state of system is changed with transient state. Because of a previous state signal is considered as a information. DNN is better suited for diagnosis systems than static neural network. But a DNN has many weights, so a real time implementation of diagnosis system is in need of a rapid network architecture. This paper presents a algorithm for RCP monitoring Alarm diagnosis system using Self Dynamic Neural Network(SDNN). SDNN has considerably fewer weights than a general DNN. Since there is no interlink among the hidden layer. The effectiveness of Alarm diagnosis system using the proposed algorithm is demonstrated by applying to RCP monitoring in Nuclear power plant.

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Design and Implementation of Cultural Property Learning Contents Using Augmented Reality (증강현실을 이용한 문화재 학습 콘텐츠 설계 및 구현)

  • Seong, Min-Je;Lee, Dae-Hyun
    • Journal of Digital Contents Society
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    • v.18 no.5
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    • pp.831-837
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    • 2017
  • The popularization of smart phones is increasing interest in individual customized service and various systems have been changing in order to meet such changes to satisfy facilities such as museums. Museum has the element of view, contained purpose of history education, also has role as institution that should have fun and education. In order to achieve this purpose, it is necessary to arouse sufficient interest in cultural assets, In parallel, to provide various contents of cultural assets is essential. Therefore, to provide an efficient viewing cultural assets services in this study make a study to effective method for combined education and evaluation using Unity3D engine and SDK for Vuforia called Augmented Reality development.

Task failure resilience technique for improving the performance of MapReduce in Hadoop

  • Kavitha, C;Anita, X
    • ETRI Journal
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    • v.42 no.5
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    • pp.748-760
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    • 2020
  • MapReduce is a framework that can process huge datasets in parallel and distributed computing environments. However, a single machine failure during the runtime of MapReduce tasks can increase completion time by 50%. MapReduce handles task failures by restarting the failed task and re-computing all input data from scratch, regardless of how much data had already been processed. To solve this issue, we need the computed key-value pairs to persist in a storage system to avoid re-computing them during the restarting process. In this paper, the task failure resilience (TFR) technique is proposed, which allows the execution of a failed task to continue from the point it was interrupted without having to redo all the work. Amazon ElastiCache for Redis is used as a non-volatile cache for the key-value pairs. We measured the performance of TFR by running different Hadoop benchmarking suites. TFR was implemented using the Hadoop software framework, and the experimental results showed significant performance improvements when compared with the performance of the default Hadoop implementation.