• Journal of the Institute of Electronics Engineers of Korea CI
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• v.45 no.5
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• pp.1-7
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• 2008

The general bus architecture consists of masters, slaves, arbiter, decoder and so on in shared bus. Specially, as several masters do not concurrently receive the right of bus usage, the arbiter plays an important role in arbitrating between shared bus and masters. Fixed priority, round-robin, TDMA and Lottery methods are developed in general arbitration policies, which lead the efficiency of bus usage in shared bus. On the other hand, the bus architecture can be modified to maximize the system performance. In the paper, we propose the flying master bus architecture that supports the parallel bus communication and analyze its merits and demerits following various arbitration policies that are mentioned above, compared with normal shared bus. From the results of performance verification using TLM(Transaction Level Model), we find that more than 40% of the data communication performance improves, regardless of arbitration policies. As the flying master bus architecture advances its studies and applies various SoCs, it becomes the leading candidate of the high performance bus architecture.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.11 no.1
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• pp.115-123
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• 2011

Distribution system loss minimization re-configuration is 0-1 planning problem, and the number of combinations requiring searches is extremely large when dealing with typical system scales. For this reason, the application of a genetic algorithm (GA) seems a tractive to solve this problem. Although Genetic algorithms are a type of random number search method, they incorporate a multi-point search feature and are therefore superior to one-point search techniques. The incorporate of GAs for solving large combinational problem has received wide attention. Further, parallel searching can be performed and the optimal solution is more easily reach ed. In this paper, for improving GA convergence characteristics in the distribution system loss minimization re-configuration problem, a chromosome "Limited Life" concept is introduced. Briefly, considering the population homogenization and genetic drift problems, natural selection is achieved by providing this new concept, in addition to natural selection by fitness. This is possible because individuals in a population have an age value. Simulation were carried out using a model system to check this method's validity.

• The Journal of Korean Academic Society of Nursing Education
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• v.10 no.1
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• pp.7-19
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• 2004

This study has a purpose to devise an education program in relation to Gerontology and geriatrics applicable to Korean nurses through literature review and analysis of education programs utilized by the Geriatric Education Centers (GECs) of USA. Educational contents on gerontology and geriatrics are very diverse in precedent literatures. The education programs of GECs for health care personnel are equally very diverse. Among educational contents, subjects considered important are age-related changes, health problems of the aged, pharmacology, death, fall and osteoporosis, delirium, dementia, depression, urinary incontinence, communication with elderly. Methods used in education program are mainly seminar, workshop and lecture through internet. In addition, case study, small-group discussion and conference are also adopted. The program proposed in this study for nurses in relation to gerontology and geriatrics consists of 32 hours' education; 6 hours for age-related changes, 10 hours for health problems of the elderly, 14 hours for health problems in old age and 2 hours of communication technique. Educational method proposed is to utilize lecture through internet, direct education, workshop, practical exercise, case study and role play in parallel. This study proposed an education program on the basis of precedent literature and the program of GECs. Therefore, it is desirable to develop in the future more practical education program applicable to and required in practicing fields. Of course, this development needs to be based on nurses' educational needs by field in relation to gerontology and geriatrics.

• The Journal of the Korea institute of electronic communication sciences
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• v.9 no.11
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• pp.1233-1240
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• 2014

For the last three decades after the advent of the Toffoli gate in 1980, while many reversible circuit syntheses have been presented reversible embedding methods onto suitable reversible functions, only a few proposed direct irreversible-to-reversible mapping methods without reversible embedding. In this paper we present two effective policies to reduce the gate cost and complexity for the existing direct reversible mapping methods without reversible embedding. In order to develop new cost reduction policies we consider the cost influence of Toffoli module according to NOT gate arrangement in classical circuits. From this we deduced an inverse proportional property between inverting input numbers of classical AND/OR gates and reversible Toffoli module cost based on a fact - the inverting inputs of classical AND(OR) gates increase(decrease) the Toffoli module cost. We confirm the applications of the inverting input rearrangement and maximum fan-out policies preceding direct reversible mapping will be effective method to improve the reversible Toffoli module cost and complexity with the parallel using of the fan-out and supercell ones.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.7 no.8
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• pp.1854-1863
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• 2003

In the recent digital communication systems, the performance of Turbo Code using the mr correction coding depends on the interleaver influencing the free distance determination and the recursive decoding algorithms that is executed in the huh decoder. However, performance depends on the interleaver depth that needs many delays over the reception process. Moreover, turbo code has been blown as the robust coding methods with the confidence over the fading channel. International Telecommunication Union(ITU) has recently adopted it as the standardization of the channel coding over the third generation mobile communications(IMT­2000). Therefore, in this paper, we preposed the interleaver that has the better performance than existing block interleaver, and modified turbo decoder that has the parallel concatenated structure using MAP algorithm. In the real­time voice and video service over third generation mobile communications, the performance of the proposed two methods was analyzed and compared with the existing methods by computer simulation in terms of reduced decoding delay using the variable decoding method over AWGN and fading channels for CDMA environments.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.18 no.4
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• pp.468-480
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• 1993

In this paper, at first, the characteristics of double mode SAW (DMS) resonator are analysed by applying the wave guide model and coupled mode theory to 1-port resonator. The DMS resonators (2-pole), which are arranged in a close, parallel configuration of two identical 1-port resonators on a single plate, and 4-pole DMS filters are designed and fabricated at the center frequency of 150.15 MHz with 3-dB bandwidth of 80 KHz. The empirical design characteristics are obtained from the comparison of experimental and theoretical values resulted from several fabrications, and the narrow bandpass filters are implemented on the basis of the above empirical results, which can be used to mobile communication systems. A ST-cut quartz substrate is selected for the stable temperature-frequence characteristics, and high resolution photolithography is applied to the fabrication of filter to get the fine electrode patterns.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2017.10a
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• pp.543-545
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• 2017

This paper describes the SAO hardware architecture design for high performance in-loop filters. SAO is an inner module of in-loop filter, which compensates for information loss caused by block-based image compression and quantization. However, HEVC's SAO requires a high computation time because it performs pixel-unit operations. Therefore, the SAO hardware architecture proposed in this paper is based on a $4{\times}4$ block operation and a 2-stage pipeline structure for high-speed operation. The information generation and offset computation structure for SAO computation is designed in a parallel structure to minimize computation time. The proposed hardware architecture was designed with Verilog HDL and synthesized with TSMC chip process 130nm and 65nm cell library. The proposed hardware design achieved a maximum frequency of 476MHz yielding 163k gates and 312.5MHz yielding 193.6k gates on the 130nm and 65nm processes respectively.

• The Transactions of the Korea Information Processing Society
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• v.3 no.3
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• pp.478-492
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• 1996

For parallel implementations of functional programs without concurrent primitives, the λ-calculus encodings have been introduced. A functional program may be trans for med into a process network using process calculiby the λ-calculus encoding and there sult of a program can be obtained by a deal of communication actions in it's process network. But the λ-calculus encodings cause too many communication actions even in constant expressions. This paper shows the encoding for a combinator program without concurrency primitives which can combine the graph reduction and the process-net reduction using computable processes,'chores'. A 'chore' may have graph reduction functions for primitive operations of constants for which local graph reduction may be possible, and be encoded from a 'G-reducible' subexpression which is obtained by an annotation and trans for mati-on for a combinator program, assuring that it does not include any combinator application. Also, we show that a process network with chores raises less commu-nication actions than one without chores.

• Journal of KIISE:Computer Systems and Theory
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• v.29 no.2
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• pp.65-74
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• 2002

Recently star networks are considered as attractive alternatives to the widely used hypercube for interconnection networks in parallel processing systems by many researchers. One of the fundamental communication problems on star graph networks is broadcasing In this paper we consider the broadcasting problems in star graph networks using wormhole routing. In wormhole routed system minimizing link contention is more critical for the system performance than the distance between two communicating nodes. We use Hamiltonian paths in star graph to set up link-disjoint communication paths We present a broadcast algorithm in n-dimensional star graph of N(=n!) nodes such that the total completion time is no larger than $([long_n n!]+1)$ steps where $([long_n n!]+1)$ is the lower bound This result is significant improvement over the previous n-1 step broadcasting algorithm.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.11 no.9
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• pp.1709-1716
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• 2007

In this paper, ADC with multi SHA structure is proposed for high speed operation. The proposed structure incorporates a multi SHA block that consists of multiple SHAs of identical characteristics in parallel to improve the conversion speed. The designed multi SHA is operated by non-overlapping clocks and the sampling speed can be improved by increasing the number of multiplexed SHAs. Pipelined A/D converter, applying the proposed structure, is designed to satisfy requirement of analog front-end of VDSL modem. The measured INL and DNL of designed A/D converter are $0.52LSB{\sim}-0.50LSB$ and $0.80LSB{\sim}-0.76LSB$, respectively. It satisfies the design specifications for VDSL modems. The simulated SNR is about 66dB which corresponds to a 10.7 bit resolution. The power consumption is 24.32mW.