• Journal of the Computational Structural Engineering Institute of Korea
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• v.23 no.5
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• pp.475-482
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• 2010

In this paper, an efficient two-level parallel domain decomposition algorithm is suggested to solve large-DOF structural problems. Each subdomain is composed of the coarse problem and local problem. In the coarse problem, displacements at coarse nodes are computed by the iterative method that does not need to assemble a stiffness matrix for the whole coarse problem. Then displacements at local nodes are computed by Multi-Frontal Sparse Solver. A parallel version of PCG(Preconditioned Conjugate Gradient Method) is developed to solve the coarse problem iteratively, which minimizes the data communication amount between processors to increase the possible problem DOF size while maintaining the computational efficiency. The test results show that the suggested algorithm provides scalability on computing performance and an efficient approach to solve large-DOF structural problems.

• The Transactions of the Korea Information Processing Society
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• v.4 no.1
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• pp.67-75
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• 1997

This paper presents a virtual-parallel multistage interconnection network (MIN) which provides multipath between processor and memory module. The proposed virtual-parallel MIN network which uses $m{\times}1$ mutiplexer at the input switching block, $1{\times}m$ demultiplexer at the output switching block and logN-1 switching stages has maximum $2{\times}m$ unique paths between processor and memory module. Because it has multi-redundance paths, a number of processors can connect a specific Also, this new virtual-parallel structured MIN network can reduce packet collision possibility at switching block and it has cost. It shown to improve a performance and to be a very simple structure in comparision with MBSF structured MIN.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.19 no.3
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• pp.659-666
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• 2015

In this paper, we propose a novel reconstruction method of spatially filtered 3D images in integral imaging based on parallel lens array. The parallel lens array is composed of two lens arrays, which are positioned side by side through longitudinal direction. Conventional spatial filtering method by using convolution property between periodic functions has drawback that is the limitation of the position of target object. this caused the result that the target object should be located on the low depth resolution region. The available spatial filtering region of the spatial filtering method is depending on the focal length and the number of elemental lens in the integral imaging pickup system. In this regard, we propose the parallel lens array system to enhance the available spatial filtering region and depth resolution. The experiment result indicate that the proposed method outperforms the conventional method.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.11
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• pp.2260-2266
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• 2009

In this paper, the problem of electromagnetic coupling between a slit fed by a flanged parallel-plate waveguide (FPPW) and a nearby conducting strip parallel to the slit is studied as a simplified problem for a near-field scanning microscopy (NSM). The characteristics of the FPPW are investigated from the results for the variations of the equivalent slit admittance, the reactive powers near the slit inside and outside the FPPW, the magnitude and phase of the voltage reflection coefficient of the TEM wave. The performance of the proposed apparatus as an NSM is tested by examining the effects of various geometrical parameters such as guide height, slit width, strip width, distance between slit and strip, and the ratio of slit width to guide height on the magnitude and phase of the voltage reflection coefficient of the TEM wave. From the results for the voltage reflection coefficient against the strip offset from the slit, it is found that a slit in the FPPW with smaller guide height gives higher scanning resolution and the phase variation is more sensitive than the magnitude variation.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.11 s.353
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• pp.90-97
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• 2006

In this paper, we present a cost-effective architecture of high-speed soft-decision Viterbi decoder for Multi-band OFDM(MB-OFDM) systems. In the design of modem for MB-OFDM systems, a parallel processing architecture is general]y used for the reliable hardware implementation, because the systems should support a very high-speed data rate of at most 480Mbps. A Viterbi decoder also should be designed by using a parallel processing structure and support a very high-speed data rate. Therefore, we present a optimized hardware architecture for 4-way parallel processing Viterbi decoder in this paper. In order to optimize the hardware of Viterbi decoder, we compare and analyze various ACS architectures and find the optimal one among them with respect to hardware complexity and operating frequency The Viterbi decoder with a optimal hardware architecture is designed and verified by using Verilog HDL, and synthesized into gate-level circuits with TSMC 0.13um library. In the synthesis results, we find that the Viterbi decoder contains about 280K gates and works properly at the speed required in MB-OFDM systems.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.33 no.2
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• pp.1-10
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• 2005

An unstructured parallel overset mesh method has been developed for the simulation of unsteady flows around multiple bodies in relative motion. For this purpose, an efficient and robust search method is proposed for the unstructured grid system. A new data-structure is also proposed to handle the variable number of data on parallel sub-domain boundary. The interpolation boundary is defined for data communication between grid systems. An interpolation method to retain second-order spatial accuracy and to treat the points inside the neighboring solid bodies are also suggested. A single store separating from the Eglin/Pylon configuration is calculated and the result is compared with experimental data for validation. Simulation of unsteady flows around multiple bodies in relative motion is also performed.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.17 no.8
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• pp.1851-1856
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• 2013

An XML is widely used for web services, such as SOAP(Simple Object Access Protocol) and REST (Representational State Transfer), and also de facto standard for representing data. Since the XML parser using DOM(Document Object Model) requires a preprocessing task creating a DOM-tree, and then storing it into memory, embedded systems with limited resources typically employ a streaming XML parser without preprocessing. In this paper, we propose a new architecture for the streaming XML parser using an APSearch(Adaptive Parallel Search) on FPGA(Field Programmable Gate Array). Compared to other approaches, the proposed APSearch parser dramatically reduces overhead on the software side and achieves about 2.55 and 2.96 times improvement in the time needed for an XML parsing. Therefore, our APSearch parser is suitable for systems to speed up XML parsing.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.9B
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• pp.1668-1675
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• 1999

In this thesis, a narrowband bandpass filter using HTS is proposed for the multiplexer of the satellite communication subsystems. The proposed structure using HTS provides the narrower band and the lower insertion loss characteristics than the conventional parallel-coupled-line bandpass filter. The filter structure using hairpin-line only cause the spurious modes due to the surface waves. But these modes can be lessened by using the hybrid hairpin-line/parallel-coupled-line proposed in this thesis. The narrowband bandpass filters using HTS at the operation frequency of 14.25 GHz are fabricated to have the narrow bandwidth less 1% and the insertion loss less 3dB in comparison with the normal metal microstrip filter with the same three poles. The experimental results show that the filter using HTS has the characteristics of the narrower bandwidth and less insertion loss and can be fabricated with more compact size in comparison with the bandpass filter using normal metal.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.8 no.3
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• pp.570-576
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• 2004

In this paper, we design the IFFT/FFT (Inverse fast Fourier Transform/Fast Fourier Transform) modules for IEEE 802.11a-1999, which is a standard of the High-speed Wireless LAN using the OFDM (Orthogonal Frequency Division Multiplexing). The designed IFFT/FFT is the 64-point FFT to be compatible with IEEE 802.11a and the pipelined architecture which needs neither serial-to-parallel nor parallel-to-serial converter. We compare four types of IFFT/FFT modules for the hardware complexity and operation : R22SDF (Radix-2 Single-path Delay feedback), the R2SDF (Radix-2 Single-path Delay feedback), R2SDF (Radix-4 Single-path Delay Feedback), and R4SDC (Radix-4 Single-path Delay Commutator). In order to minimize the error, we design the IFFT/FFT module to operate with additional decimal parts after butterfly operation. In case of the R22SDF, the IFFT/FFT module has 44,747 gate counts excluding RAMs and the minimized error rate as compared with other types. And we know that the R22SDF has a small hardware structure as compared with other types.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.23 no.1
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• pp.13-19
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• 2019

The accuracy of machine learning is greatly affected by amount of learning data and quality of data. Collecting existing Web-based learning data has danger that data unrelated to actual learning can be collected, and it is impossible to secure data transparency. In this paper, we propose a method for collecting data directly in parallel by blocks in a block - chain structure, and comparing the data collected by each block with data in other blocks to select only good data. In the proposed system, each block shares data with each other through a chain of blocks, utilizes the All-reduce structure of Parallel-SGD to select only good quality data through comparison with other block data to construct a learning data set. Also, in order to verify the performance of the proposed architecture, we verify that the original image is only good data among the modulated images using the existing benchmark data set.