• Title/Summary/Keyword: Parallel Communication

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A Navigation Algorithm using Locomotion Interface with Two 6-DOF Robotic Manipulators (ICCAS 2005)

  • Yoon, Jung-Won;Ryu, Je-Ha
    • 제어로봇시스템학회:학술대회논문집
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    • 2005.06a
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    • pp.2211-2216
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    • 2005
  • This paper describes a novel navigation algorithm using a locomotion interface with two 6-DOF parallel robotic manipulators. The suggested novel navigation system can induce user's real walking and generate realistic visual feedback during navigation, using robotic manipulators. For realistic visual feedback, the virtual environment is designed with three components; 3D object modeler for buildings and terrains, scene manager and communication manager component. The walking velocity of the user is directly translated to VR actions for navigation. Finally, the functions of the RPC interface are utilized for each interaction mode. The suggested navigation system can allow a user to explore into various virtual terrains with real walking and realistic visual feedback.

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Real Time Control for Robot Manipulator Using Transputer (트랜스퓨터를 이용한 로보트 매니퓰레이터의 실시간 제어)

  • Jang, Yong-Geun;Hong, Suk-Kyo
    • Proceedings of the KIEE Conference
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    • 1992.07a
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    • pp.397-400
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    • 1992
  • Many dynamic control have been proposed; however, most of them are limited within stage of simulation study. The main reason is that the computations required for inverse dynamics are far beyond the ability of the present commercially available microprocessors. In this paper, In order to achieve real-time processing in robot dynamic control, a parallel processing computer for robot dynamic control is implemented using two transputer. Two transputer compute two degree of freedom robot. The transputer is a special purpose MPU for parallel processing. Transputers are used in networks to build a high performance concurrent system. A network of transputers and peripheral controllers is constructed using point-to-point communication. To gain most benifit from the transputer architecture, the whole system is programmed in OCCAM which is a high level language for concurrent applications. This control algorithm is applied to the RHINO SCARA type manipulator. We could taked about 438.6 microseconds to compute robot dynamic with two-processors.

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Performance Comparison of Two Parallel LU Decomposition Algorithms on MasPar Machines

  • Kim, Yong-Tae
    • Journal of IKEEE
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    • v.2 no.2 s.3
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    • pp.247-254
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    • 1998
  • This paper presents a performance study of two LU decomposition algorithms on two massively parallel SIMD machines: the 16K processor MasPar MP-1 and the 4K processor MasPar MP-2. The paper presents experimental results and an analysis of the algorithms to explain the results. While the blocked and the nonblocked algorithms for LU decomposition have been studied individually by others, we compare the two algorithms and identify the tradeoffs between them. Our analysis of the blocked algorithm shows how the block size affects the interprocessor communication cost and the memory read/write overhead. The analysis in this paper is useful to determine an optimum block size for the blocked algorithm.

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Parallel Finite Element Analysis of the Drag of a Car under Road Condition

  • Choi H. G.;Kim B. J.;Kim S. W.;Yoo J. Y.
    • 한국전산유체공학회:학술대회논문집
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    • 2003.10a
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    • pp.84-85
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    • 2003
  • A parallelized FEM code based on domain decomposition method has been recently developed for a large scale computational fluid dynamics. A 4-step splitting finite element algorithm is adopted for unsteady computation of the incompressible Navier-Stokes equation, and Smagorinsky LES(Large Eddy Simulation) model is chosen for turbulent flow computation. Both METIS and MPI library are used for domain partitioning and data communication between processors respectively. Tiburon of Hyundai-motor is chosen as the computational model at $Re=7.5{\times}10^{5}$, which is based on the car height. It is confirmed that the drag under road condition is smaller than that of wind tunnel condition.

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Performance Analysis of Turbo Encoded Parallel Interference Canceller on Rayleigh Fading Channel (Rayleigh 페이딩 채널에서 터보부호화 병렬간섭제거기의 성능분석)

  • 박재오;이정재
    • Journal of the Institute of Convergence Signal Processing
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    • v.2 no.4
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    • pp.65-70
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    • 2001
  • In this paper a new scheme combining the turbo coder with parallel interference canceller, which effectively mitigates the effects of multiple access interferences and Ralyeigh fades in the DS-CDAM mobile communication systems is proposed Using the Monte-Carlo simulation, the performance of this scheme in terms of the number of users and signal to noise ration under AWGN and Ralyeigh fading environment is analyzed. The results of simulations show that the proposed scheme outperforms conventional CDMA receiver systems over Rayleigh fading as well as AWGN.

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High-performance TDM-MIMO-VLC Using RGB LEDs in Indoor Multiuser Environments

  • Sewaiwar, Atul;Chung, Yeon-Ho
    • Current Optics and Photonics
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    • v.1 no.4
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    • pp.289-294
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    • 2017
  • A high-performance time-division multiplexing (TDM) -based multiuser (MU) multiple-input multipleoutput (MIMO) system for efficient indoor visible-light communication (VLC) is presented. In this work, a MIMO technique based on RGB light-emitting diodes (LEDs) with selection combining (SC) is utilized for data transmission. That is, the proposed scheme employs RGB LEDs for parallel transmission of user data and transmits MU data in predefined slots of a time frame with a simple and efficient design, to schedule the transmission times for multiple users. Simulation results demonstrate that the proposed scheme offers an approximately 6 dB gain in signal-to-noise ratio (SNR) at a bit error rate (BER) of $3{\times}10^{-5}$, as compared to conventional MU single-input single-output (SISO) systems. Moreover, a data rate of 66.7 Mbps/user at a BER of $10^{-3}$ is achieved for 10 users in indoor VLC environments.

Dependability Analysis of Parallel Video Servers Using Fault Injection Simulation (결함 주입 시뮬레이션을 이용한 병렬 비디오 서버의 의존도 분석)

  • 정지영;김성수
    • Journal of the Korea Society for Simulation
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    • v.9 no.2
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    • pp.51-61
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    • 2000
  • In recent years, significant advances in computers and communication technologies have made multimedia services feasible. As a result, various queueing models and cost models on architecture and data placement for multimedia server have been proposed. However, most of these models do not evaluate dependability of systems. In the design phase of a system, simulation is an important experimental means for performance and dependability analysis. Fault injection simulation has been used in evaluation of dependability metric. In this paper, we develop fault injection simulation model to analyze dependability of parallel video servers. In addition, we evaluate reliability and MTTF(Mean Time To Failure) of systems by using the simulator.

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Load Balancing Strategies for Network-based Cluster System

  • Jung, Hoon-Jin;Choung Shik park;Park, Sang-Bang
    • Proceedings of the IEEK Conference
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    • 2000.07a
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    • pp.314-317
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    • 2000
  • Cluster system provides attractive scalability in terms of computation power and memory size. With the advances in high speed computer network technology, cluster systems are becoming increasingly competitive compared to expensive parallel machines. In parallel processing program, each task load is difficult to predict before running the program and each task is interdependent each other in many ways. Load imbalancing induces an obstacle to system performance. Most of researches in load balancing were concerned with distributed system but researches in cluster system are few. In cluster system, the dynamic load balancing algorithm which evaluates each processor's load in runtime is purpose that the load of each node are evenly distributed. But, if communication cost or node complexity becomes high, it is not effective method for all nodes to attend load balancing process. In that circumstances, it is good to reduce the number of node which attend to load balancing process. We have modeled cluster systems and proposed marginal dynamic load balancing algorithms suitable for that circumstances.

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An FPGA Design of High-Speed Turbo Decoder

  • Jung Ji-Won;Jung Jin-Hee;Choi Duk-Gun;Lee In-Ki
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.6C
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    • pp.450-456
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    • 2005
  • In this paper, we propose a high-speed turbo decoding algorithm and present results of its implementation. The latency caused by (de)interleaving and iterative decoding in conventional MAP turbo decoder can be dramatically reduced with the proposed scheme. The main cause of the time reduction is to use radix-4, center to top, and parallel decoding algorithm. The reduced latency makes it possible to use turbo decoder as a FEC scheme in the real-time wireless communication services. However the proposed scheme costs slight degradation in BER performance because the effective interleaver size in radix-4 is reduced to an half of that in conventional method. To ensure the time reduction, we implemented the proposed scheme on a FPGA chip and compared with conventional one in terms of decoding speed. The decoding speed of the proposed scheme is faster than conventional one at least by 5 times for a single iteration of turbo decoding.

A Message Transfer Scheme for Efficient Message Passing in the Highly Parallel Computer SPAX (고속병렬컴퓨터(SPAX)에서의 효율적인 메시지 전달을 위한 메시지 전송 기법)

  • 모상만;신상석;윤석한;임기욱
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.32B no.9
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    • pp.1162-1170
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    • 1995
  • In this paper, we present a message transfer scheme for efficient message passing in the hierarchically structured multiprocessor computer SPAX(Scalable Parallel Architecture computer based on X-bar network). The message transfer scheme provides interface not only with operating system but also with end users. In order to transfer two types of control message and data message efficiently, it supports both of memory-mapped transfer and DMA-based transfer. Dual-port RAMs are used as message buffers, and control and status registers provide efficient programming interface. Interlaced parity scheme is adopted for error control. If any error is detected at receiving node, errored packet is resent by sender according to retry mechanism. In conjunction with retry mechanism, watchdog timers are used to protect infinite waiting and repeated retry. The proposed message transfer scheme can be applied to input/output nodes and communication connection nodes as well as processing nodes in the SPAX.

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