• Title/Summary/Keyword: Parallel Circuit

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Lumped Element MMIC Direction Coupler Based on Parallel Coupled-Line Theory (평행 결합선로 이론에 근거한 MMIC 집중 소자형 방향성 결합기)

  • Kang, Myung-Soo;Joung, Myung-Sup;Park, Jun-Seok;Lim, Jae-Bong;Cho, Hong-Goo;Lee, Jae-Hak;Kim, Heong-Seok
    • Proceedings of the KIEE Conference
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    • 2004.07c
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    • pp.2028-2030
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    • 2004
  • In this paper, a lumped equivalent circuit for a conventional parallel directional coupler is proposed. The equivalent circuit and design formula for the presented lumped element coupler is derived based on the even- and odd-mode properties of a parallel-coupled line. By using the derived design formula, we have designed the 3dB and 4.7dB lumped element directional couplers at the center frequency of 3.4GHz and 5.6GHz. A chip type directional coupler has been designed to fabricate with MMIC(Monolitic Microwave integrated circuit) process. Excellent agreements between simulations and measurements on the designed directional couplers show the validity of this paper.

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The Output Characteristics and the Optimization of Parallel-mesh Circuit of a Pulsed Nd:YAG Laser by Using a Circular Cavity (원형 Cavity를 이용한 펄스형 Nd:YAG레이저의 출력특성 및 병렬메쉬 회로의 최적화)

  • Yang, D.M.;Kim, B.G.;Park, K.R.;Hong, J.H.;Kang, W.;Kim, W.Y.;Kim, H.J.
    • Proceedings of the KIEE Conference
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    • 1999.07e
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    • pp.2201-2203
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    • 1999
  • In this study, we have designed and manufactured not a present elliptic cavity but a circular cavity and we have experimented the operational characteristics. As a result, we obtained the maximum efficiency of 2.1 %. It didn't have any difference compared with elliptic cavity. A circular cavity is much more compact, so far easier to be manufactured than a elliptic cavity. And it can be made at a low cost. At the input energy, parameter $\alpha$, input voltage, and pulse width were in the same condition, we have decided to the optimization of the mesh number of a parallel-mesh circuit which was connected with main power supply.

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Theoretical Characteristics of Thermodynamic Performance of Combined Heat and Power Generation with Parallel Circuit using Organic Rankine Cycle (유기랭킨사이클을 이용한 병렬 열병합 발전시스템의 열역학적 이론 성능 특성)

  • Kim, Kyoung-Hoon
    • Journal of the Korean Solar Energy Society
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    • v.31 no.6
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    • pp.49-56
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    • 2011
  • In this study a novel cogeneration system driven by low-temperature sources at a temperature level below $190^{\circ}C$ is investigated by first and second laws of thermodynamics. The system consists of Organic Rankine Cycle(ORC) and an additional heat generation as a parallel circuit. Seven working fluids of R143a, R22, R134a, R152a, $iC_4H_{10}$(isobutane), $C_4H_{10}$(butane), and R123a are considered in this work. Maximum mass flow rate of a working fluid relative to that of the source fluid and optimum turbine inlet pressure are considered to extract maximum power from the source. Results show that due to a combined heat and power generation, both the efficiencies by first and second laws can be significantly increased in comparison to a power generation, however, the second law efficiency is more resonable in the investigation of cogeneration systems. Results also show that the working fluid for the maximum system efficiency depends on the source temperature.

Wideband Suppression of Radiated Emissions from a Power Bus in High-Speed Printed Circuit Boards

  • Shim, Yujeong;Kim, Myunghoi
    • Journal of information and communication convergence engineering
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    • v.14 no.3
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    • pp.184-190
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    • 2016
  • We present experimental demonstrations of electromagnetic bandgap (EBG) structures for the wideband suppression of radiated emissions from a power bus in high-speed printed circuit boards (PCBs). In most of the PCB designs, a parallel plate waveguide (PPW) structure is employed for a power bus. This structure significantly produces the wideband-radiated emissions resulting from parallel plate modes. To suppress the parallel plate modes in the wideband frequency range, the power buses based on the electromagnetic bandgap structure with a defected ground structure (DGS) are presented. DGSs are applied to a metal plane that is connected to a rectangular EBG patch by using a via structure. The use of the DGS increases the characteristic impedance value of a unit cell, thereby substantially improving the suppression bandwidth of the radiated emissions. It is experimentally demonstrated that the DGS-EBG structure significantly mitigates the radiated emissions over the frequency range of 0.5 GHz to 2 GHz as compared to the PPW.

The Parallel Operation of ZVT-Full Bridge Converter with Dynamic Current Shared Inductor (동적 전류분담 인덕터를 적용한 ZVT 풀 브리지 컨버터의 병렬 운전)

  • Bae, Jin-Yong;Kim, Yong;Baek, Soo-Hyun;Kwon, Soon-Do;Lee, Kyu-Hoon;Kim, Cherl-Jin
    • Proceedings of the KIEE Conference
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    • 2001.07b
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    • pp.942-945
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    • 2001
  • This paper presents parallel operation of ZVT(Zero Voltage Transition) Full Bridge Converter with Dynamic Current Shared Inductor. In the conventional method, CT(Current Transformer) have been used to share the load current equally with converters. In this system, at parallel operation of ZVT Full Bridge Converter, dynamic current shared inductor divides the same current of unit converter and ZVT circuit aids to high efficiency. This method which is proposed to compare in the conventional method will do simple control circuit. To show the superiority of this converter is verified through the experiment with a 2kW, 50kHz prototype converter.

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Design of a Novel Lumped Element Backward Directional Coupler Based on Parallel Coupled-Line Theory (평행 결합선로 이론에 근거한 새로운 집중 소자형 방향성 결합기 해석 및 설계)

  • 송택영;이상현;김영태;천창율;박준석
    • Proceedings of the Korea Electromagnetic Engineering Society Conference
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    • 2002.11a
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    • pp.157-160
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    • 2002
  • In this paper, a novel lumped equivalent circuit for a conventional parallel directional coupler is proposed. The equivalent circuit and design formula for the presented lumped element coupler is derived based on the even-and odd-mode properties of a parallel-coupled line. By using the derived design formula, we have designed the 3㏈ and 10㏈ lumped element directional couplers at the center frequency of 100Mhz. Furthermore, a chip type directional coupler has been designed to fabricate with multilayer configurations by employing the Low Temperature CofiredCeramic (LTCC) process. Designed chip-type directional coupler has a 10㏈-coupling value at the center frequency of 2㎓. Excellent agreements between simulations and measurements on the designed directional couplers show the validity of this paper

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A Study on the Sound Absorbing Performance of Parallel Perforated Plate Systems (병렬 다공판 시스템의 흡음성능에 관한 연구)

  • Hur, Sung-Chun;Im, Jung-Bin;Lee, Dong-Hoon
    • Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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    • 2002.11a
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    • pp.388.2-388
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    • 2002
  • An equivalent electroacoustic circuit approach of estimating the sound absorption coefficient for parallel perforated plate system is proposed. The proposed approach is validated by comparing the calculated absorption coefficients of a parallel single layer perforated plate system with the values measured by the two-microphone impedance tube method for various porosity and cavity depth. (omitted)

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Improvement of Time-Delay of the Analog Viterbi Decoder through Minimizing Parasitic Capacitors in Layout Design (아날로그 비터비 디코더에 있어서 기생 cap성분 최소화 layout 설계에 의한 신호전파 지연 개선)

  • Kim, In-Cheol;Kim, Hyun-Jung;Kim, Hyong-Suk
    • Proceedings of the KIEE Conference
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    • 2007.04a
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    • pp.196-198
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    • 2007
  • A circuit design technique to reduce the propagation time is proposed for the analog parallel processing-based Viterbi decoder. The analog Viterbi decoder implements the function of the conventional digital Viterbi decoder utilizing the analog parallel processing circuit technology. The decoder is for the PR(1.2,2.1) signal of DVD. The benefits are low power consumption and less silicon occupation. In this paper, a propagation time reduction technique is proposed by minimizing the parasitic capacitance components in the layout design of the analog Viterbi decoder. The propagation time reduction effect of the proposed technique has been shown via HSPICE simulation.

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Fault Location Algorithm in Parallel Transmission Line Using Zero Sequence Network (영상회로를 이용한 병행 송전선로에서의 고장점 추정 알고리즘)

  • Park, Hong-Kyu;Lee, Jae-Gyu;You, Seok-Ku
    • Proceedings of the KIEE Conference
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    • 1999.11b
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    • pp.282-284
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    • 1999
  • This paper presents an accurate algorithm for fault location of a single phase to earth fault on a two-parallel transmission line using only one-terminal data. It is impossible to calculate the accurate fault distance, because of the unknown fault resistance and fault current at the fault point. The faulted line circuit and the zero-sequence circuit of two-parallel line are used as a fault location model, which the source impedance of the remote end is not involved. The algorithm can eliminate the effect of load flow and the fault resistance in calculating the fault location.

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2-bit Flash ADC Based on Current Mode Algorithmic

  • Tipsuwanporn, V.;Chuenarom, S.;Maitreechit, S.;Chuchotsakunleot, W.;Kongrat, V.
    • 제어로봇시스템학회:학술대회논문집
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    • 2000.10a
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    • pp.473-473
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    • 2000
  • This paper presents the 2-bit parallel algorithmic ADC using current mode for parallel method algorithm. It is operated by parallel conversion, 2-bit at each moment, and increase bit numbers by serial connection. The circuit operates in current mode. The comparison ratio can be controlled while working under mode operation. The circuit design used 0.8 ${\mu}{\textrm}{m}$ CMOS technology which capable to convert 2-bit in 50 ns, power consumed 0.786 nW, with input current 0-50 mA from 3V single supply. From simulation testing, the conversion rate is much faster than other method.

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