• Title/Summary/Keyword: Paper chip

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High speed milling titanium alloy (Ti 합금의 고속가공시 밀링특성에 관한 연구)

  • Ming CHEN;Youngmoon LEE;Seunghan YANG;Seungil CHANG
    • Proceedings of the Korean Society of Machine Tool Engineers Conference
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    • 2003.04a
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    • pp.454-459
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    • 2003
  • The paper will present chip formation mechanism and surface integrity generation mechanism based on the systematical experimental tests. Some basic factors such as the end milling cutter tooth number, cutting forces, cutting temperature, cutting vibration, the chip status, the surface roughness, the hardness distribution and the metallographic texture of the machined surface layer are involved. the chip formation mechanism is typical thermal plastic shear localization at high cutting speed with less number og shear ribbons and bigger shear angle than at low speed, which means lack of chip deformation. The high cutting speed with much more cutting teeth will be beneficial to the reduction of cutting forces, enlarge machining stability region, depression of temperature increment, auti-fatigability as well as surface roughness. The burrs always exists both at low cutting speed and at high cutting speed. So the deburr process should be arranged for milling titanium alloy in any case.

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Microarchitecture Simulator for On-Chip Multiprocessor Microprocessor (다중처리형 마이크로프로세서 미세구조 시뮬레이터)

  • Park, Kyoung;Hahn, Woo-Jong
    • Proceedings of the IEEK Conference
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    • 1999.11a
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    • pp.408-411
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    • 1999
  • Microarchitecture simulator is an important tool to verify and optimize the microarchitecture of a new microprocessor. Moreover. it can be use as a performance simulator to estimate the target microprocessor′s performance. And system software designers can use it as a software developing environment. This paper describes a "microarchitecture simulator for on-chip Multiprocessor microprocessor". It is a program-driven and cycle-based simulator that can execute simultaneous mutithreading benchmarks. We verified the microarchitecture of a new on-chip multiprocessor microprocessor with it and did performance simulations to estimate the performance of the on-chip multiprocessor microprocessor.

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Development of measuring and calibrating technology for moving error and precision of chip mounter using Ball Bar (Ball Bar를 이용한 칩마운터의 운동 오차 정밀도 측정 및 평가 기술 개발)

  • 이창하;김정환;박희재
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2000.05a
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    • pp.621-628
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    • 2000
  • A kinematic ball bar measuring system can analyze the various errors of a machine tool easil rapidly with only one measurement, But it cannot be used to measure the errors of the equipment the semiconductor manufacturing (e.g. chip mounter, PCB router etc.) not to use a cir interpolation. This paper presents the method to apply a kinematic ball bar measuring system tc machines which use merely a linear interpolation Also, the work of measuring and calibratir various errors of a chip mounter with a kinematic bal1 bar measurement system is accomplished

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Design and Implementation of MAC Protocol for Wireless LAN (무선 LAN MAC 계층 설계 및 구현)

  • 김용권;기장근;조현묵
    • Proceedings of the IEEK Conference
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    • 2001.06a
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    • pp.253-256
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    • 2001
  • This paper describes a high speed MAC(Media Access Control) function chip for IEEE 802.11 MAC layer protocol. The MAC chip has control registers and interrupt scheme for interface with CPU and deals with transmission/reception of data as a unit of frame. The developed MAC chip is composed of protocol control block, transmission block, and reception block which supports the BCF function in IEEE 802.11 specification. The test suite which is adopted in order to verify operation of the MAC chip includes various functions, such as RTS-CTS frame exchange procedure, correct IFS(Inter Frame Space)timing, access procedure, random backoff procedure, retransmission procedure, fragmented frame transmission/reception procedure, duplicate reception frame detection, NAV(Network Allocation Vector), reception error processing, broadcast frame transmission/reception procedure, beacon frame transmission/reception procedure, and transmission/reception FIEO operation. By using this technique, it is possible to reduce the load of CPU and firmware size in high speed wireless LAN system.

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A Meander-Line Chip Antenna with Stacked Layer (적층구조를 갖는 미앤더라인 칩 안테나)

  • Nam, In-Hyun;Park, Sung-Ho;Oh, Tai-Sung;Ahn, Bierng-Chearl
    • Proceedings of the Korea Electromagnetic Engineering Society Conference
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    • 2003.11a
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    • pp.506-510
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    • 2003
  • In this paper, a meander-line chip antenna with stacked layer is suggested, designed and fabricated employing the LTCC(Low Temperature Co-fired Ceramic) fabrication techniques. To reduce the antenna chip size, the meander-line antenna strip is distributed over three layer. Layers one interconnected using via holes. A 2.4 GHz chip antenna with size of $3.75{\times}7.9{\times}1.0 mm^3$ is designed and fabricated using the LTCC technique. Measurements of the fabricated antenna show 160 MHz bandwidth and 3.75 dBi maximum gain. The Measured reflection coefficient and radiation patterns agree well with the prediction by electromagnetic simulation.

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A study on the dual band plastic chip antenna for mobile terminal phone (이동통신 단말기용 이중대역(Dualband) 프라스틱 칩 안테나에 관한 연구)

  • Lee, Young-Hun;Kwon, Won-Hyun
    • Proceedings of the Korea Electromagnetic Engineering Society Conference
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    • 2003.11a
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    • pp.532-535
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    • 2003
  • In this paper, we made study for plastic chip antenna, the plastic is Formax with the circle of PVC and its electric characteristics are dielectric constant 1.9, surface current $10{\Omega}$. The proposed antenna same as the conventional antenna are usually constructed with ceramic chip, which are not fragile in nature and don't tend to break easily. Therefore the proposed antenna with its advantage are attractive for application in mobile antenna. We study the dual-band plastic chip antenna resonated at 800Mhz and 1800Mhz. From this study results, we feel confident of application for mobile phone antenna.

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Wear and chip Formation by the tool on cutting Nickel-based Heat Resisting Alloy (니켈기 내열합금 절삭시 공구에 따른 마모와 칩생성)

  • 윤주식
    • Proceedings of the Korean Society of Machine Tool Engineers Conference
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    • 2000.04a
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    • pp.264-269
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    • 2000
  • Nickel-based heat resisting alloys are commonly used for high temperature applications such as in aircraft engines and gas turbines. In this paper, the machinability of Nickel-based heat resisting alloy was investigated with respect to the wear and the chip formation by tool type and cutting condition. Relationship between three types of tool and chip formation was experimentally investigated. Among the three types of tool tested, coated tools(CVD, PVD) are available for the difficult-to-cut-materials such as Nickel-based heat resisting alloy and etc..

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Simulation of Thermal Fatigue Life Prediction of Flip Chip with Lead-free Solder Joints by Variation in Bump Pitch and Underfill (무연 솔더 접합부을 갖는 플립칩에서의 언더필 및 범프 피치 변화에 의한 열 피로 수명 예측 해석)

  • Kim, Seong-Keol;Kim, Joo-Young
    • Journal of the Korean Society of Manufacturing Technology Engineers
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    • v.19 no.2
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    • pp.157-162
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    • 2010
  • This paper describes the thermal fatigue life prediction models for 95.5Sn-4.0Ag-0.5Cu solder joints of Flip chip package considering Under Bump Metallurgy(UBM). A 3D Finite element slice model was used to simulate the viscoplastic behavior of the solder. For two types of solder bump pitches, simulations were analyzed and the effects of underfill packages were studied. Consequently, it was found out that solder joints with underfill had much better fatigue life than solder joints without underfill, and solder joints with $300{\mu}m$ bump pitch had a longer thermal fatigue life than solder joints with $150{\mu}m$ bump pitch. Through the simulations, flip chip with lead-free solder joints should be designed with underfill and a longer bump pitch.

The Effects of the reflow number in the Mechanical Reliability of Flip Chip Solder Joint (리플로우 횟수에 따른 플립칩 접합부의 기계적 특성 평가)

  • Park, Jin-Seok;Yang, Gyeong-Cheon;Han, Seong-Won;Sin, Yeong-Ui
    • Proceedings of the KWS Conference
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    • 2007.11a
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    • pp.254-256
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    • 2007
  • In this paper, the effects of the reflow number in the mechanical reliability of flip chip solder joint was investigated by flip chip shear test and thermal shock test. For evaluation mechanical reliability of flip chip, We experiment that specimens were operated 3-times, 6-times, 9-times, 12-times under reflow Process. After shear test and thermal shock test, We measured max shear strength and coming first crack number of thermal cycle. And We observe fracture surface and cross section by using SEM(Scanning Electron Microscope) and optical scope. In the results, the more specimens were operated reflow process, the more decreased maximum shear strength and number of thermal cycle.

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Vision chip for edge detection with a function of pixel FPN reduction (픽셀의 고정 패턴 잡음을 감소시킨 윤곽 검출용 시각칩)

  • Suh, Sung-Ho;Kim, Jung-Hwan;Kong, Jae-Sung;Shin, Jang-Kyoo
    • Journal of Sensor Science and Technology
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    • v.14 no.3
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    • pp.191-197
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    • 2005
  • When fabricating a vision chip, we should consider the noise problem, such as the fixed pattern noise(FPN) due to the process variation. In this paper, we propose an edge-detection circuit based on biological retina using the offset-free column readout circuit to reduce the FPN occurring in the photo-detector. The offset-free column readout circuit consists of one source follower, one capacitor and five transmission gates. As a result, it is simpler and smaller than a general correlated double sampling(CDS) circuit. A vision chip for edge detection has been designed and fabricated using $0.35\;{\mu}m$ 2-poly 4-metal CMOS technology, and its output characteristics have been investigated.