• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2002년도 추계기술심포지움논문집
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• pp.39-47
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• 2002

Heat is always the root of stress acting upon the electronic package, regardless of the heat due to the device itself during operation or working under the adverse environment. Due to the significant mismatch in coefficient of thermal expansion (CTE) and the thermal conductivity (K) of the packaging components, on one hand intensive research has been conducted in order to enhance the device reliability by minimizing the mechanical stressing and deformation within the package. On the other hand the effectiveness of different thermal enhancements are pursued to dissipate the heat to avoid the overheating of the device. However, the interactions between the thermal-mechanical loading has not yet been address fully. in articular when the temperature gradient is considered within the package. To address the interactions between the thermal loading upon the mechanical stressing condition. coupled-field analysis is performed to account the interaction between the thermal and mechanical stress distribution. Furthermore, process induced defects are also incorporated into the analysis to determine the effects on thermal conducting path as well as the mechanical stress distribution. It is concluded that it feasible to consider the thermal gradient within the package accompanied with the mechanical analysis, and the subsequent effects of the inherent defects on the overall structural integrity of the package are discussed.

• 경영과학
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• 제10권2호
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• pp.79-91
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• 1993

Strategic decisions related to the design of a physical distribution system can be classified into three basic components : facility location, transportation, inventory decisions. In this research the interdependence of those decisions are expressed in a mathematical model such that the total relevant cost of the system is minimized. We suggested a heuristic technique for solving the model. In broad terms, our solution technique combines a heuristic method for determining which candidate DCs to open and an exact method for minimizing costs given a set of open DCs. And we also developed a decision supporting package for the design of a physical distribution system.

• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2001년도 추계 기술심포지움
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• pp.111-114
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• 2001

Optical transmitter and receiver are the essential components for optical communication. For these components, butterfly type packages are used which are comprised of metal housing, multilayer ceramic inserts, lead and window. In this study, 2.5 Gbps DFB(Distributed -Feedback) LD(Laser Diode) package was fabricated and characterized. Metal housing showed good thermal conductivity (200W/mK) and well matched TCE(6.7ppm/K) with GaAs chip. Ceramic inserts also showed good VSWR(Voltage Standing Wave Ratio) characteristics(<2.0). By brazing technology, all the elements were combined and sealed. RF characteristics of the package mounted on the PWB was also tested.

• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2003년도 International Symposium
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• pp.93-100
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• 2003

The continuing scaling trend in microelectronic circuit technology has a significant impact on the different IC interconnection and packaging technologies. These latter technologies have not kept pace with the IC scaling trends, resulting in a so-called“interconnect technology gap”. Multilayer thin film technology is proposed as a“bridge”- technology between the very high density IC technology and the coarse standard PCB technology. It is also a key enabling technology for the realisation of true“System-in-a-Package”(SIP) solutions, combining multiple“System-on-a-Chip”(SOC) IC's with other components and also integrating passive components in its layers. A further step is to use this technology to realise new functionalities on top of active wafers. These additional“above-IC”processed layers may e.g. be used for low loss, high speed on chip interconnects, clock distribution circuits, efficient power/ground distribution and to realize high Q inductors on chip.

• 마이크로전자및패키징학회지
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• 제20권4호
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• pp.75-79
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• 2013

A power distribution network (PDN) is a network that provides connection between the voltage source supply and the power/ground terminals of a microprocessor chip. It consists of a voltage regulator module, a printed circuit board, a package substrate, a microprocessor chip as well as decoupling capacitors. For power integrity analysis, the board and package layouts have to be transformed into an electrical network of resistor, inductor and capacitor components which may be expressed using the S-parameters models. This modeling process generally takes from several hours up to a few days for a complete board or package layout. When the board and package layouts change, they need to be re-extracted and the S-parameters models also need to be re-generated for power integrity assessment. This not only consumes a lot of resources such as time and manpower, the task of PDN modeling is also tedious and mundane. In this paper, a block-based PDN modeling is proposed. Here, the board or package layout is partitioned into sub-blocks and each of them is modeled independently. In the event of a change in power rails routing, only the affected sub-blocks will be reextracted and re-modeled. Simulation results show that the proposed block-based PDN modeling not only can save at least 75% of processing time but it can, at the same time, keep the modeling accuracy on par with the traditional PDN modeling methodology.

• 천문학회보
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• 제43권2호
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• pp.57.2-57.2
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• 2018

In astronomical observation, sequential device control and real-time data processing are important to maximize observing efficiency. We have developed series of automatic observing software (KAOS, KHU Automatic Observing Software), e.g. KAOS30 for the 30 inch telescope in the McDonald Observatory and KAOS76 for the 76 cm telescope in the KHAO. The series consist of four packages: the DAP (Data Acquisition Package) for CCD Camera control, the TCP (Telescope Control Package) for telescope control, the AFP (Auto Focus Package) for focusing, and the SMP (Script Mode Package) for automation of sequences. In this poster, we introduce KAOS10 which is being developed for controlling a small telescope such as aperture size of 10 cm. The hardware components are the QHY8pro CCD, the QHY5-II CMOS, the iOptron CEM 25 mount, and the Stellarvue SV102ED telescope. The devices are controlled on ASCOM Platform. In addition to the previous packages (DAP, SMP, TCP), KAOS10 has QLP (Quick Look Package) and astrometry function in the TCP. QHY8pro CCD has RGB Bayer matrix and the QLP transforms RGB images into BVR images in real-time. The TCP includes astrometry function which adjusts the telescope position by comparing the image with a star catalog. In the future, We expect KAOS10 be used on the research of transient objects such as a variable star.

• 한국전자거래학회지
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• 제7권1호
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• pp.129-140
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• 2002

To succeed in ERP construction, the purpose of ERP setup must be completed. To accomplish this end, it is required to analysis business process completely and make a plan in detail. For ERP providers', they must support a characterized ERP construction methodology and lower the construction cost by improving an ERP package by making it easy to customize. But, because imported EHP products that are supplied currently are designed for the standard and the rationality, they have a limit to support custom processes of domestic companies. On the contrary, ERP products by domestic companies are unable to support a consistent methodology of constructing ERP system. This is a main reason why much time and costs are consumed than that of an original plan. For solving the problems, ERP packages should provide a consistent process modeling methodology and a modeling tool which can support this methodology. Furthermore, customizing cost must be lowered by implementing reusable components from the process models. This Paper describes a component-based ERP Package system which has peculiar modeling tools and development tools. We describe the modeling methodology and the business component definition of the ERP system. Finally, we describe its customizing process based on these process designs and business components.

• 한국항해항만학회지
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• 제27권2호
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• pp.217-221
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• 2003

본 논문에서는 새로운 형태의 CSP (chip site package)를 이용하여 정합소자 린 바이어스소자를 MMIC상에 완전집적한 Ku/K밴드 광대역 증폭기 MMIC에 관하여 보고한다. 새로운 형태의 CSP에 대해서는 이방성 도전필름인 ACF (anisotropic conductive film)을 이용하였으며, 그 결과 MMIC 패키지 프로세스가 간략화 되었고, CSP MMIC의 저 가격화가 실현되었다. MMIC상에 집적하기 위한 DC 바이어스 용량소자로서는 고유전율의 STO (SrTiO3) 필름 커패시터가 이용되었다. 제작된 CSP MMIC는 광대역 RF동작특성 (12-24 GHz에서 12.5$\pm$1.5 dB의 이득치, -6 dB이하의 반사계수, 18.5$\pm$1.5 dBm의 PldB) 을 보였다. 본 논문은 K 또는 Ku 밴드의 주파수대역에 있어서의 완전집적화 CSP MMIC에 관한 최초의 보고이다.

• 한국군사과학기술학회지
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• 제14권3호
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• pp.388-396
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• 2011

Mission Equipment Package(MEP) system is a collection of avionic components that are integrated to perform the mission of the Korean Utility Helicopter(KUH). MEP system development is classified mission-critical embedded system but KUH MEP system developed including flight-critical data implementation. It is important to establish the good development and verification process for the successful system development. This paper describe the development and verification process in each phase for the KUH MEP system. MEP system design is verified through the qualification test, system failure test and compatibility test in System Integration Laboratory(SIL).

• JSTS:Journal of Semiconductor Technology and Science
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• 제1권4호
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• pp.216-231
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• 2001

Several methods for improving device yields and characteristics have been studied by IC manufacturers, as the options for programming components become diversified through the introduction of novel processes. Especially, the sequential repair steps on wafer level and package level are essentially required in DRAMs to improve the yield. Several repair methods for DRAMs are reviewed in this paper. They include the optical methods (laser-fuse, laser-antifuse) and the electrical methods (electrical-fuse, ONO-antifuse). Theses methods can also be categorized into the wafer-level(on wafer) and the package-level(post-package) repair methods. Although the wafer-level laser-fuse repair method is the most widely used up to now, the package-level antifuse repair method is becoming an essential auxiliary technique for its advantage in terms of cost and design efficiency. The advantages of the package-level antifuse method are discussed in this paper with the measured data of manufactured devices. With devices based on several processes, it was verified that the antifuse repair method can improve the net yield by more than 2%~3%. Finally, as an illustration of the usefulness of the package-level antifuse repair method, the repair method was applied to the replica delay circuit of DLL to get the decrease of clock skew from 55ps to 9ps.