• The Transactions of the Korean Institute of Power Electronics
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• v.8 no.1
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• pp.89-97
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• 2003

High frequency common mode voltage produced by PWM inverter fed Induction motor is a major cause of conducted EMI, creation motor ground currents, bearing currents and other harmful products. The zero switching states of inverter control invoke large in comparison with the non-zero switching state of Inverter control. We proposed a common mode voltage reduction method based on sinusoidal PWM technique. PWM signal are generated by comparing respective sinusoidal reference signal with three triangular carrier wave displaced of 120$^{\circ}$. Simulation and experimenta1 result show that common mode voltages in the proposed PWM technique are reduced by approximate 66% more than conventional FWM technique.

• Journal of Power Electronics
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• v.12 no.4
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• pp.548-558
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• 2012

In this paper, a novel offset-based single-state pulse width modulation (PWM) method for achieving zero common-mode voltage (CMV) and reducing switching losses in multilevel inverters is presented. The specific active switching state of the zero common-mode (ZCM) voltage that approximates the reference voltage can be deduced from the switching state sequence of the reduced CMV phase disposition PWM (CMV PD PWM) method. From the reference leg voltages for the zero common-mode voltage, an N-to-2-level transformation defines a virtual two-level inverter and the corresponding nominal leg voltage references. The commutation process of the reduced CMV PD PWM method in a multilevel inverter and its outputs can be simply followed in a nominal switching time diagram for the virtual inverter. The characteristics of the reduced CMV PD PWM and the single-state PWM for zero common-mode voltage are analyzed in detail in this paper. The theoretical analysis of the proposed PWM method is verified by experimental results.

• Proceedings of the KIPE Conference
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• 1998.10a
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• pp.171-175
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• 1998

This paper proposes the advanced PWM method that can reduce common-mode voltage in three-phase PWM converter-inverter system. By the proper distribution of the zero-voltage vector of inverter, it is possible to cancel out a common-mode voltage pulse in a sampling period. Since the proposed PWM method maintains the effective-voltage vector, it does not affect the control performance of converter-inverter system. Without any extra hardware, overall common-mode voltage can be decreased by one-third compared with conventional PWM scheme.

• The Transactions of the Korean Institute of Power Electronics
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• v.19 no.6
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• pp.488-493
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• 2014

This paper presents a carrier-based pulse-width modulation(PWM) method for reducing the common-mode voltage of a three-level four-leg converter. The idea of the proposed PWM method is intuitive and easy to be implemented in digital signal processor-based converter control systems. On the basis of the analysis of space-vector PWM(SVPWM) and sinusoidal PWM(SPWM) switching patterns, the fourth leg pole voltage of the three-phase converter called "f leg pole voltage" is manipulated to reduce the common-mode voltage. To synthesize f leg pole voltage for the suppression of the common-mode voltage, positive and negative pole voltage references of f leg are calculated. An offset voltage is also deduced to prevent the distortion of a, b, and c phase voltages. The feasibility of the proposed PWM method is verified by simulation and experimental results. The common-mode voltage of the proposed PWM method in peak-to-peak value is 33% in comparison with that of the conventional SVPWM method. The transition number of the common-mode voltage is also reduced to 25%.

• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.2
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• pp.292-300
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• 2015

This paper proposes a high-efficiency, dual-mode PWM / linear buck converter with a wide-input range. The proposed converter was designed with a mode selector that can change the operation between PWM / linear mode by sensing a load current. The proposed converter operates in a linear mode during a light load and in PWM mode during a heavy load condition in order to ensure high efficiency. In addition, the mode selector uses a bit counter and a transmission gate designed to protect from a malfunction due to noise or a time-delay. Also, in conditions between $-40^{\circ}C$ and $140^{\circ}C$, the converter has variations in temperature of $0.5mV/^{\circ}C$ in the PWM mode and of $0.24mV/^{\circ}C$ in the linear mode. Also, to prevent malfunction and breakdown of the IC due to static electricity, the reliability of IC was improved by embedding a self-produced 8 kV-class(Chip level) ESD protection circuit of a P-substrate Triggered SCR type with high robustness characteristics.

• Proceedings of the KIEE Conference
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• 2003.04a
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• pp.50-52
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• 2003

This paper presents characteristics analysis of brushless DC motor(BLDCM) which driven by two types of PWM mode. The phase current and torque ripples are generated differently at each PWM mode. So they have a different influence on motor characteristics. In this paper, we have analyzed characteristics of BLDCM using time-stepped voltage source finite element method. The effect of two types of PWM mode had been confirmed by comparing each phase current and torque ripple waveform. The compared simulation result is useful to select a better PWM mode.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.48 no.2
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• pp.89-96
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• 1999

This paper proposes a common-mode voltage reduction method base on SVPWM(Space-Vector Pulsewidth Modulation) in three phase PWM converter/inverter system. By shifting the active voltage vector of inverter and aligning this to the active vector of converter, it is possible to eliminate a common-mode voltage pulse in one control period. Since the proposed PWM method maintains the active voltage vector, it does not affect the control performance of PWM converter/inverter system. Without any extra hardware, overall common mode voltage dv/dt and conrresponding leakage current can be reduced to two-third of the conventional three phase symmetric SVPWM scheme.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.21 no.4
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• pp.289-295
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• 2008

In this paper, we designed the off-line PWM(Pulse width modulation) control IC for flyback type power converter to reduce the standby power consumption. In normal state, this off-line PWM IC generates the output pulse with $40\sim60kHz$ frequency and duty ratio of $20\sim88%$. When SMPS operates in standby mode, this IC generates the output pulse with 33kHz frequency and duty ratio of 1 %. SPICE simulation was performed to verify the standby power consumption of the power converter with designed of-line PWM IC. Power converter with designed off-line PWM IC consumes less than 0.3W when it operates in standby mode condition.

• The Transactions of the Korean Institute of Power Electronics
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• v.6 no.5
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• pp.423-431
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• 2001

This paper proposes a new active common-mode voltage damper circuit that is capable of suppressing a common-mode voltage produced in the PWM VSI-fed induction motor drives. The new active common mode voltage damper is consists of a four-level half-bridge Inverter and a common mode transformer with a blocking capacitor. In order to reduce the common mode voltage and high frequency leakage current the active common mode damper applies to the PWM inverter system the compensated voltage of which the amplitude is the same as the common mode voltage and of which the polarity is opposite to the common mode voltage. Simulated using P-SPICE and experimental results show that common-mode voltage damper makes contributions to reducing a high frequency leakage current and common-mode voltage.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.14 no.5
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• pp.66-73
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• 2000

A new modified command voltage of the third harmonics injected PWM inverter is proposed to control the inverter in overmodulation mode. The third harmonics injected PWM has a extended linear region compared with the sine PWM. But it still has a maximum voltage about 90% compared with the six step inverter. By analyzing the relationship between the modulation index and the peak of the fundamental component of the modified reference voltage, we can settle the problem in over modulation mode without iteration. Then we can increase the maximum fundamental component of the third harmonics injected PWM inverter comparative to six-step inverter continuously in over modulation mode. The simulation results of the inverter-induction motor system shows the validity of this method.