• The Transactions of the Korean Institute of Power Electronics
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• v.20 no.4
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• pp.344-350
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• 2015

A battery management system requires accurate information on the battery state of charge (SOC) to achieve efficient energy management of electric vehicle and renewable energy systems. Although correct SOC estimation is difficult because of the changes in the electrical characteristics of the battery attributed to ambient temperature, service life, and operating point, various methods for accurate SOC estimation have been reported. On the basis of piecewise linear (PWL) modeling technique, this paper proposes a simple SOC observer for lithium-polymer batteries. For performance evaluation, the SOC estimated by the PWL SOC observer, the SOC measured by the battery-discharging experiment and the SOC estimated by the extended Kalman filter (EKF) estimator were compared through a PSIM simulation study.

• Transactions of the Korean Society of Mechanical Engineers
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• v.11 no.3
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• pp.519-527
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• 1987

Simple procedures have been formulated to compute approximate natural frequency of nonlinear systems by the use of variational principle. These procedures are applicable to motion of large amplitudes, even to systems which are not linearizable. The results obtained by these procedures have been found to have good agreements with computer solutions and exact solutions for systems having piece-wise linear springs and polynomial springs.

• ETRI Journal
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• v.31 no.2
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• pp.209-214
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• 2009

In this paper, we propose a novel test methodology for the detection of catastrophic and parametric faults present in analog very large scale integration circuits. An automatic test pattern generation algorithm is proposed to generate piece-wise linear (PWL) stimulus using wavelets and a genetic algorithm. The PWL stimulus generated by the test algorithm is used as a test stimulus to the circuit under test. Faults are injected to the circuit under test and the wavelet coefficients obtained from the output response of the circuit. These coefficients are used to train the neural network for fault detection. The proposed method is validated with two IEEE benchmark circuits, namely, an operational amplifier and a state variable filter. This method gives 100% fault coverage for both catastrophic and parametric faults in these circuits.

• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.368-371
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• 1999

In this paper, we propose a neural network processor architecture with on-chip learning and with reconfigurability according to the data dependencies of the algorithm applied. For the neural network model applied, the proposed architecture can be configured into either SIMD or SRA(Systolic Ring Array) without my changing of on-chip configuration so as to obtain a high throughput. However, changing of system configuration can be controlled by user program. To process activation function, which needs amount of cycles to get its value, we design it by using PWL(Piece-Wise Linear) function approximation method. This unit has only single latency and the processing ability of non-linear function such as sigmoid gaussian function etc. And we verified the processing mechanism with EBP(Error Back-Propagation) model.