• Journal of Powder Materials
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• v.30 no.6
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• pp.502-508
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• 2023

With the increasing demand for electronic products, the amount of multilayer ceramic capacitor (MLCC) waste has also increased. Recycling technology has recently gained attention because it can simultaneously address raw material supply and waste disposal issues. However, research on recovering valuable metals from MLCCs and converting the recovered metals into high-value-added materials remains insufficient. Herein, we describe an electrospinning (E-spinning) process to recover nickel from MLCCs and modulate the morphology of the recovered nickel oxide particles. The nickel oxalate powder was recovered using organic acid leaching and precipitation. Nickel oxide nanoparticles were prepared via heat treatment and ultrasonic milling. A mixture of nickel oxide particles and polyvinylpyrrolidone (PVP) was used as the E-spinning solution. A PVP/NiO nanowire composite was fabricated via E-spinning, and a nickel oxide nanowire with a network structure was manufactured through calcination. The nanowire diameters and morphologies are discussed based on the nickel oxide content in the E-spinning solution.

• Journal of Adhesion and Interface
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• v.24 no.4
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• pp.120-123
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• 2023

Graphene, with its exceptional mechanical and electrical properties, has gained significant attention from researchers due to its superior characteristics compared to conventional materials. However, the application of graphene in electronic devices requires a crucial transcription and patterning process, which often introduces numerous defects, substantially impairing its properties. To overcome this limitation and unlock the full potential of graphene for commercial use, there have been various efforts to develop integrated processes for transcription and patterning. In this study, we present a novel growth method that simultaneously achieves precise patterning using polymer nanowires as masks, allowing for the direct growth of graphene. This innovative approach holds promise for realizing advanced electronic components based on nanomaterials in the future.

• Proceedings of the Materials Research Society of Korea Conference
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• 2008.05a
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• pp.25.1-25.1
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• 2008

• Journal of the Korean institute of surface engineering
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• v.50 no.6
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• pp.455-459
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• 2017

The development of flexible transparent electrode has been paid attention for flexible electronics. In this study, we have developed transparent electrode based on silver nanowires with improved electrical property and stability through ion-beam treatment. The energetic particles of ion-beam could sinter junctions of each silver nanowires and etch out polyvinylpyrollidone(PVP) coated on silver nanowires. The sheet resistance of silver nanowire transparent electrode was reduced by 74%, and the resistance uniformity was increased about 3 times after exposure of ion beam. Moreover, the stability at $85^{\circ}C$ of temperature and 85% of relative humidity could be also improved.

• Korean Journal of Materials Research
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• v.21 no.2
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• pp.115-119
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• 2011

Si Nanowire (NW) field effect transistors (FETs) were fabricated on hard Si and flexible polyimide (PI) substrates, and their electrical characteristics were compared. Si NWs used as channels were synthesized by electroless etching method at low temperature, and these NWs were refined using a centrifugation method to get the NWs to have an optimal diameter and length for FETs. The gate insulator was poly(4-vinylphenol) (PVP), prepared using a spin-coating method on the PI substrate. Gold was used as electrodes whose gap was 8 ${\mu}m$. These gold electrodes were deposited using a thermal evaporator. Current-voltage (I-V) characteristics of the device were measured using a semiconductor analyzer, HP-4145B. The electrical properties of the device were characterized through hole mobility, $I_{on}/I_{off}$ ratio and threshold voltage. The results showed that the electrical properties of the TFTs on PVP were similar to those of TFTs on $SiO_2$. The bending durability of SiNWs TFTs on PI substrate was also studied with increasing bending times. The results showed that the electrical properties were maintained until the sample was folded about 500 times. But, after more than 1000 bending tests, drain current showed a rapid decrease due to the defects caused by the roughness of the surface of the Si NWs and mismatches of the Si NWs with electrodes.

• Korean Journal of Materials Research
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• v.22 no.10
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• pp.562-568
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• 2012

Metal nanowires can be coated on various substrates to create transparent conducting films that can potentially replace the dominant transparent conductor, indium tin oxide, in displays, solar cells, organic light-emitting diodes, and electrochromic windows. One issue with these metal nanowire based transparent conductive films is that the resistance between the nanowires is still high because of their low aspect ratio. Here, we demonstrate high-performance transparent conductive films with silver nanofiber networks synthesized by a low-cost and scalable electrospinning process followed by two-step sequential thermal treatments. First, the PVP/$AgNO_3$ precursor nanofibers, which have an average diameter of 208 nm and are several thousands of micrometers in length, were synthesized by the electrospinning process. The thermal behavior and the phase and morphology evolution in the thermal treatment processes were systematically investigated to determine the thermal treatment atmosphere and temperature. PVP/$AgNO_3$ nanofibers were transformed stepwise into PVP/Ag and Ag nanofibers by two-step sequential thermal treatments (i.e., $150^{\circ}C$ in $H_2$ for 0.5 h and $300^{\circ}C$ in Ar for 3 h); however, the fibrous shape was perfectly maintained. The silver nanofibers have ultrahigh aspect ratios of up to 10000 and a small average diameter of 142 nm; they also have fused crossing points with ultra-low junction resistances, which result in high transmittance at low sheet resistance.

• Proceedings of the Materials Research Society of Korea Conference
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• 2011.10a
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• pp.22.2-22.2
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• 2011

Si 나노와이어를 합성하는 다양한 방법들 중에서 Si 기판을 나노와이어 형태로 제작하는 무전해 식각법은 쉽고 간단하기 때문에 최근 많은 연구가 진행되고 있다. 무전해 식각법을 이용한 Si 나노와이어는 p 또는 n형의 전기적 특성을 갖는 Si 기판의 도핑농도에 따라 원하는 전기적 특성을 갖는 나노와이어를 얻을 수 있을 것이라는 기대가 있었지만 n형으로 제작된 나노와이어의 경우 식각에 의한 표면의 거칠기 때문에 그 특성을 나타내지 못하는 문제점을 가지고 있다. 본 연구에서는 무전해 식각법을 이용하여 p와 n형 나노와이어를 합성하고 field-effect transistors (FETs) 소자를 제작하여 각각의 특성을 구현하였다. 나노와이어와 절연막 사이의 계면 결함을 최소화하기 위하여 poly-4-vinylphenol (PVP) 고분자 절연막에 나노와이어를 삽입시킨 형태로 소자를 제작하였고, 특히 n형 나노와이어의 표면을 보다 평평하게 하기 위하여 열처리를 진행 하였다. 이렇게 각각의 특성이 구현된 나노와이어를 이용하여 soft-lithography 공정을 통해 complementary metal-oxide semiconductor (CMOS) 구조의 인버터 소자를 제작하였으며 그 전기적 특성을 평가하였다.

• Proceedings of the Materials Research Society of Korea Conference
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• 2012.05a
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• pp.79.1-79.1
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• 2012

Si 기판을 무전해 식각하여 나노와이어 형태로 합성하는 방법은 쉽고 간단하기 때문에 이를 이용한 소자 특성 연구가 많이 진행되고 있다. 하지만 이러한 방법으로 제작된 Si 나노와이어의 경우 식각에 의하여 나노와이어 표면이 매우 거칠어지기 때문에 고유의 특성을 나타내기 어려워 표면 특성을 제어 할 수 있는 연구의 필요성이 대두되고 있다. 본 연구에서는 무전해 식각법을 이용하여 p와 n형 나노와이어를 각각 합성하고 그 특성을 구현하기 위하여 표면조절을 진행하였다. 특히 n형 나노와이어의 경우 표면의 OH- 이온으로 인하여 n채널 특성이 제대로 나타나지 않기 때문에 열처리를 이용하여 표면을 보다 평평한 형태로 조절하여 향상된 전기적 특성을 얻을 수 있었다. 여기에 나노와이어와 절연막 사이의 계면 결함을 최소화 하기 위하여 poly-4-vinylphenol (PVP) 고분자 절연막에 나노와이어를 삽입시켜 나노와이어의 문턱전압 값을 조절하였다. 이를 바탕으로 complementary metal-oxide semiconductor(CMOS) 구조의 인버터 소자를 제작하였으며 p형 나노와이어가 절연막에 삽입된 정도에 따라 인버터의 midpoint voltage 값을 조절 할 수 있었다.

• Proceedings of the Materials Research Society of Korea Conference
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• 2011.05a
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• pp.35.2-35.2
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• 2011

나노와이어를 제작하는 많은 방법들 중에서 실리콘 기판을 무전해식각하여 실리콘 나노와이어를 제작하는 방법은 쉽고 간단하기 때문에 최근 많은 연구가 진행되고 있다. 무전해식각법을 이용한 실리콘 나노와이어 합성은 단결정 실리콘 나노와이어를 합성할 수 있고, p 또는 n형의 도핑 정도에 따라 원하는 전기적 특성의 기판을 선택하여 제작할 수 있다는 장점을 가지고 있다. 하지만 n형으로 도핑된 기판으로 나노와이어를 제작하였을 경우 식각으로 인한 나노와이어 표면의 거칠기로 인하여, 실제로는 n형 반도체 특성을 나타내지 않는 문제점을 가지고 있다. 따라서 본 연구에서는 무전해식각법으로 합성한 n형 나노와이어의 거칠기를 조절하고 filed-effect transistor (FET) 소자를 제작하여 나노와이어의 전기적 특성변화를 확인하였다. n형 나노와이어의 거칠기를 조절하기 위하여 열처리를 통해 표면을 산화시켰고, 열처리 시간에 따른 나노와이어 FET 소자를 제작하여 I-V 특성을 관찰하였다. 이때 절연막과 나노와이어 계면 사이의 결함을 최소화 하기 위하여 나노와이어를 poly-4-vinylphenol (PVP) 고분자 절연막에 부분 삽입시켰다. 나노와이어 표면의 거칠기는 high-resolution transmission electron microscopy (HRTEM)을 통하여 확인하였으며, 전기적 특성은 Ion/Ioff ratio, 이동도, subthreshold swing, threshold voltage 값 등을 평가하였다.