• 한국표면공학회지
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• 제25권3호
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• pp.107-116
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• 1992

The optimum thickness of Pd-Ni plated layers used as an electrical contact film was investigated by evaluating mechanical, thermal and environmental characteristics. The variations of morphologies and chemical compositions were studied by using SEM, EDS and ESCA. As a result of wear test, the wear resistance behavior of the gold plated layers was not changed with the sliding velocity changes. The palladium-nickel plated layer showed better wear resistance than the gold plated layer at low sliding velocity, but it showed poor wear resistance at high sliding velocity. Under the thermal condition of $400^{\circ}C$ in air, the gold thickness of $2\mu\textrm{m}$ without underplate on phosphorous bronze formed copper oxide on the surface layer by rapid diffusion of copper whereas the gold thickness of $0.8\mu\textrm{m}$ deposited on nickel and palladium-nickel underplate was stable at $400^{\circ}C$. Under the sulfur dioxide environments, the gold thickness of $0.3\mu\textrm{m}$ deposited on the nickel thickness of$ 3\mu\textrm{m}$ and the palladium-nickel thickness of $2\mu\textrm{m}$ underplate was more corrosion-resistant than the gold thickness of $2\mu\textrm{m}$ without underplate on phosphorous bronze. Under the nitric acid vapor environment, corrosion resistance of the gold film was superior to an equivalent thickness of the palladium-nickel film.

• 한국표면공학회지
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• 제32권3호
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• pp.389-392
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• 1999

We employed cobalt-disilicide for high-speed logic devices. We prepared stable and low resistant $CoSi_2$ through typical fabrication process including wet cleaning and rapid thermal process (RTP). We sputtered 15nm thick cobalt on the wafer and performed RTP annealing 2 times to obtain 60nm thick $CoSi_2$. We observed spherical shape voids with diameter of 40nm in the surface and inside $CoSi_2$ layers. The voids resulted in taking over abnormal junction leakage current and contact resistance values. We report that the voids in $CoSi_2$ layers are resulted from surface pits during the ion implantation previous to deposit cobalt layer. Silicide reaction rate around pits was enhanced due to Gibbs-Thompson effects and the volume expansion of the silicidation of the flat active regime trapped dimples. We confirmed that keeping the buffer oxide layer during ion implantation and annealing the silicon surface after ion implantation were required to prevent void defects in CoSi$_2$ layers.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2013년도 제44회 동계 정기학술대회 초록집
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• pp.277-277
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• 2013

The epitaxial graphene on the 4H- or 6H-SiC(0001) surface has been intensively studied due to the possibility of wafer-scale growt. However the existence of interface layer (zero layer graphene) and its influence on the upper graphene layer have been considered as one of the main obstarcles for the industrial application. Among various methods tried to overcome the strong interaction with the substrate through the interface layer, it has been proved that the hydrogen intercalation successfully passivate the Si dangling bond of the substrate and can produce the quasi-free standing epitaxial graphene (QFEG) layers on the siC(0001) surface. In this study, we report the results of the angle-resolved photoemission spectroscopy (ARPES) and Raman spectroscopy for the QFEG layers produced by ex-situ and in-situ hydrogen intercalation.From the ARPES measurement, we confirmed that the Dirac points of QFEG layers exactly coincide with the Fermi level. The band structure of QFEG layer are sustainable upon thermal heating up to 1100 K and robust against the deposition of several metals andmolecular deposition. We also investigated the strain of the QFEG layers by using Raman spectroscopy measurement. From the change of the 2D peak position of graphene Raman spectrum, we found out that unlike the strong compressive strain in the normal epitaxial graphene on the SiC(0001) surface, the strain of the QFEG layer are significantly released and almost similar to that of the mechanically exfoliated graphene on the silicon oxide substrate. These results indicated that various ideas proposed for the ideal free-standing graphene can be tested based on the QFEG graphene layers grown on the SiC(0001) surface.

• 한국표면공학회지
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• 제42권1호
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• pp.21-25
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• 2009

Using an evaporation system, $SiO_2$ was deposited as a buffer layer between a PET substrate and a ITO layer and then ITO/$SiO_2$/PET layers were annealed for 1.5 hours at the temperature of $180^{\circ}C$. Adhesion and electro-optical properties of ITO films were studied with thickness variance of a $SiO_2$ buffer layer. As a result of introduction of the $SiO_2$ buffer layer, sheet resistance and resistivity increased and a ITO film with optimum sheet resistance ($529.3{\Omega}/square$) for an upper ITO film of resistive type touch panel could be obtained when $SiO_2$ of $50{\AA}$ was deposited. And it was found that ITO films with $SiO_2$ buffer layer have higher transmittance of $88{\sim}90%$ at 550 nm wavelength than ITO films with no buffer layers and the transmittance was enhanced as $SiO_2$ thickness increased from $50{\AA}$ to $100{\AA}$. Adhesion property of ITO films with $SiO_2$ buffer layers became better than ITO films with no buffer layers and this property was independent of $SiO_2$ thickness variance ($50{\sim}100{\AA}$). By depositing a $SiO_2$ buffer layer of $50{\AA}$ on the PET substrate and sputtering a ITO thin film on the layer, a ITO film with enhanced adhesion, electro-optical properties could be obtained.

• 대한기계학회논문집B
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• 제39권5호
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• pp.463-469
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• 2015

산화그래핀 소재를 합성하여 투명한 박막 코팅기술을 개발하고 특성을 평가하였다. 스핀과 스프레이 공정을 동시에 이용하여 산화그래핀을 유리 기판에 균일하게 박막코팅을 하였다. 균일하게 산화그래핀을 스핀-스프레이 공정을 이용하여 박막코팅을 하기 위하여 유리기판을 amine-functional group으로 표면개질을 하였다. 또한, 스핀-스프레이 공정을 이용하여 산화그래핀 박막을 4층까지 적층을 하였고 86% 이상의 투명도를 확보하였다. 이와 같은 합성된 산화그래핀 박막소재의 스핀-스프레이 코팅 기술은 다양한 전자제품들의 display를 대면적으로 코팅할 수 있을 것으로 기대되어진다.

• 대한금속재료학회지
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• 제48권1호
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• pp.49-56
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• 2010

This study investigated how the surface of Al-12wt.%Si alloy modified by the plasma electrolytic oxidation process (PEO). The PEO process was performed in an electrolyte with sodium hexametaphsphate as a conducting salt, and the effect of ammonium metavanadate on variations in the morphology of electrochemically generated oxide layers on the alloy surface was investigated. It is difficult to form a uniform passive oxide layer on Al alloys with a high Si content due to the differences in the oxidation behavior of the silicon-rich phase and the aluminum-rich phase. The oxide layer covered the entire surface of the Al-12WT.%Si alloy uniformly when ammonium metavanadate was added to the electrolyte. The oxide layer was confirmed as a mixture of $V_2O_3$ and $V_2O_5$ by XPS analysis. In addition, the oxide layer obtained by the PEO process with ammonium metavanadate exhibited a black color. Application of this surface modification method is expected to solve the problem of the lack of uniformity in the coloring of oxide layeres caused by different oxidation behaviors during a surface treatment.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제43회 하계 정기 학술대회 초록집
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• pp.222-222
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• 2012

Metal oxide gas sensors based on semiconductor type have attracted a great deal of attention due to their low cost, flexible production and simple usability. However, most works have been focused on n-type oxides, while the characteristics of p-type oxide gas sensors have been barely studied. An investigation on p-type oxides is very important in that the use of them makes possible the novel sensors such as p-n diode and tandem devices. Monoclinic cupric oxide (CuO) is p-type semiconductor with narrow band gap (~1.2 eV). This is composed of abundant, nontoxic elements on earth, and thus low-cost, environment-friendly devices can be realized. However, gas sensing properties of neat CuO were rarely explored and the mechanism still remains unclear. In this work, the neat CuO layers with highly ordered mesoporous structures were prepared by a template-free, one-pot solution-based method using novel ink solutions, formulated with copper formate tetrahydrate, hexylamine and ethyl cellulose. The shear viscosity of the formulated solutions was 5.79 Pa s at a shear rate of 1 s-1. The solutions were coated on SiO2/Si substrates by spin-coating (ink) and calcined for 1 h at the temperature of $200{\sim}600^{\circ}C$ in air. The surface and cross-sectional morphologies of the formed CuO layers were observed by a focused ion beam scanning electron microscopy (FIB-SEM) and porosity was determined by image analysis using simple computer-programming. XRD analysis showed phase evolutions of the layers, depending on the calcination temperature, and thermal decompositions of the neat precursor and the formulated ink were investigated by TGA and DSC. As a result, the formation of the porous structures was attributed to the vaporization of ethyl cellulose contained in the solutions. Mesoporous CuO, formed with the ink solution, consisted of grains and pores with nano-meter size. All of them were strongly dependent on calcination temperature. Sensing properties toward H2 and C2H5OH gases were examined as a function of operating temperature. High and fast responses toward H2 and C2H5OH gases were discussed in terms of crystallinity, nonstoichiometry and morphological factors such as porosity, grain size and surface-to-volume ratio. To our knowledge, the responses toward H2 and C2H5OH gases of these CuO gas sensors are comparable to previously reported values.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 하계학술대회 논문집
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• pp.151-151
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• 2009

Recently, there has been increasing interest in amorphous oxide semiconductors to find alternative materials for an amorphous silicon or organic semiconductor layer as a channel in thin film transistors(TFTs) for transparent electronic devices owing to their high mobility and low photo-sensitivity. The fabriction of amorphous oxide-based TFTs at room temperature on plastic substrates is a key technology to realize transparent flexible electronics. Amorphous oxides allows for controllable conductivity, which permits it to be used both as a transparent semiconductor or conductor, and so to be used both as active and source/drain layers in TFTs. One of the materials that is being responsible for this revolution in the electronics is indium-zinc-tin oxide(IZTO). Since this is relatively new material, it is important to study the properties of room-temperature deposited IZTO thin films and exploration in a possible integration of the material in flexible TFT devices. In this research, we deposited IZTO thin films on polyethylene naphthalate substrate at room temperature by using magnetron sputtering system and investigated their properties. Furthermore, we revealed the fabrication and characteristics of top-gate-type transparent TFTs with IZTO layers, seen in Fig. 1. The experimental results show that by varying the oxygen flow rate during deposition, it can be prepared the IZTO thin films of two-types; One a conductive film that exhibits a resistivity of $2\times10^{-4}$ ohm${\cdot}$cm; the other, semiconductor film with a resistivity of 9 ohm${\cdot}$cm. The TFT devices with IZTO layers are optically transparent in visible region and operate in enhancement mode. The threshold voltage, field effect mobility, on-off current ratio, and sub-threshold slope of the TFT are -0.5 V, $7.2\;cm^2/Vs$, $\sim10^7$ and 0.2 V/decade, respectively. These results will contribute to applications of select TFT to transparent flexible electronics.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2010년도 하계학술대회 논문집
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• pp.11-11
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• 2010

Thin-film-transistors (TFTs) that can be deposited at low temperature have recently attracted lots of applications such as sensors, solar cell and displays, because of the great flexible electronics and transparent. Transparent and flexible transistors are being required that high mobility and large-area uniformity at low temperature [1]. But, unfortunately most of TFT structures are used to be $SiO_2$ as gate dielectric layer. The $SiO_2$ has disadvantaged that it is required to high driving voltage to achieve the same operating efficiency compared with other high-k materials and its thickness is thicker than high-k materials [2]. To solve this problem, we find lots of high-k materials as $HfO_2$, $ZrO_2$, $SiN_x$, $TiO_2$, $Al_2O_3$. Among the High-k materials, $Al_2O_3$ is one of the outstanding materials due to its properties are high dielectric constant ( ~9 ), relatively low leakage current, wide bandgap ( 8.7 eV ) and good device stability. For the realization of flexible displays, all processes should be performed at very low temperatures, but low temperature $Al_2O_3$ grown by sputtering showed deteriorated electrical performance. Further decrease in growth temperature induces a high density of charge traps in the gate oxide/channel. This study investigated the effect of growth temperatures of ALD grown $Al_2O_3$ layers on the TFT device performance. The ALD deposition showed high conformal and defect-free dielectric layers at low temperature compared with other deposition equipments [2]. After ITO was wet-chemically etched with HCl : $HNO_3$ = 3:1, $Al_2O_3$ layer was deposited by ALD at various growth temperatures or lift-off process. Amorphous InGaZnO channel layers were deposited by rf magnetron sputtering at a working pressure of 3 mTorr and $O_2$/Ar (1/29 sccm). The electrodes were formed with electron-beam evaporated Ti (30 nm) and Au (70 nm) bilayer. The TFT devices were heat-treated in a furnace at $300^{\circ}C$ and nitrogen atmosphere for 1 hour by rapid thermal treatment. The electrical properties of the oxide TFTs were measured using semiconductor parameter analyzer (4145B), and LCR meter.

• 한국재료학회:학술대회논문집
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• 한국재료학회 2012년도 춘계학술발표대회
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• pp.68.1-68.1
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• 2012

The best part of graphene is - charge-carriers in it are mass less particles which move in near relativistic speeds. Comparing to other materials, electrons in graphene travel much faster - at speeds of $10^8cm/s$. A graphene sheet is pure enough to ensure that electrons can travel a fair distance before colliding. Electronic devices few nanometers long that would be able to transmit charge at breath taking speeds for a fraction of power compared to present day CMOS transistors. Many researches try to check a possibility to make it a perfect replacement for silicon based devices. Graphene has shown high potential to be used as interconnects in the field of high frequency electrical devices. With all those advantages of graphene, we demonstrate characteristics of electrical and optical properties of graphene such as the effect of graphene geometry on the microwave properties using the measurements of S-parameter in range of 500 MHz - 40 GHz at room temperature condition. We confirm that impedance and resistance decrease with increasing the number of graphene layer and w/L ratio. This result shows proper geometry of graphene to be used as high frequency interconnects. This study also presents the optical properties of graphene oxide (GO), which were deposited in different substrate, or influenced by oxygen plasma, were confirmed using different characterization techniques. 4-6 layers of the polycrystalline GO layers, which were confirmed by High resolution transmission electron microscopy (HRTEM) and electron diffraction analysis, were shown short range order of crystallization by the substrate as well as interlayer effect with an increase in interplanar spacing, which can be attributed to the presence of oxygen functional groups on its layers. X-ray photoelectron Spectroscopy (XPS) and Raman spectroscopy confirms the presence of the $sp^2$ and $sp^3$ hybridization due to the disordered crystal structures of the carbon atoms results from oxidation, and Fourier Transform Infrared spectroscopy (FTIR) and XPS analysis shows the changes in oxygen functional groups with nature of substrate. Moreover, the photoluminescent (PL) peak emission wavelength varies with substrate and the broad energy level distribution produces excitation dependent PL emission in a broad wavelength ranging from 400 to 650 nm. The structural and optical properties of oxygen plasma treated GO films for possible optoelectronic applications were also investigated using various characterization techniques. HRTEM and electron diffraction analysis confirmed that the oxygen plasma treatment results short range order crystallization in GO films with an increase in interplanar spacing, which can be attributed to the presence of oxygen functional groups. In addition, Electron energy loss spectroscopy (EELS) and Raman spectroscopy confirms the presence of the $sp^2$ and $sp^3$ hybridization due to the disordered crystal structures of the carbon atoms results from oxidation and XPS analysis shows that epoxy pairs convert to more stable C=O and O-C=O groups with oxygen plasma treatment. The broad energy level distribution resulting from the broad size distribution of the $sp^2$ clusters produces excitation dependent PL emission in a broad wavelength range from 400 to 650 nm. Our results suggest that substrate influenced, or oxygen treatment GO has higher potential for future optoelectronic devices by its various optical properties and visible PL emission.