• International journal of advanced smart convergence
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• v.1 no.1
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• pp.61-64
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• 2012

The ultraviolet and visible light responsive properties of the amorphous indium gallium zinc oxide thin film transistor have been investigated. Amorphous indium gallium zinc oxide (a-IGZO) thin film transistor operate in the enhancement mode with saturation mobility of $6.99cm^2/Vs$, threshold voltage of 13.5 V, subthreshold slope of 1.58 V/dec and an on/off current ratio of $2.45{\times}10^8$. The transistor was subsequently characterized in respect of visible light and UV illuminations in order to investigate its potential for possible use as a detector. The performance of the transistor is indicates a high-photosensitivity in the off-state with a ratio of photocurrent to dark current of $5.74{\times}10^2$. The obtained results reveal that the amorphous indium gallium zinc oxide thin film transistor can be used to fabricate UV photodetector operating in the 366 nm.

• Journal of information and communication convergence engineering
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• v.8 no.4
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• pp.453-456
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• 2010

Tantalum oxide ($Ta_2O_5$) films are of considerable interest for a range of application, including optical waveguide devices, high temperature resistors, and oxygen sensors. In this paper, we establish an anode oxidation process of tantalum thin film. The voltage drop in the electrolyte is affected not in voltage change but in current change. If the voltage drop in the electrolyte is same with cathode oxidation voltage, the current changes logarithmically in proportion to the voltage drop in interface of tantalum oxide and electrolyte. As a result of the measurement on the electrical property of tantalum oxide thin film, when the thickness of the insulator film is $1500{\AA}$, the breakdown voltage is 350volts and dielectric constant is 29.

• Journal of the Korean institute of surface engineering
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• v.53 no.5
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• pp.249-256
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• 2020

As the size of manufacturing equipment for LCD and OLED displays increases, replacement of existing heavy stainless steel components with light metals, such as aluminum alloys, is being more important in semiconducting and display manufacturing industries. To use aluminum alloys for components in semiconducting and display industries, it is important to develop a new anodization method for improved performance of anodic oxide films than conventional anodization method based on sulfuric acid. In this work, optimum applied current density and the best sealing methods for anodic oxide films in 3% oxalic acid were explored. Experimental results showed 2.5 A/dm2 is the best applied current density for improved hardness and dielectric breakdown voltage. Sealing of the anodic oxide films further improved their hardness, dielectric breakdown voltage and resistance to HCl, by which application of anodic oxide films become applicable for components in semiconducting and display industries.

• New & Renewable Energy
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• v.17 no.1
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• pp.1-6
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• 2021

Transparent conducting oxide (TCO) films have been widely used in optoelectronic devices, such as OLEDs, TFTs, and solar cells. However, thin films of indium tin oxide (ITO) have few disadvantages pertaining to process parameters such as substrate temperature and sputtering power. In this study, we investigated the requirements for using TCO films in silicon-based solar cells and the best alternative TCO materials to improve their efficiency. Moreover, we discussed the current status of high-efficiency solar cells using low-temperature TCO films such as indium zinc oxide and Zr-doped indium oxide.

• Proceedings of the KIEE Conference
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• 1999.07d
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• pp.1931-1933
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• 1999

In this paper, the current and voltage properties on the gate oxide film due to the variation of thickness are studied. The specimen is used for n-ch power MOSFET. It is shows the leakage current and current density characteristics due to the applied electric field when the oxide thickness is each $600[\AA],\;800[\AA]$ and $1000[\AA]$, respectively. We known that the leakage current is a little higher when the voltage as reverse bias contrast with forward bias in poly gate is applied. In order to experiment for AC properties is measured for capacitance characteristics. It is confirmed that the value of input capacitance have been a lot of influenced on $SiO_2$ thickness contrast with the value of output capacitance.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.7 no.4
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• pp.719-724
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• 2003

In this paper, we have presented the simulation results about threshold voltage of nano scale lightly doped drain (LDD) MOSFET with halo doping profile. Device size is scaled down from 100nm to 40nm using generalized scaling. We have investigated the threshold voltage for constant field scaling and constant voltage scaling using the Van Dort Quantum Correction Model (QM) and direct tunneling current for each gate oxide thickness. We know that threshold voltage is decreasing in the constant field scaling and increasing in the constant voltage scaling when gate length is reducing, and direct tunneling current is increasing when gate oxide thickness is reducing. To minimize the roll off characteristics for threshold voltage of MOSFET with decreasing channel length, we know $\alpha$ value must be nearly 1 in the generalized scaling.

• Journal of the Korean Electrochemical Society
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• v.16 no.2
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• pp.70-73
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• 2013

Iridium oxide is well known as an electrocatalyst for the water oxidation. Recently, Dr. Bard's group observed the electrocatalytic behavior of individual nanoparticle of Iridium oxide using the electrochemical amplification method by detecting the single nanoparticle collisions at the ultramicroelectrode (UME). However, the electrocatalytic current is decayed as a function of time. In this study, we investigated that the reason of electrocatalytic current decay of water oxidation at Iridium oxide nanoparticles. We identified it is due to the bubble overpotential because the cyclic current decay and recovery were synchronized to the oxygen bubble growth and coming away from an Iridium disk electrode.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.13 no.9
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• pp.729-734
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• 2000

Recently, Very Large Scale Integrated (VLSI) circuit & deep-submicron bulk Complementary Metal Oxide Semiconductor(CMOS) devices require gate electrode materials such as metal-silicide, Titanium-silicide for gate oxides. Many previous authors have researched the improvement sub-micron gate oxide quality. However, few have reported on the electrical quality and reliability on the ultra thin gate oxide. In this paper, at first, I recommand a novel shallow trench isolation structure to suppress the corner metal-oxide semiconductor field-effect transistor(MOSFET) inherent to shallow trench isolation for sub 0.1${\mu}{\textrm}{m}$ gate oxide. Different from using normal LOCOS technology deep-submicron CMOS devices using novel Shallow Trench Isolation(STI) technology have a unique"inverse narrow-channel effects"-when the channel width of the devices is scaled down, their threshold voltage is shrunk instead of increased as for the contribution of the channel edge current to the total channel current as the channel width is reduced. Secondly, Titanium silicide process clarified that fluorine contamination caused by the gate sidewall etching inhibits the silicidation reaction and accelerates agglomeration. To overcome these problems, a novel Two-step Deposited silicide(TDS) process has been developed. The key point of this process is the deposition and subsequent removal of titanium before silicidation. Based on the research, It is found that novel STI structure by the SEM, in addition to thermally stable silicide process was achieved. We also obtained the decrease threshold voltage value of the channel edge. resulting in the better improvement of the narrow channel effect. low sheet resistance and stress, and high threshold voltage. Besides, sheet resistance and stress value, rms(root mean square) by AFM were observed. On the electrical characteristics, low leakage current and trap density at the Si/SiO$_2$were confirmed by the high threshold voltage sub 0.1${\mu}{\textrm}{m}$ gate oxide.

• Proceedings of the Korean Vacuum Society Conference
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• 1998.02a
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• pp.71-72
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• 1998

반도체 집적 공정의 발달로 차세대 소자용으로 30 A 이하의 극 박막 Si02 절연막이 요구되고 있으며, 현재 제품으로 50-70 A 두께의 절연막을 사용한 것이 발표되고 있다. 절연막의 두께가 앓아질수록 많은 문제가 발생할 수 있는데 그 예로 절연막의 breakdo때둥에 의한 신뢰성 특성의 악화, 절연막올 통한 direct tunneling leakage current, boron풍의 dopant 침투로 인한 소자 특성 ( (Threshold Voltage)의 불안, 전기적 stress하에서의 leakage current증가와 c charge-trap 및 피terface s쩌.te의 생성으로 인한 소자 특성의 변화 둥으로 요약 된다. 절연막의 특성올 개선하기 위해 여러 가지 새로운 공정들이 제안되었다. 그 예로, Nitrogen올 Si/Si02 계면에 doping하여 절연막의 특성을 개선하는 방법 으로 고온 열처 리 를 NH3, N20, NO 분위 기 에서 실시 하거 나, polysilicon 또는 s silicon 기판에 nitrogen올 이온 주입하여 열처리 하는 방법, 그리고 Plasma분 위기에서 Nitrogen 함유 Gas를 이용하여 nitrogen을 doping시키는 방법 둥이 연구되고 있다. 또한 Oxide cleaning 후 상온에서 성장되는 oxide를 최소화 하여 절연막의 특성올 개선하기 위하여 LOAD-LOCK을 이용하는 방법, C뼈피ng 공정의 개선올 통한 contamination 감소와 silicon surface roughness 감소 로 oxide 신뢰성올 개선하는 방법 둥이 있다. 구조적 인 측면 에 서 는 Polysilicon 의 g없n size 를 최 적 화하여 OxideIPolysilicon 의 계면 특성올 개선하는 연구와 Isolation및 Gate ETCH공정이 절연막의 특성에 미 치 는 영 향도 많이 연구되 고 있다 .. Plasma damage 가 Oxide 에 미 치 는 효과 를 제어하는 방법과 Deuterium열처리 퉁올 이용하여 Hot electron Stress하에서 의 MOS 소자의 Si/Si02 계면의 신뢰성을 개선하고 있다. 또한 극 박막 전연막의 신뢰성 특성올 통계적 분석올 통하여 사용 가능한 수명 올 예 측 하는 방법 과 Direct Tunneling Leakage current 를 고려 한 허 용 가농 한 동작 전 압 예측 및 Stress Induced Leakage Current 둥에 관해서 도 최 근 활발 한 연구가 진행되고 있다.

• Electrical & Electronic Materials
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• v.10 no.8
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• pp.783-793
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• 1997

A VLSI implementation of a self-learning neural network integrated circuits using a linearity synapse transistor is investigated. The thickness dependence of oxide current density stress current transient current and channel current has been measured in oxides with thicknesses between 41 and 112 $\AA$, which have the channel width $\times$ length 10 $\times$1${\mu}{\textrm}{m}$, 10 $\times$ 0.3${\mu}{\textrm}{m}$ respectively. The transient current will affect data retention in synapse transistors and the stress current is used to estimate to fundamental limitations on oxide thicknesses. The synapse transistor has represented the neural states and the manipulation which gaves unipolar weights. The weight value of synapse transistor was caused by the bias conditions. Excitatory state and inhitory state according to weighted values affected the drain source current.