• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 하계학술대회 논문집 Vol.9
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• pp.134-135
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• 2008

Ultra-thin $SiO_2/ZrO_2$ dielectrics were deposited by atomic layer chemical vapor deposition (ALCVD) method for non-volatile memory application. Metal-oxide-semiconductor (MOS) capacitors were fabricated by stacking ultra-thin $SiO_2$ and $ZrO_2$ dielectrics. It is found that the tunneling current through the stacked dielectric at the high voltage is lager than that through the conventional silicon oxide barrier. On the other hand, the tunneling leakage current at low voltages is suppressed. Therefore, the use of ultra-thin $SiO_2/ZrO_2$ dielectrics as a tunneling barrier is promising for the future high integrated non-volatile memory.

• 한국전기전자재료학회논문지
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• 제13권7호
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• pp.592-597
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• 2000

In this study (B $a_{0.5}$/S $r_{0.5}$)Ti $O_3$[BST(50/50)] ceramic thin films were prepared by the Sol-Gel method BST(50/50) stock solution was made and spin-coated on the Indium Tin Oxide(ITO)/glass substrate at 4000 rpm for 30 seconds. The coated films were dried at 35$0^{\circ}C$ for 10 minutes and annealed at 650~75$0^{\circ}C$ for 1 hour. The microstructural properties of the BST(50/50) thin film were studied by the XRD and AFM. The ferroelectric perovskite phase was formed at the annealing condition of 75$0^{\circ}C$ for 1 hour. Dielectric constant and loss of this thin were 370, 3.7% at room temperature respectively. The polarization switching voltage showed the good value of 3V. The leakage current density of the BST(50/50) thin film was 10$^{-7A}$c $m^2$with applied voltage of 1.5V. BST(50/50) thin film capacitors having good dielectric and electrical properties are expecting for the application to the dielectric material of DRAM.RAM.M.

• 한국전기전자재료학회논문지
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• 제36권4호
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• pp.418-421
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• 2023

Multilayer Ceramic Capacitors (MLCCs) are essential passive components in the electronics industry, known for their high capacitance due to the multilayer structure comprising inner electrodes and dielectric layers. Nickel electrodes are commonly used in MLCCs as the inner electrodes, and to prevent oxidation during the co-firing of the dielectric layers with nickel electrodes, reducing atmosphere is required. However, reducing atmosphere sintering can also induce a reduction of the dielectric, necessitating precise control of oxygen partial pressure. To explore the possibility of using oxide electrodes that do not require reducing atmosphere sintering, we analyze the electrical properties of nickel oxide (NiO) as a potential candidate. As a preliminary study on its use as an alternative inner electrode, the correlation between microstructure and electrical properties of bulk NiO under different sintering conditions was investigated to gain insights into the conduction mechanisms of the material.

• Transactions on Electrical and Electronic Materials
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• 제9권6호
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• pp.247-250
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• 2008

Hafnium dioxide ($HfO_2$) thin film as a gate dielectric for organic thin film transistors is prepared by plasma enhanced atomic layer deposition (PEALD). Mostly crystalline of $HfO_2$ film can be obtained with oxygen plasma and with water at relatively low temperature of $200^{\circ}C$. $HfO_2$ was deposited as a uniform rate of $1.2\;A^{\circ}$/cycle. The pentacene TFT was prepared by thermal evaporation method with hafnium dioxide as a gate dielectric. The electrical properties of the OTFT were characterized.

• Transactions on Electrical and Electronic Materials
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• 제17권3호
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• pp.159-162
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• 2016

We studied an electrolyte-dielectric metal (EDM) device based on a Si₃N₄ layer-coated anodic aluminium oxide (AAO) template for chemical sensors. The AAO templates were fabricated using a two-step anodization procedure at 0℃ and 70 V in 0.3 M oxalic acid, after which the Si₃N₄ was deposited on them using plasma enhanced chemical vapor deposition (PECVD). The average pore size was approximately 106 nm and the depth of the AAO templates was 24.6 nm to 86.5 nm. The Si₃N₄ layer-coated AAO is more stable than a single AAO template.

• 한국진공학회지
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• 제10권2호
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• pp.252-256
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• 2001

분광타원법을 이용하여 상온에서 ZnSe의 유전율 함수를 측정하였다. 순수한 ZnSe의 유전율 함수를 얻기 위해서 적절한 화학적인 식각법을 행함으로써 시료표면의 산화막을 제거하였고, 그 결과 이전에 보고된 것보다 더 좋은 결과를 얻을 수 있었으며, 또한 이전의 산화막 제거 방법에 문제가 있었음을 알 수 있었다. 산화막을 제거하기 전의 유사 유전율 함수와 그것을 수행한 후의 유전율 함수에 대해 브루그먼 유효매질 어림이론을 사용하여 비정질 Se, $GaAsO_3$, void 등의 물질을 조합함으로써 ZnSe 자연 산화막의 유전율 함수를 결정하였다.

• 한국재료학회:학술대회논문집
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• 한국재료학회 2003년도 춘계학술발표강연 및 논문개요집
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• pp.79-79
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• 2003

최근 CMOS(Complementary Metal Oxide Semiconductor) 능동소자에 사용되는 MOS-FET (Metal Oxide Semiconductror Field Effect Transitror)의 전체적인 크기 감소추세에 따라 금속 전극과 반도체 사이의 절연층 두께 감소가 요구되고 있다. 현재 보편적으로 사용되고 있는 SiO$_2$층은 두께 감소에 따른 터널링 전류의 증가로 더 이상의 두께 감소를 기대하기 어려운 상태이다. 이러한 배경에서 최근 터널링 전류를 충분히 감소시키면서 요구되는 절연특성을 얻을 수 있는 새로운 고유전 물질 (high-k dielectric material)에 대한 연구가 이루어지고 있다. 현재까지 연구되어온 고유전 물질 중, 고유전 상수, 큰 밴드갭, Si과의 열적 안정성을 갖는 물질로 ZrO$_2$가 주목을 받고 있다. 본 연구에서는 Metal Organic Molecular Beam Epitaxy (MOMBE) 방법을 이용한 ZrO$_2$ 층의 성장조건 및 특성을 평가하고자 한다.

• 한국전기전자재료학회논문지
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• 제19권4호
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• pp.334-338
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• 2006

Poly silicon TFT requires high quality dielectric film; conventional method of growing silicon dioxide needs highly hazardous chemicals such as silane. We have grown high quality dielectric film of silicon dioxide using non-hazardous chemical such as TFOS and ozone as reaction gases by APCVD. The films grown were characterized through C-V curves of MOS structures. Conventional APCVD requires high temperature processing where as in the process of current study, we developed a low temperature process. Interface trap density was substantially decreased in the silicon surface coated with the silicon dioxide film after annealing in nitrogen ambient. The interface with such low trap density could be used for poly silicon TFT fabrication with cheaper cost and potentially less hazards.

• 한국결정성장학회지
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• 제11권1호
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• pp.38-42
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• 2001

Electric and dielectric(Ba,Sr)$TiO_3$[BST] thin films for emtal-Insulator-Semiconductor(MIS) capacitors have been studied. BST thin films wre deposted on p-Si(100) substrates bythe RF magnetron sputtering with tempratue range of 500~$600^{\circ}C$. The dielectric properties of MIS capacitors consisting of Al/BST/$SiO_2$/Si sandwich structure were evaluated ot redcue the leakage current density. The charge state densities of the MIS capacitors were determined by high frequency (1 MHz) C-V measurement. In order to reduce the leakage current in MIS capacitor, high quality $SiO_2$ layer was deposited on bare p-Si substrate. Depending on the oxygen pressure and substrate temperature both positive and negative polarities of effective oxide charge in the MIS capacitors were evaluated. It is considered that the density of electronic states, generated at the BST/$SiO_2$/p-Si interface due to the asymmetric structure within BST/$SiO_2$/Si structure, and the oxygen vacancy content has influence on the behavior of oxide charge.

• Corrosion Science and Technology
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• 제10권1호
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• pp.37-42
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• 2011

Aluminum was electrochemically etched in acid solution and the surface area was magnified by the formation of etch pits. Etched aluminum was covered with a compact and dense dielectric oxide film by anodization and applied to the aluminum electrolytic capacitor electrode. Capacitance of aluminum electrolytic capacitor is closely related with surface area, which depends on size and number of etch pits. Size of etch pits need to be controlled because inside of the pits can be buried by the formation of dielectric oxide film. In this work, the effect of ultrasound pretreatment on the aluminum etch pit formation and capacitance were investigated. Additionally, the relationship between the second etching effect on pit size and capacitance was studied.