• Journal of Power Electronics
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• v.17 no.3
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• pp.590-600
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• 2017

This paper presents a ripple-free input current modified interleaved boost converter for high step-up applications. By integrating dual coupled inductors and voltage multiplier techniques, the proposed converter can reach a high step-up gain without an extremely high turn-ON period. In addition, a very small auxiliary inductor employed in series to the input dc source makes the input current ripple theoretically decreased to zero, which simplifies the design of the electromagnetic interference (EMI) filter. In addition, the voltage stresses on the semiconductor devices of the proposed converter are efficiently reduced, which makes high performance MOSFETs with low voltage rated and low resistance $r_{DS}$(ON) available to reduce the cost and conduction loss. The operating principles and steady-state analyses of the proposed converter are introduced in detail. Finally, a prototype circuit rated at 400W with a 42-50V input voltage and a 400V output voltage is built and tested to verify the effectiveness of theoretical analysis. Experimental results show that an efficiency of 95.3% can be achieved.

• Proceedings of the KIPE Conference
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• 1996.06a
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• pp.26-30
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• 1996

This paper proposes a novel method to reduce the torque ripple due to the non-ideality of the current sensing parts in vector-controlled inverter-fed PMSM(Permanent Magnet Synchronous Motor) drive systems. The motor output torque equations are derived in terms of their offset voltages and different voltage transducing gains. And the effects of phase current errors on motor torque are analyzed for both salient PMSM and non-salient PMSM. The proposed method can eliminate the torque ripple by nulling the offset voltages and setting the voltage transducing gains to the same value. To verify the proposed method, digital simulations are carried out for non-salient PMSM.

• Proceedings of the KSR Conference
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• 2005.05a
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• pp.800-805
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• 2005

In this study, control schemes are proposed for a propulsion system of TTX(Tilting Train eXpress). In developed traction converter, unity power factor control, compensation method of dc link voltage have been applied. Output current of converter contains harmonic ripple at twice input ac line frequency, which causes a ripple in the dc link voltage so that beatless control is developed in inverter system to reduce the pulsating torque current. This system is verified by the system modelling and prototype test.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.27 no.10
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• pp.59-68
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• 2013

This paper proposes the boost type bidirectional DC/DC converter with high efficiency for electric vehicle using an interleave method. This interleave method can reduce the system size because it reduces the ripple of output voltage and input current with no add to extra filter. Proposed system is consist of two converters and applies to interleaved method through phase shift to each converter. And it implements the high boost through voltage double and series construction of output port. Also, it reduces the price and increases the efficiency as operating the ZCS by leakage inductance of transformer and capacitor of voltage double with not add special reactor. Proposed DC/DC converter using interleave method is proved the validity through the result of PSIM simulation and experiment of 5kW DC/DC converter.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.40 no.2
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• pp.162-172
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• 1991

In proportion to the capacity enlargement of the induction motor system controlled by current source inverter, the capacitance of the commutating capacitor is enlarged and then the spike value of output voltage is increased at the moment of charge and discharge. Moreover, the output currnet includes a number of harmonic components. Such voltage spike and harmonics generate the torque ripple and lead to bad effects on the performance of the induction motor. In this study, all the harmonics excluding 17th and 19th harmonics were mostly elimunated by adopting 18-phase Triple High Frequency Current Source Inverter(HFCSI), and the spike component of output voltage was reduced by adding the Voltage Clamping Circuit(VCC). As a result, the torque ripple and the commutation loss were reduced and the performance of the system was improved. Experiments for speed control were carried out in the tripple current source inverter system for induction motor drive. Overall system was controlled by ONE CHIP MICROCOMPUTER(INTEL 8751). Control circuits were simplified and good experimental results in the constant V/F control were obtained due to the flexibility of the microcomputer.

• Proceedings of the KIPE Conference
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• 2001.10a
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• pp.708-712
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• 2001

A new phase-shifted parallel-input/series-output (PI SO) dual inductor-fed push-pull converter for high-power step­up applications is proposed. This converter is operated at a constant duty cycle and employs an auxiliary circuit to control the output voltage with a phase-shift between the two modules. It features a voltage conversion characteristic which is linear to changes in the control input, and high step-up ratio with a greatly reduced switch turn-off stress resulting in a significant increase in the converter efficiency. It also shows a low ripple content and low root-mean-square (RMS) current in the output capacitor. The operational principle is analyzed and a comparative analysis with the conventional pulse-width-modulated (PWM) PISO dual inductor-fed push-pull converter is presented. A 50kHz, 800W, 350Vdc prototype with an input of 20-32Vdc has also been constructed to validate the proposed converter. The proposed converter compares favorably with the conventional counterpart and is considered well suited to high-power step-up applications.

• Journal of Power Electronics
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• v.16 no.6
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• pp.1991-2004
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• 2016

An LC filter is required to reduce the output current ripple in the auxiliary resonant snubber inverter (ARSI) for high-performance applications. However, if the traditional control method is used in the ARSI with LC filter, then unnecessary current flows in the auxiliary circuit. In addressing this problem, a novel load-adaptive control that fully uses the filter inductor current ripple to realize the soft-switching of the main switches is proposed. Compared with the traditional control implemented in the ARSI with LC filter, the proposed control can reduce the required auxiliary current, contributing to higher efficiency and DC-link voltage utilization. In this study, the detailed circuit operation in the light load mode (LLM) and the heavy load mode (HLM) considering the inductor current ripple is described. The characteristics of the improved ARSI are expressed mathematically. A prototype with 200 kHz switching frequency, 80 V DC voltage, and 8 A maximum output current was developed to verify the effectiveness of the improved ARSI. The proposed ARSI was found to successfully operate in the LLM and HLM, achieving zero-voltage switching (ZVS) of the main switches and zero-current switching (ZCS) of the auxiliary switches from zero load to full load. The DC-link voltage utilization of the proposed control is 0.758, which is 0.022 higher than that of the traditional control. The peak efficiency is 91.75% at 8 A output current for the proposed control, higher than 89.73% for the traditional control. Meanwhile, the carrier harmonics is reduced from -44 dB to -66 dB through the addition of the LC filter.

• Journal of IKEEE
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• v.24 no.3
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• pp.867-876
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• 2020

This paper proposes a neutral-point voltage ripple reduction of high frequency injection sensorless control of IPMSM fed by a three-level inverter. The high frequency voltage injection method has been successfully applied to sensorless control for IPMSM at low speed region. In the process of high frequency voltage injection sensorless control for IPMSM, the neutral-point voltage ripple is increased. It should be reduced because it distorts the output current and decreases a life time of DC-link capacitor. The proposed method in this paper reduces the neutral-point voltage ripple by compensating the reference voltage, and the compensation value is calculated simply with reference voltages and currents. The effectiveness of the proposed method is verified by simulation results.

• Journal of Power Electronics
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• v.19 no.4
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• pp.881-893
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• 2019

This paper proposes a practical sliding-mode controller design for shaping the impedances of cascaded boost-converter power decoupling circuits for reducing the second order harmonic ripple in photovoltaic (PV) current. The cascaded double-boost converter, when used as power decoupling circuit, has some advantages in terms of a high step-up voltage-ratio, a small number of switches and a better efficiency when compared to conventional topologies. From these features, it can be seen that this topology is suitable for residential (PV) rooftop systems. However, a robust controller design capable of rejecting double frequency inverter ripple from passing to the (PV) source is a challenge. The design constraints are related to the principle of the impedance-shaping technique to maximize the output impedance of the input-side boost converter, to block the double frequency PV current ripple component, and to prevent it from passing to the source without degrading the system dynamic responses. The design has a small recovery time in the presence of transients with a low overshoot or undershoot. Moreover, the proposed controller ensures that the ripple component swings freely within a voltage-gap between the (PV) and the DC-link voltages by the small capacitance of the auxiliary DC-link for electrolytic-capacitor elimination. The second boost controls the main DC-link voltage tightly within a satisfactory ripple range. The inverter controller performs maximum power point tracking (MPPT) for the input voltage source using ripple correlation control (RCC). The robustness of the proposed control was verified by varying system parameters under different load conditions. Finally, the proposed controller was verified by simulation and experimental results.

• Proceedings of the IEEK Conference
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• 2002.06e
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• pp.307-310
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• 2002

A design for the input filter and the output filter of a single-phase UPS system is proposed. And also, this paper describes a reduction of the DC voltage ripple of a single-phase UPS. The input power of proposed UPS fluctuates with twice frequency of the utility source, which causes DC voltage fluctuation. The reduction of the DC voltage fluctuation requires a large DC link capacitor. The proposed method uses a LC series resonant filter paralleled with a conventional smoothing capacitor. The effectiveness of the proposed method was confirmed by simulation results.