• Title/Summary/Keyword: Output voltage ripple

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Direct Stator Flux Vector Control Strategy for IPMSM using a Full-order State Observer

  • Yuan, Qingwei;Zeng, Zhiyong;Zhao, Rongxiang
    • Journal of Electrical Engineering and Technology
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    • v.12 no.1
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    • pp.236-248
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    • 2017
  • A direct stator flux vector control scheme in discrete-time domain is proposed in this paper for the interior permanent magnet synchronous motor (IPMSM) drive to remove the proportional-integral (PI) controller from the direct torque control (DTC) scheme applied to IPMSM and to obtain faster dynamic response and lower torque ripple output. The output of speed outer loop is used as the desired torque angle instead of the desired torque in the proposed scheme. The desired stator flux vector in dq coordinate is calculated with a given amplitude. The state-space equations in discrete-time for IPMSM are established, the actual stator flux vector is estimated in deadbeat manner by a full-order state observer, and then the closed-loop control is achieved by the pole placement. The stator flux error vector is utilized to calculate the reference stator voltage vector. Extracting the angle position and amplitude from the estimated stator flux vector and estimating the output torque are eliminated for the direct feedback control of the stator flux vector. The proposed scheme is comparatively investigated with a PI-SVM DTC scheme by experiment results. Experimental results show the feasibility and advantages of the proposed control scheme.

DC-link Voltage Control of Grid Connected PV System using Quasi Z-Source Inverter (QZSI를 이용한 계통연계형 태양광발전 시스템의 직류단 전압제어)

  • Park, Jong-Hyoung;Kim, Heung-Geun;Nho, Eui-Cheol;Chun, Tae-Won;Cha, Honnyong
    • The Transactions of the Korean Institute of Power Electronics
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    • v.19 no.3
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    • pp.201-210
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    • 2014
  • In this paper, dc-link voltage control of a grid-connected QZSI is presented. Since the input current of the ZSI is discontinuous, a capacity with relatively large capacitance should be connected to the output of the PV array in order to reduce the current ripple. Due to the presence of the impedance network inductor in series with the PV array, the QZSI can achieve continuous input current flow. Several dc-link voltage control methods are compared and the method for power quality improvement is also presented. The performance of the proposed method is verified through both simulation and experimental results.

High efficiency photovoltaic DC-DC charger possible to use the buck and boost combination mode (승압 강압 콤비네이션 모드가 가능한 고효율 태양광 충전용 DC-DC 컨버터)

  • Lee, Sang-Hun
    • Journal of the Korean Society of Industry Convergence
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    • v.20 no.2
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    • pp.97-104
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    • 2017
  • In the present industrial field, the demand for the development of the solar power source device and the charging device for the solar cell is gradually increasing. The solar charger is largely divided into a DC-DC converter that converts the voltage generated from the sunlight to a charging voltage, and a battery and a charger that are charged with an actual battery. The conventional charger topology is used either as a Buck converter or a Boost converter alone, which has the disadvantage that the battery can not always be charged to the desired maximum power as input and output conditions change. Although studies using a topology capable of boosting and stepping have been carried out, Buck-Boost converters or Sepic converters with relatively low efficiency have been used. In this paper, we propose a new Buck Boost combination power converter topology structure that can use Buck converter and Boost converter at the same time to improve inductor current ripple and power converter efficiency caused by wide voltage control range like solar charger.

High Quality DC-DC Boosting Converter Based on Cuk Converter and Advantages of Using It in Multilevel Structures

  • Rostami, Sajad;Abbasi, Vahid;Kerekes, Tamas
    • Journal of Power Electronics
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    • v.19 no.4
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    • pp.894-906
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    • 2019
  • In this paper, a DC-DC converter is proposed based on the Cuk converter. The proposed converter has high efficiency and it can be used in multilevel DC-DC converters. A reduction of the inductors size in comparison to Cuk converter and a reduction in the inductors resistance negative effects on efficiency are the important points of the proposed converter. Its voltage ripple is reduced when compared to other converters. Its output voltage has a high quality and does not contain spikes. A theoretical analysis demonstrates the positive points of the proposed converter. The design and analysis of the converter are done in continues conduction mode (CCM). Experiments confirm the obtained theoretical equations. The proposed converter voltage gain is similar to that of a conventional Boost converter. As a result, they are compared. The comparison illustrates the advantages of the proposed converter and its higher quality. Furthermore, a prototype of the proposed converter and its combination with a 2x multiplier are built in the lab. Experimental results validate the analysis. In addition, they are in good agreements with each other.

High Performance Current-Mode DC-DC Boost Converter in BiCMOS Integrated Circuits

  • Lee, Chan-Soo;Kim, Eui-Jin;Gendensuren, Munkhsuld;Kim, Nam-Soo;Na, Kee-Yeol
    • Transactions on Electrical and Electronic Materials
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    • v.12 no.6
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    • pp.262-266
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    • 2011
  • A simulation study of a current-mode direct current (DC)-DC boost converter is presented in this paper. This converter, with a fully-integrated power module, is implemented by using bipolar complementary metal-oxide semiconductor (BiCMOS) technology. The current-sensing circuit has an op-amp to achieve high accuracy. With the sense metal-oxide semiconductor field-effect transistor (MOSFET) in the current sensor, the sensed inductor current with the internal ramp signal can be used for feedback control. In addition, BiCMOS technology is applied to the converter, for accurate current sensing and low power consumption. The DC-DC converter is designed with a standard 0.35 ${\mu}m$ BiCMOS process. The off-chip inductor-capacitor (LC) filter is operated with an inductance of 1 mH and a capacitance of 12.5 nF. Simulation results show the high performance of the current-sensing circuit and the validity of the BiCMOS converter. The output voltage is found to be 4.1 V with a ripple ratio of 1.5% at the duty ratio of 0.3. The sensing current is measured to be within 1 mA and follows to fit the order of the aspect ratio, between sensing and power FET.

A New Pulse Frequency Modulation(PFM) Series Boost Capacitor(SBC) Full Bridge DC/DC Converter (새로운 주파수 가변형(PFM) 직렬 부스트 캐패시터(SBC) 풀 브리지 DC/DC 컨버터)

  • Shin, Yong-Saeng;Jang, Young-Su;Roh, Chung-Wook;Hong, Sung-Soo;Lee, Hyo-Bum;Han, Sang-Kyoo
    • The Transactions of the Korean Institute of Power Electronics
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    • v.14 no.2
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    • pp.120-127
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    • 2009
  • This paper proposes a new Pulse Frequency Modulation(PFM)-Series Boost Capacitor(SBC) full bridge DC/DC Converter which features a high efficiency and high power density. The proposed converter controls the output voltage by varying the voltage across the series boost capacitor according to switching frequency and has no freewheeling period due to 50% fixed duty operation. As a result, its conduction loss is lower than that of the conventional phase shift full bridge converter. Moreover, ZVS of all power switches can be ensured along wide load ranges and output current ripple is very small. Therefore, it has very desirable merits such as a small output inductor, high efficiency, and improved heat generation. This paper performs a rationale and PSIM simulation of the proposed converter. Finally, experimental results from a 1.2kW(12V, 100A) prototype are presented to confirm the operation, validity and features of the proposed converter.

Design and Implementation of a Low-Noise SMPS for Distributed Control Systems (분산제어시스템을 위한 저잡음 SMPS의 설계 및 구현)

  • Cheong, Tai-Hyun;Park, Jong-Tae;Yu, Chong-Gun
    • Journal of IKEEE
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    • v.12 no.1
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    • pp.59-64
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    • 2008
  • In this paper, a new efficient SMPS has been designed and implemented. It can replace the existing product that is widely used in industry. To investigate the performance of the conventional SMPS, the output voltage changes due to variations in the input voltage and the load conditions, and the ripple and noise voltages have been measured and analyzed. As a result, it has been confirmed that the noise in the conventional SMPS is severe due to the deficiency of patterns for current. This is because the conventional SMPS draw out all outputs using one transformer and the alarm logic exists in the output path. To solve this problem, the switching frequency is increased from 17KHz to 70KHz and the current patterns are fully guaranteed by separating the alarm circuit and PWM circuit as a sub-board from the main board. Measurement results shows that the output noise of the designed SMPS decreases below 32% of the conventional SMPS noise for various test conditions, and both the line and load regulations are improved.

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Improved instantaneous Following Control Function for High Power Factor PWM Matrix Converter (고역율 PWM 매트릭스 컨버터의 개선된 순시추종 제어함수)

  • Kim, Kwang-Tae
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.19 no.3
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    • pp.35-43
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    • 2005
  • Matrix converters have been studied for eliminating dc link of conventional converter-inverter system, and various undulation strategy have been proposed. Therefore, matrix converter have no energy storage component except for small ac later for the elimination of switching ripple, and can be made compact and highly reliable compare with the do link inverter system. Matrix converter, however, directly connected the input and the output terminals by bidirectional static switch. As a result if the input voltage are asymmetrical, and contain harmonics, the influence of the distortions directly appear on the output terminal. This problem is a major obstacle to the matrix converter. A new control method using average comparison strategy have been proposed in this paper. This control method realizes sinusoidal input and output current unity input displacement factor regardless of load power factor. Moreover, compensation of the asymmetrical and/or harmonic containing input voltage is automatically realized, and calculation time of control function is reduced.

The Characteristics Analysis of New Dc 48[V] Telecommunication Power System using Forward Type three Phase Rectifier (포워드형 3선 PWM 정류기를 이용한 새로운 DC 48[V] 통신용 전원시스템의 특성 해석)

  • Suh, Ki-Young
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.20 no.1
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    • pp.34-40
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    • 2006
  • This paper proposed power system for new DC 49[V] telecommunication using forward three-phase PWM rectifier power factor and efficiency for improvement of ripple voltage. Proposed power system for DC 48[V] telecommunication that consists of power conversion devices including switch, inductor and condenser were made between each line, in power inverter device of each switch control turn-on in period of continuity time control to get power factor '1' of sine wave current and on-off of switch lessens peak current that was happened and got conversion efficiency 92.1[%] composing in PWM rectifier of forward form instead of general PWM rectifier. Also, harmonic input regulation value(IEC61000-3-2 Class-As) satisfy input current and reduce ripple factor of output voltage in state that distortion of three-phase supply is overlapped each other.

Simple On-line Elimination Strategy of Dead Time and Nonlinearity in Inverter-fed IPMSM Drive Using Current Slope Information (IPMSM 드라이브에서 전류 기울기 정보를 이용한 데드타임 및 인버터 비선형성 효과의 간단한 제거 기법)

  • Park, Dong-Min;Kim, Myung-Bok;Kim, Kyeong-Hwa
    • The Transactions of the Korean Institute of Power Electronics
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    • v.17 no.5
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    • pp.401-408
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    • 2012
  • A simple on-line elimination strategy of the dead time and inverter nonlinearity using the current slope information is presented for a PWM inverter-fed IPMSM (Interior Permanent Magnet Synchronous Motor) drive. In a PWM inverter-fed IPMSM drive, a dead time is inserted to prevent a breakdown of switching device. This distorts the inverter output voltage, resulting in a current distortion and torque ripple. In addition to the dead time, inverter nonlinearity exists in switching devices of the PWM inverter, which is generally dependent on operating conditions such as the temperature, DC link voltage, and current. The proposed scheme is based on the fact that the d-axis current ripple is mainly caused by the dead time and inverter nonlinearity. To eliminate such an influence, the current slope information is determined. The obtained current slope information is processed by the PI controller to estimate the disturbance caused by the dead time and inverter nonlinearity. The overall system is implemented using DSP TMS320F28335 and the validity of the proposed algorithm is verified through the simulation and experiments. Without requiring any additional hardware, the proposed scheme can effectively eliminate the dead time and inverter nonlinearity even in the presence of the parameter uncertainty.