• Title/Summary/Keyword: Output voltage ripple

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Development of Few-second 40 kV, 280 kW High Voltage Pulse Power Supply (수 초 지속 40 kV, 280 kW 고전압 펄스전원장치 개발)

  • Kim, S.C.;Nam, S.H.;Heo, H.;Heo, H.;Moon, C.;Kim, J.H.;Oh, S.S.;Yang, J.W.;Sho, J.H.
    • Proceedings of the KIEE Conference
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    • 2015.07a
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    • pp.990-991
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    • 2015
  • To drive a magnetron injection gun, thsi paper decribes a design, fabrication and analysis results of proposed compact capacitor charging power supply (CCPS) formed resonant full-bridge inverter for electron gun power supply (EGPS). EGPS needs the -40 kV output voltage and 280 kW output power for few seconds continuously and have to be designed for the rise and fall time to be less than 1 ms with the ripple stability of output voltage of lower than 1%. In order to meet the requirements, we used eight resonant full-bridge modules operated in parallel. Each resonant full-bridge module can supply the current of 0.9 A and the voltage of 40 kV, and is operated by N-phase shift switching pattern. In this paper, we present the design, simulation and test results of interleaved CCPS.

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A High-Efficiency High Step-Up Interleaved Converter with a Voltage Multiplier for Electric Vehicle Power Management Applications

  • Tseng, Kuo-Ching;Chen, Chun-Tse;Cheng, Chun-An
    • Journal of Power Electronics
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    • v.16 no.2
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    • pp.414-424
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    • 2016
  • This paper proposes a novel high-efficiency high-step-up interleaved converter with a voltage multiplier, which is suitable for electric vehicle power management applications. The proposed interleaved converter is capable of achieving high step-up conversion by employing a voltage-multiplier circuit. The proposed converter lowers the input-current ripple, which can extend the input source's lifetime, and reduces the voltage stress on the main switches. Hence, large voltage spikes across the main switches are alleviated and the efficiency is improved. Finally, a prototype circuit with an input voltage of 24 V, an output voltage of 380 V, and an output rated power of 1 kW is implemented and tested to demonstrate the functionality of the proposed converter. Moreover, satisfying experimental results are obtained and discussed in this paper. The measured full-load efficiency is 95.2%, and the highest measured efficiency of the proposed converter is 96.3%.

Interleaved ZVS DC/DC Converter with Balanced Input Capacitor Voltages for High-voltage Applications

  • Lin, Bor-Ren;Chiang, Huann-Keng;Wang, Shang-Lun
    • Journal of Power Electronics
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    • v.14 no.4
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    • pp.661-670
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    • 2014
  • A new DC/DC converter with zero voltage switching is proposed for applications with high input voltage and high load current. The proposed converter has two circuit modules that share load current and power rating. Interleaved pulse-width modulation (PWM) is adopted to generate switch control signals. Thus, ripple currents are reduced at the input and output sides. For high-voltage applications, each circuit module includes two half-bridge legs that are connected in series to reduce switch voltage rating to $V_{in}/2$. These legs are controlled with the use of asymmetric PWM. To reduce the current rating of rectifier diodes and share load current for high-load-current applications, two center-tapped rectifiers are adopted in each circuit module. The primary windings of two transformers are connected in series at the high voltage side to balance output inductor currents. Two series capacitors are adopted at the AC terminals of the two half-bridge legs to balance the two input capacitor voltages. The resonant behavior of the inductance and capacitance at the transition interval enable MOSFETs to be switched on under zero voltage switching. The circuit configuration, system characteristics, and design are discussed in detail. Experiments based on a laboratory prototype are conducted to verify the effectiveness of the proposed converter.

Implementation of Dual Current Controller and Realtime Power Limiting Algorithm in Grid-connected Inverter during Unbalanced Voltage Conditions (전원 전압 불평형시 계통연계형 인버터의 유효전력 리플 억제를 위한 듀얼 전류제어기 구현과 출력 전력의 실시간 제한 알고리즘)

  • Song Seung-Ho;Kim Jeong-Jae
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.55 no.1
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    • pp.54-60
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    • 2006
  • A power limiting algorithm is proposed for stable operation of grid-connected inverter in case of grid voltage unbalance considering the operation limit of inverter. During the voltage unbalance the control performance of Inverter. is degraded and the output power contains 120Hz ripple due to the negative sequence of voltage. In this paper, conventional dual sequence current controller is implemented to solve these problems using separated control of positive and negative sequence. Especially the maximum power limit which guarantees the maximum rated current of the inverter is automatically calculated as the instant grid voltage changes. As soon as the voltage recovers the proposed algorithm can return to the normal power control mode accomplishing low voltage ride through. Proposed algorithm is verifed using PSCAD/EMTDC simulations and tested experimentally at 4.4kW wind turbine simulator set-up.

A High-Efficiency, Robust Temperature/voltage Variation, Triple-mode DC-DC Converter (고효율, Temperature/voltage 변화에 둔감한 Triple-mode CMOS DC-DC Converter)

  • Lim, Ji-Hoon;Ha, Jong-Chan;Kim, Sang-Kook;Wee, Jae-Kyung
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.6
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    • pp.1-9
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    • 2008
  • This paper suggests the triple-mode CMOS DC-DC converter that has temperature/voltage variation compensation techniques. The proposed triple-mode CMOS DC-DC converter is used to generate constant or variable voltages of 0.6-2.2V within battery source range of 3.3-5.5V. Also, it supports triple modes, which include Pulse Width Modulator (PWM) mode, Pulse Frequency Modulator (PFM) mode and Low Drop-Out (LDO) mode. Moreover, it uses 1MHz low-power CMOS ring oscillator that will compensate malfunction of chip in temperature/voltage variation condition. The proposed triple-mode CMOS DC-DC converter, which generates output voltages of 0.6-2.2V with an input voltage sources of 3.3-5.5V, exhibits the maximum output ripple voltage of below 10mV at PWM mode, 15mV at PFM mode and 4mV at LDO mode. And the proposed converter has maximum efficiency of 93% at PWM mode. Even at $-25{\sim}80^{\circ}C$ temperature variations, it has kept the output voltage level within 0.8% at PWM/PFM/LDO modes. For the verification of proposed triple-mode CMOS DC-DC converter, the simulations are carried out with $0.35{\mu}m$ CMOS technology and chip test is carried out.

The Phenomena Giving Rise of Nonlinear Load Operated by Unbalance Voltage (불평형 전압으로 운전시 비선형 부하에 나타나는 현상)

  • Kim, Jong-Gyeom;Lee, Eun-Ung
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.51 no.6
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    • pp.285-291
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    • 2002
  • In general, utility voltage is maintained at a relatively low level of Phase unbalance since a low level of unbalance can cause a significant power supply ripple and heating effects on the power system equipment. Voltage unbalance more commonly emerges in individual customer loads due to phase load unbalanced, especially where single phase power loads are used. Under unbalanced input voltages large lower order harmonics appears at the input and output ports of Power conversion devices. As the application of adjustable -speed drives (ASDs) and their integration with complex industrial processes increase, so does the need to understand how ASDs perform during voltage This paper describes a real load test to investigate the performance of 3-HP adjustable speed drives by an unbalanced voltage at the low-voltage system.

Single-Inductor, Multiple-Input-Single-Output Converter Based Energy Mixer for Power Packet Distribution System

  • Reza, C.M.F.S.;Lu, Dylan Dah-Chuan;Qin, Ling;Qi, Jian
    • Journal of Power Electronics
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    • v.18 no.5
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    • pp.1479-1488
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    • 2018
  • Power packet (PP) distribution system distributes power to different loads that share the same distribution cable in a packetized form. When compared with conventional power systems, a PP distribution system (PPDS) can reduce standby power, eliminate Point-of-Load (PoL) power conversion, and intelligently control the load demand from the source side. Due to the absence of PoL conversion, when multiple power sources at different voltage levels and conditioning requirements jointly send power to various loads at different voltage ratings, the generated voltage has an irregular shape. A large filter at each of the load sides is required to reduce such a large voltage ripple. In this paper, a single-inductor, multiple-input-single-output converter structure based multiple-energy-source mixer is proposed. It combines PP generation, maximum power point tracking (MPPT) of renewable energy sources (RESs) and filtering at the source side. To demonstrate the possible renewable energy integration, a PV panel is used as a power source together with other constant voltage sources. The PV power is approximately tracked using the constant voltage method and it is used for each of the PP generations. The proposed PP distribution system is experimentally verified and it is shown that a conventional PI controller is sufficient for stable system operation.

Analysis, Design, and Implementation of a Zero-Voltage-Transition Interleaved Boost Converter

  • Ting, Naim Suleyman;Sahin, Yakup;Aksoy, Ismail
    • Journal of Power Electronics
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    • v.17 no.1
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    • pp.41-55
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    • 2017
  • This study proposes a novel zero voltage transition (ZVT) pulse width modulation (PWM) DC-DC interleaved boost converter with an active snubber cell. All the semiconductor devices in the converter turn on and off with soft switching to reduce the switching power losses and improve the overall efficiency. Through the interleaved approach, the current stresses of the main devices and the ripple of the output voltage and input current are reduced. The main switches turn on with ZVT and turn off with zero voltage switching (ZVS). The auxiliary switch turns on with zero current switching (ZCS) and turns off with ZVS. In addition, the snubber cell does not create additional current or voltage stress on the main switches and main diodes. The proposed converter can smoothly achieve soft switching characteristics even under light load conditions. The theoretical analysis and operating stages of the proposed converter are made for the D > 50% and D < 50% modes. Finally, a prototype of the proposed converter is implemented, and the experimental results are given in detail for 500 W and 50 kHz. The overall efficiency of the proposed converter reached 95.5% at nominal output power.

New Dead Time Compensation Method in Voltage-Fed PWM Inverter (전압형 PWM 인버터에서의 새로운 데드 타임 보상 기법)

  • Ryu, Ho-Seon;Kim, Bong-Suck;Lee, Joo-Hyun;Lim, Ick-Hun;Hwang, Seon-Hwan;Kim, Jang-Mok
    • The Transactions of the Korean Institute of Power Electronics
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    • v.11 no.5
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    • pp.395-403
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    • 2006
  • This paper has proposed a new dead time compensation method for a voltage-fed PMW inverter. In the voltage-fed PMW inverter, a voltage distortion is generated by the dead time effect and the nonlinear characteristics of the switching devices. Especially, the distorted voltage causes 5th and 7th harmonics in the stationary phase currents, and 6th harmonic in the synchronous phase currents. As a result, the integrator output of the synchronous PI current regulator has the ripple corresponding to six times of the inverter output frequency. In this paper, the signal of the integrator output of the d-axis current regulator is used as the control signal for the dead time compensation. The experimental and simulation results are presented to verify the validity of the proposed method.

The Notch Filter Design for Mitigation Current Ripple of Fuel cell-PCS (연료전지용 PCS의 출력 전류 리플 개선을 위한 노치 필터 설계)

  • Kim, Seung-Min;Park, Bong-Hee;Choi, Ju-Yeop;Choy, Ick;Lee, Sang-Chul;Lee, Dong-Ha
    • Journal of the Korean Solar Energy Society
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    • v.32 no.6
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    • pp.106-112
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    • 2012
  • As a fuel cell converts the chemical energy of the fuel cell into electrical energy by electrochemical reaction, the fuel cell system is uniquely integrated technique including fuel processor, fuel cell stack, power conditioning system. The residential fuel cell-PCS(Power Conditioning System) needs to convert efficiently the DC current produced by the fuel cell into AC current using single-phase DC-AC inverter. A single-phase DC-AC inverter has naturally low frequency ripple which is twice frequency of the output current. This low frequency(120Hz) ripple reduces the efficiency of the fuel cell. This paper presents notch filter with IP voltage controller to reject specific 120Hz current ripple in single-phase inverter. The notch filter is designed that suppress just only specific frequency component and no phase delay. Finally, the proposed notch filter design method has been verified with computer simulation and experimentation.