• Proceedings of the KIPE Conference
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• 전력전자학회 2017년도 전력전자학술대회
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• pp.24-25
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• 2017

In this paper, a low cost bridgeless interleaved power factor correction topology for electric vehicle charger application is proposed. With the proposed topology the number of switches, inductors, current sensors and associated circuits can be reduced, thereby reducing the cost of the system as compared to the conventional bridgeless PFC circuit. The reduced input current ripple by the proposed interleaved topology makes it suitable for high power applications such as electric vehicle chargers since it can reduce the size of the inductor core and the Electro Magnetic Interference (EMI) problem. In the proposed topology only one current sensor is required. All the boost inductor currents can be reconstructed by sampling the output current and used to control the input current. Therefore the typical problem caused by the unequal current gain of each current sensor inherently does not exist in the proposed topology. In addition the current sharing between converters can be achieved more accurately and the high frequency distortion is decreased. The performance of the proposed converter is verified by the experimental results with a prototype of 6.6kW bridgeless interleaved PFC circuit.

• The Transactions of the Korean Institute of Power Electronics
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• 제19권6호
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• pp.572-581
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• 2014

A design and control method of DC/DC converter, which can control variable DC-link voltage to drive a fuel cell electric vehicle (FCEV), is proposed in this study. Given that a fuel cell has low-voltage and high-current characteristics, the required voltage for operating motor must be output through the DC/DC boost converter in the system to drive an FCEV. The proposed converter can choose the output voltage of battery or fuel cell in consideration of the driving mode, as well as control DC-link voltage in accordance with the back electromotive force. The switching lag-time to prevent shortage of pulse-width modulation inverter arms makes distorted current waveform caused by voltage distortion. Through this control method, the proposed converter can reduce the output voltage distortion and current ripple of the inverter, thereby reducing the distorted torque. Simulations and experimental results are presented to verify the reliability of the proposed DC/DC converter.

• Journal of Electrical Engineering and Technology
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• 제11권6호
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• pp.1634-1644
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• 2016

In this paper, a current-fed two-inductor bi-directional DC/DC converter using resonance (CF-TIBCR) and its design method are proposed. The CF-TIBCR has characteristics of low current ripple and a high current rating because of two separated inductors. Also, it achieves zero voltage switching for all switches and zero current switching for switches of a low voltage stage by using the resonant tank. Besides, a voltage spike problem in conventional current-fed converters is solved without the need for an additional snubber or clamping circuits. As a result, the CF-TIBCR features high step-up and high efficiency. Since the proposed converter has difficulty achieving the soft-switching condition when the converter requires the low voltage transfer ratio, a method that varies the number of resonant cycles is adopted to extend the output voltage range with satisfying the soft-switching condition. The principles of the operation characteristics are presented with a theoretical analysis, and the proposed converter is verified through results of an experiment using a laboratory prototype.

• The Transactions of the Korean Institute of Power Electronics
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• 제6권5호
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• pp.400-409
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• 2001

A new phase-shifted parallel-input/series-output(PISO) dual converter for tush-power step-up applications has been proposed. Since the proposed converter shows a low switch turn-off voltage stress, switching devices with low conduction loss can be employed in order to improve the power conversion efficiency. Moreover, it features a low output capacitor root-mean-square(RMS) current stress, low input current and output voltage ripple contents, and fast control-to-output dynamics compared to its PWM counterpart. In this paper, the operation of the proposed converter is analyzed in detail and its mathematical models and steady-state solutions are presented. A comparative analysis with the conventional PWM PISO dual converter is also provided. To confirm the operation, features, and validity of the Proposed converter, experimental results from an 800W, 24-350Vdc prototype are presented.

• The Transactions of the Korean Institute of Power Electronics
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• 제17권3호
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• pp.213-221
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• 2012

In a PWM inverter-fed IPMSM (Interior Permanent Magnet Synchronous Motor) drive, a dead time is inserted to prevent a breakdown of switching device caused by the short-circuit of DC link. This distorts the inverter output voltage resulting in a current distortion and torque ripple. In addition to the dead time, nonlinearity exists in switching devices of the PWM inverter, which is generally dependent on operating conditions such as the temperature, DC link voltage, and current. The voltage disturbance caused by the dead time and inverter nonlinearity directly influences on the inverter output performance, and it is known to be more severe at low speed. In this paper, a new compensation scheme for the dead time and inverter nonlinearity under the parameter variation is proposed for a PWM inverter-fed IPMSM drive. The overall system is implemented using DSP TMS320F28335 and the validity of the proposed algorithm is verified through the simulation and experiments.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• 제28권11호
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• pp.68-76
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• 2014

This paper presents an offset error compensation algorithm for the accurate phase angle of the grid voltage in single-phase grid-connected inverters. The offset error generated from the grid voltage measurement process cause the fundamental harmonic component with grid frequency in the synchronous reference frame phase lock loop (PLL). As a result, the grid angle is distorted and the power quality in power systems is degraded. In addition, the dq-axis currents in the synchronous reference frame and phase current have the dc component, first and second order ripples compared with the grid frequency under the distorted grid angle. In this paper, the effects of the offset and scaling errors are analyzed based on the synchronous reference frame PLL. Particularly, the offset error can be estimated from the integrator output of the synchronous reference frame PLL and compensated by using proportional-integral controller. Moreover, the RMS (Root Mean Square) function is proposed to detect the offset error component. The effectiveness of the proposed algorithm is verified through simulation and experiment results.

• The Journal of Korean Institute of Communications and Information Sciences
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• 제34권7A호
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• pp.568-573
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• 2009

This paper presents a step-down DC-DC converter with On-chip Compensation for battery-operated portable electronic devices which are designed in O.13um CMOS standard process. In an effort to decrease system volume, this paper proposes the on chip compensation circuit using capacitor multiplier method. Capacitor multiplier method can minimize error amplifier's compensation capacitor size by 10%. It allows the compensation block of DC-DC converter be easily integrated on a chip and occupy less layout area. But capacitor multiplier operation reduces DC-DC converter efficiency. As a result, this converter shows maximum efficiency over 87.2% for the output voltage of 1.2V (input voltage : 3.3V), maximum load current 500mA, and 25mA output ripple current. This voltage mode controled buck converter has 1MHz switching frequency.

• Journal of the Korean Society of Marine Environment & Safety
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• 제25권6호
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• pp.802-808
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• 2019

DC motors are used extensively on shipboard, including as the ship's winch operating motor, owing to their simple speed control and excellent output torque characteristics. Moreover, they were used as propulsion motors in the early days of electric propulsion ships. However, mechanical rectifiers, such as brushes, used in DC motors have certain disadvantages. Hence, brushless DC (BLDC) motors are increasingly being used instead. While the electrical characteristics of both types of motors are similar, BLDC motors employ electronic rectifying devices, which use semiconductor elements, instead of mechanical rectifying devices. The inverter system for driving conventional BLDC motors uses a two-phase excitation method so that the waveform of the back electromotive force becomes trapezoidal. This causes harmonics and torque ripple in the phase current switching period in which the winding wire through which the current flows is changed. Researchers have studied and presented various methods to reduce the harmonics and torque ripple. This study applies a cascaded H-bridge multilevel inverter, which implements a proportional-integral speed current controller algorithm in the driving circuit of the BLDC motor for electric propulsion ships using a power analysis program. The simulation results of the modeled BLDC motor show that the driving method of the proposed BLDC motor improves the voltage waveform of the input side of the motor and remarkably reduces the harmonics and torque ripple compared with the conventional driving method.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 한국조명전기설비학회 2007년도 추계학술대회 논문집
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• pp.319-322
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• 2007

In the development of paralleling techniques, Multi-Phase Interleaved(MPI) converter constitutes one of the most promising alternatives reported in the last years. This technique consists of a phase shifting of the control signals of several cells in parallel operating at the same switching frequency. As a result, the aggregated input and output current waveform exhibit lower ripple amplitude and smaller harmonics content than in synchronous or stochastic operation modes. Based on the inherent advantages of the MPI converter, in this paper, a control scheme, which can reduce current and voltage rifle, is proposed for PEMFC generation systems. The MPI boost converter is composed of several identical boost converters connected in parallel.

• The Transactions of the Korean Institute of Electrical Engineers B
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• 제53권3호
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• pp.196-205
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• 2004

Although many papers about the interleaved boost converter(IBC) have been published, there are, unfortunately, no analytical and rigorous expressions for steady-state operation of the N-phase IBC. To understand the operating characteristics of the N-phase IBC, the averaged state equation and the general steady-state solutions are derived in this paper. The general expressions of the current unbalance due to the parameter mismatch, the inductor and input current ripples, and the output voltage ripple are also presented. Through the analytical expressions presented, the steady-state characteristics of the N-phase IBC are analyzed theoretically and verified experimentally.