• Title/Summary/Keyword: Output Matching Network

Search Result 95, Processing Time 0.021 seconds

Design and Implementation of QPSK Receiver Using Six-Port Direct Conversion (Six-Port 직접 변환을 이용한 QPSK 수신기 설계 및 제작)

  • Yang, Woo-Jin;Kim, Young-Wan
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
    • /
    • v.18 no.1 s.116
    • /
    • pp.15-23
    • /
    • 2007
  • A simple six-port direct conversion QPSK receiver which is made up of a six-port phase correlator, a signal power detector, and I/Q channel signal de-modulator is designed and implemented in this paper. The output phase signals of six-port phase correlator are also analysed. On the basis of $90^{\circ}C$ phase relation among the six-port phase correlator output signals, the QPSK de-modulation circuit is designed by a simple circuit. The six-port phase correlator is made up of $90^{\circ}$ hybrid branch line and power detector. The six-port phase correlator, which is designed in frequency range of 11.7 to 12.0 GHz, gets the phase error characteristics less than $5^{\circ}$. By considering matching network and amplitude balance in the designed fiequency range, the designed six-port direct conversion QPSK receiver demodulates the I and Q signals with performance less than $5^{\circ}$ phase error.

High-Efficiency CMOS Power Amplifier using Low-Loss PCB Balun with Second Harmonic Impedance Matching (2차 고조파 정합 네트워크를 포함하는 저손실 PCB 발룬을 이용한 고효율 CMOS 전력증폭기)

  • Kim, Hyungyu;Lim, Wonseob;Kang, Hyunuk;Lee, Wooseok;Oh, Sungjae;Oh, Hansik;Yang, Youngoo
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
    • /
    • v.30 no.2
    • /
    • pp.104-110
    • /
    • 2019
  • In this paper, a complementary metal oxide semiconductor(CMOS) power amplifier(PA) integrated circuit operating in the 900 MHz band for long-term evolution(LTE) communication systems is presented. The output matching network based on a transformer was implemented on a printed circuit board for low loss. Simultaneously, to achieve high efficiency of the PA, the second harmonic impedances are controlled. The CMOS PA was fabricated using a $0.18{\mu}m$ CMOS process and measured using an LTE uplink signal with a bandwidth of 10 MHz and peak to average power ratio of 7.2 dB for verification. The implemented CMOS PA module exhibits a power gain of 24.4 dB, power-added efficiency of 34.2%, and an adjacent channel leakage ratio of -30.1 dBc at an average output power level of 24.3 dBm.

A 60 GHz Bidirectional Active Phase Shifter with 130 nm CMOS Common Gate Amplifier (130 nm CMOS 공통 게이트 증폭기를 이용한 60 GHz 양방향 능동 위상변화기)

  • Hyun, Ju-Young;Lee, Kook-Joo
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
    • /
    • v.22 no.11
    • /
    • pp.1111-1116
    • /
    • 2011
  • In this paper, a 60 GHz bidirectional active phase shifter with 130 nm CMOS is presented by replacing CMOS passive switchs in switched-line type phase shifter with Common Gate Amplifier(bidirectional amplifier). Bidirectional active phase shifter is composed of bidirectional amplifier blocks and passive delay line network blocks. The suitable topology of bidirectional amplifier block is CGA(Common Gate Amplifier) topology and matching circuits of input and output are symmetrical due to design same characteristic of it's forward and reverse way. The direction(forward and reverse way) and amplitude of amplification can be controlled by only one bias voltage($V_{DS}$) using combination bias circuit. And passive delay line network blocks are composed of microstrip line. An 1-bit phase shifter is fabricated by Dongbu HiTek 1P8M 130-nm CMOS technology and simulation results present -3 dB average insertion loss and respectively 90 degree and 180 degree phase shift at 60 GHz.

Recognition of Resident Registration Card using ART2-based RBF Network and face Verification (ART2 기반 RBF 네트워크와 얼굴 인증을 이용한 주민등록증 인식)

  • Kim Kwang-Baek;Kim Young-Ju
    • Journal of Intelligence and Information Systems
    • /
    • v.12 no.1
    • /
    • pp.1-15
    • /
    • 2006
  • In Korea, a resident registration card has various personal information such as a present address, a resident registration number, a face picture and a fingerprint. A plastic-type resident card currently used is easy to forge or alter and tricks of forgery grow to be high-degree as time goes on. So, whether a resident card is forged or not is difficult to judge by only an examination with the naked eye. This paper proposed an automatic recognition method of a resident card which recognizes a resident registration number by using a refined ART2-based RBF network newly proposed and authenticates a face picture by a template image matching method. The proposed method, first, extracts areas including a resident registration number and the date of issue from a resident card image by applying Sobel masking, median filtering and horizontal smearing operations to the image in turn. To improve the extraction of individual codes from extracted areas, the original image is binarized by using a high-frequency passing filter and CDM masking is applied to the binaried image fur making image information of individual codes better. Lastly, individual codes, which are targets of recognition, are extracted by applying 4-directional contour tracking algorithm to extracted areas in the binarized image. And this paper proposed a refined ART2-based RBF network to recognize individual codes, which applies ART2 as the loaming structure of the middle layer and dynamicaly adjusts a teaming rate in the teaming of the middle and the output layers by using a fuzzy control method to improve the performance of teaming. Also, for the precise judgement of forgey of a resident card, the proposed method supports a face authentication by using a face template database and a template image matching method. For performance evaluation of the proposed method, this paper maked metamorphoses of an original image of resident card such as a forgey of face picture, an addition of noise, variations of contrast variations of intensity and image blurring, and applied these images with original images to experiments. The results of experiment showed that the proposed method is excellent in the recognition of individual codes and the face authentication fur the automatic recognition of a resident card.

  • PDF

A Study on the Noise Reduction Method for Data Transmission of VLBI Data Processing System (VLBI 자료처리 시스템의 데이터 전송에서 잡음방지에 관한 연구)

  • Son, Do-Sun;Oh, Se-Jin;Yeom, Jae-Hwan;Roh, Duk-Gyoo;Jung, Jin-Seung;Oh, Chung-Sik
    • Journal of the Institute of Convergence Signal Processing
    • /
    • v.12 no.4
    • /
    • pp.333-340
    • /
    • 2011
  • KJJVC(Korea-Japan Joint VLBI Correlator) was installed at the KJCC(Korea-Japan Correlation Center) and has been operated by KASI(Korea Astronomy and Space Science Institute) from 2009. KJNC is able to correlate the VLBI observed data through KVN(Korean VLBI Network), VERA(VLBI Exploration of Radio Astrometry), and JVN(Japanese VLBI Network) and its joint network array. And it is used exclusively as computer in order to process the observed data for the scientific purpose KJJVC used the VSI(VLBI Standard Interface) as the VLBI international standard at the data input-output specification between each component. Especially, for correlating the observed data, the data is transmitted with 1024Mbps speed between Mark5B high-speed playback and RVDB(Raw VLBI Data Buffer). The EMI(Electromagnetic lnterference), which is occurred by data transmission with high-speed, cause the data loss and the loss occurrence is frequently often for long transmission cable. Finally it will be caused the data recognition error by decreasing the voltage level of digital data signal. In this paper, in order to minimize the data loss by measuring the EMI noise level in transmission of the VSI specification, the 3 methods such as 1) RC filtering method, 2) lmpedance matching using Microstrip line, and 3) Signal buffering method using Differential line driver, were proposed. To verify the effectiveness of each proposed method, the performance evaluation was conducted by implementing and simulations for each method. Each proposed method was effectively confirmed as the high-speed data transmission of the VSI specification.

A 0.18-um CMOS 920 MHz RF Front-End for the IEEE 802.15.4g SUN Systems (IEEE 802.15.4g SUN 표준을 지원하는 920 MHz 대역 0.18-um CMOS RF 송수신단 통합 회로단 설계)

  • Park, Min-Kyung;Kim, Jong-Myeong;Lee, Kyoung-Wook;Kim, Chang-Wan
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
    • /
    • 2011.10a
    • /
    • pp.423-424
    • /
    • 2011
  • This paper has proposed a 920 MHz RF front-end for IEEE 802.15.4g SUN (Smart Utility Network) systems. The proposed 920 MHz RF front-end consists of a driver amplifier, a low noise amplifier, and a RF switch. In the TX mode, the driver amplifier has been designed as a single-ended topology to remove a transformer which causes a loss of the output power from the driver amplifier. In addition, a RF switch is located in the RX path not the TX path. In the RX mode, the proposed low noise amplifier can provide a differential output signal when a single-ended input signal has been applied to. A LC resonant circuit is used as both a load of the drive amplifier and a input matching circuit of the low noise amplifier, reducing the chip area. The proposed 920 MHz RF Front-end has been implemented in a 0.18-um CMOS technology. It consumes 3.6 mA in driver amplifier and 3.1 mA in low noise amplifier from a 1.8 V supply voltage.

  • PDF

A Brief Clustering Measurement for the Korean Container Terminals Using Neural Network based Self Organizing Maps (자기조직화지도 신경망을 이용한 국내 컨테이너터미널의 클러스터링 측정소고)

  • Park, Ro-Kyung
    • Journal of Korea Port Economic Association
    • /
    • v.26 no.1
    • /
    • pp.43-60
    • /
    • 2010
  • The purpose of this paper is to show the clustering measurement way for Korean container terminals by using neural network based SOM(Self Organizing Map). Inputs[Number of Employee, Quay Length, Container Terminal Area, Number of Gantry Crane], and output[TEU] are used for 3 years(2002,2003, and 2004) for 8 Korean container terminals by applying both DEA and SOM models. Empirical main results are as follows: First, the result of DEA analysis shows the possibility for clustering among the terminals and reference terminals except Gamcheon and Gwangyang terminals because of the locational closeness. Second, the result of neural network based SOM clustering analysis shows the positive clustering in clustering positions 1, 2, 3, 4, and 5. Third, the results between SOM clustering and DEA clustering show the matching ratio about 67%. The main policy implication based on the findings of this study is that the port policy planner of Ministry of Land, Transport and Maritime Affairs in Korea should introduce the clustering measurement way for the Korean container terminals using neural network based SOM with DEA models for clustering Korean ports and terminals.

A 900 MHz Zero-IF RF Transceiver for IEEE 802.15.4g SUN OFDM Systems

  • Kim, Changwan;Lee, Seungsik;Choi, Sangsung
    • ETRI Journal
    • /
    • v.36 no.3
    • /
    • pp.352-360
    • /
    • 2014
  • This paper presents a 900 MHz zero-IF RF transceiver for IEEE 802.15.4g Smart Utility Networks OFDM systems. The proposed RF transceiver comprises an RF front end, a Tx baseband analog circuit, an Rx baseband analog circuit, and a ${\Delta}{\Sigma}$ fractional-N frequency synthesizer. In the RF front end, re-use of a matching network reduces the chip size of the RF transceiver. Since a T/Rx switch is implemented only at the input of the low noise amplifier, the driver amplifier can deliver its output power to an antenna without any signal loss; thus, leading to a low dc power consumption. The proposed current-driven passive mixer in Rx and voltage-mode passive mixer in Tx can mitigate the IQ crosstalk problem, while maintaining 50% duty-cycle in local oscillator clocks. The overall Rx-baseband circuits can provide a voltage gain of 70 dB with a 1 dB gain control step. The proposed RF transceiver is implemented in a $0.18{\mu}$ CMOS technology and consumes 37 mA in Tx mode and 38 mA in Rx mode from a 1.8 V supply voltage. The fabricated chip shows a Tx average power of -2 dBm, a sensitivity level of -103 dBm at 100 Kbps with PER < 1%, an Rx input $P_{1dB}$ of -11 dBm, and an Rx input IP3 of -2.3 dBm.

High Efficiency Magnetic Resonance Wireless Power Transfer System and Battery Charging Chip (자기 공진 방식의 고효율 무선 전력 전송 시스템 및 배터리 충전 칩)

  • Youn, Jin Hwan;Park, Seong Yeol;Choi, Jun Rim
    • Journal of the Institute of Electronics and Information Engineers
    • /
    • v.52 no.6
    • /
    • pp.43-49
    • /
    • 2015
  • In this paper, we propose enhanced wireless power transfer system based on magnetic resonance for portable electronic device charging. Resonators were designed and fabricated for efficiency improvement and miniaturization through electromagnetism simulation using HFSS(High Frequency Structure Simulator). Impedance matching network is employed to minimize reflections that is caused by difference between input impedance and output impedance. Receiver IC that consist of rectifier and Low Drop Out(LDO) regulator were designed and fabricated to reduce power loss. This chip is implemented in $0.35{\mu}m$ BCD technology. A maximum overall efficiency of 73.8% is determined for the system through experimental verification.

A Highly Linear and Efficient DMB CMOS Power Amplifier with Adaptive Bias Control and 2nd Harmonic Termination circuit (적응형 바이어스 조절 회로와 2차 고조파 종단 회로를 이용한 고선형성 고효율 DMB CMOS 전력증폭기)

  • Choi, Jae-Won;Seo, Chul-Hun
    • Journal of the Institute of Electronics Engineers of Korea TC
    • /
    • v.44 no.1
    • /
    • pp.32-37
    • /
    • 2007
  • A DMB CMOS power amplifier (PA) with high efficiency and linearity is present. For this work, a 0.13-um standard CMOS process is employed and all components of the proposed PA are fully integrated into one chop including output matching network and adaptive bias control circuit. To improve the efficiency and linearity simultaneously, an adaptive bias control circuit is adopted along with second harmonic termination circuit at the drain node. The PA is shown a $P_{1dB}$ of 16.64 dBm, power added efficiency (PAE) of 38.31 %, and power gain of 24.64 dB, respectively. The third-order intermodulation (IMD3) and the fifth-order intermodulation (IMD5) have been -24.122 dBc and -37.156 dBc, respectively.