• The Journal of the Acoustical Society of Korea
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• v.21 no.7
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• pp.648-655
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• 2002

This paper describes implementation of a multi-channel G.723.1 Annex A (G.723.1A) focused on code optimization using a high performance general purpose Digital Signal Processor (DSP), To implement a multi-channel G.723.1A functional complexities of the ITU-T G.723.1A fixed-point C-code are measures an analyzed. Then we sort and optimize C functions in complexity order. In parallel with optimization, we verify the bit-exactness of the optimized code using the ITU-T test vectors. Using only internal memory, the optimized code can perform full-duplex 17 channel processing. In addition, we further increase the number of available channels per DSP into 22 using fast codebook search algorithms, referred to as bit -compatible optimization.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.32 no.1
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• pp.1-9
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• 2022

Fixslicing AES is a technique that omits the Shiftrows step to minimize the cost of the linear layer of Bitsliced AES, showing a 30% performance over the Bitsliced technique. However, the amount of code increases to compensate for the omitted shiftrows. Therefore, it is proposed to be divided into Semi-Fixsliced in which only half of shiftrows are omitted and Fully-Fixsliced in which Shiftrows are omitted completely. In this paper, we propose a CTR mode implementation of Fixslicing AES on RISC-V using the pre-computed table technique. By utilizing the characteristics of the CTR mode, it is possible to perform fast encryption by omitting up to the second round SubBytes from the encryption process through pre-computed up to the second round SubBytes operation. Using this technique, it was confirmed that Semi-Fixsliced has a performance of 1,345 cycles per block and a performance improvement of 7% compared to the previous performance result, and Fully-Fixsliced has a performance of 1,283 cycles per block and a performance of 9% compared to the previous performance result on 32-bit RISC-V.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.33 no.2
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• pp.165-173
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• 2023

In this paper, we propose an optimal implementation of lightweight block ciphers, SIMECK and SIMON counter operation mode, on a 32-bit RISC-V processor. Utilizing the characteristics of the CTR operating mode, we propose round function optimization that precomputes some values, single plaintext optimization and two plaintext parallel optimization. Since there are no previous research results on SIMECK and SIMON on RISC-V, we compared the performance of implementations with and without precomputation techniques for single plaintext optimization and two plaintext parallel optimization implementations. As a result, the implementations to which the precomputation technique was applied showed a performance improvement of 1% compared to the implementations to which precomputation was not applied.

• Smart Structures and Systems
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• v.23 no.4
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• pp.329-335
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• 2019

Structural fuses are made up from oriented steel plates to be used to resist seismic force with shear loading resistance capabilities. The damage and excessive inelastic deformations are concentrated in structural fuses to avoid any issues for the rest of the surrounding elements. Recently developed fuse plates are designed with engineered cutouts leaving flexural or shear links with controlled yielding features. A promising type of link is proposed to align better bending strength along the length of the link with the demand moment diagram is a butterfly-shaped link. Previously, the design methodologies are purely based on the flexural stresses, or shear stresses only, which overestimate the dampers capability for resisting against the applied loadings. This study is specifically focused on the optimized design methodologies for commonly used butterfly-shaped dampers. Numerous studies have shown that the stresses are not uniformly distributed along the length of the dampers; hence, the design methodology and the effective implementation of the steel need revisions and improvements. In this study, the effect of shear and flexural stresses on the behavior of butterfly-shaped links are computationally investigated. The mathematical models based on von-Mises yielding criteria are initially developed and the optimized design methodology is proposed based on the yielding criterion. The optimized design is refined and investigated with the aid of computational investigations in the next step. The proposed design methodology meets the needs of optimized design concepts for butterfly-shaped dampers considering the uniform stress distribution and efficient use of steel.

• Korean Journal of Agricultural Science
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• v.47 no.4
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• pp.951-962
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• 2020

One hundred ninety-five countries reached agreement on a new climate treaty in Paris, France to reduce the carbon emissions. South Korea has been selected as a target country for reducing greenhouse gas (GHG) obligations since 2020. In this context, the Korean government developed several GHG emissions reduction programs using forests called the "Forest carbon offset scheme (FCOS)." The forest management method is one of the tools to implement FCOS. Most of the participants registered forest management as the preferred methodology to participate in the FCOS. For a successful implementation of the FCOS, it is necessary to explore the optimal methods by considering the cost-effective aspect of conducting the forest management as a tool to increase carbon absorption. In this context, this study investigated the value optimized FCOS projects based on the forest management methodology in South Korea. Three forest management scenarios, 1) extending the final age of maturity of Pinus densiflora stands (S1), 2) extending the final age of maturity of Quercus acutissima stands (S2), and 3) reforestation with new species (Pinus densiflora to Quercus acutissima) (S3), were examined and evaluated to identify the optimal carbon absorption and value optimized economic perspective. The results of the scenario-based modelling indicated that S3 showed value optimized from an economical perspective, and S2 was the most effective method to absorb carbon among the scenarios. It is anticipated that this paper will contribute to provide valuable information by presenting innovative approaches as a value optimized FCOS implementing tool in a GHG reduction program in South Korea.

• The Journal of the Korea institute of electronic communication sciences
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• v.10 no.7
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• pp.763-768
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• 2015

In this paper, a microstrip patch antenna with arrow and ribbon shape for WLAN was designed and manufactured. The antenna was designed on a FR-4 substrate that has a thickness of 0.8mm and a dielectric constant of 4.4. The substrate size is $50{\times}40mm^2$. A commercially available tool was used for simulation to get the optimized parameters and the optimized values were obtained by finding the parameters that act sensitively to the performance of the antenna. The proposed antenna was produced using the optimized values, and characteristics of return loss, gain and radiation pattern in WLAN bands were measured.

• Proceedings of the KIEE Conference
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• 1998.07b
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• pp.740-743
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• 1998

This paper presents an optimization algorithm for a stable Dynamic Neural Network (DNN) using genetic algorithm. Optimized DNN is applied to a problem of controlling nonlinear dynamical systems. DNN is dynamic mapping and is better suited for dynamical systems than static forward neural network. The real time implementation is very important, and thus the neuro controller also needs to be designed such that it converges with a relatively small number of training cycles. SDNN has considerably fewer weights than DNN. The object of proposed algorithm is to the number of self dynamic neuron node and the gradient of activation functions are simultaneously optimized by genetic algorithms. To guarantee convergence, an analytic method based on the Lyapunov function is used to find a stable learning for the SDNN. The ability and effectiveness of identifying and controlling, a nonlinear dynamic system using the proposed optimized SDNN considering stability' is demonstrated by case studies.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.10
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• pp.199-203
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• 2013

In this paper, a fast algorithm of discrete cosine transform-based interpolation filter (DCT-IF) for HEVC (high efficiency video coding) encoder is proposed. DCT-IF filter accounts for around 30% of encoder complexity, according to the computational complexity analysis with the HEVC reference software. In this work, the proposed DCT-IF is optimized by applying frame-level interpolation, SIMD optimization, and task-level parallelization via OpenMP on a developed C-based HEVC encoder. Performance analysis is conducted by measuring speed-up factor of the proposed optimization technique on the developed encoder. The results show that speed-up factors by frame-level interpolation, SIMD, and OpenMP are approximately 38-46, 3.6-4.4, and 3.0-3.7, respectively. In the end, we achieved the speed-up factor of 498.4 with the proposed fast algorithm.

• Journal of Electrical Engineering and information Science
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• v.2 no.3
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• pp.41-50
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• 1997

In this paper, we describe the design, implementation and evaluation for a multimedia conferencing system with intramedia and intermedia synchronization support between audio and video. The synchronization mechanism proposed here is capable of dynamically adapting to various network conditions thus providing an optimized QoS. In realizing the system based on this mechanism, NeVoT on Mbone is used for audio and VIC for video. Furthermore a synchromization controller is designed and realized with a unique process in supporting intermedia synchronization. Each media agents handling its media stream are modified with intramedia synchronization function. And a communicative function between media agents and synchronization controller is added as well for intermedia synchronization function. Each media agents function reports its buffering status to the synchronization control process which in turn send out optimized buffering delay value thus supporting intermedia synchronization. The realized system is configured and tested on Ethernet and ATM network where performance measurements were performed and its effective synchronization support has been assured.

• Korean Journal of Computational Design and Engineering
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• v.12 no.6
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• pp.405-412
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• 2007

It's difficult for manufacturers to derive a new design from the demands of consumers as quickly as possible and a designer carries out design operation using insufficient resources in initial design. To carry out initial design process efficiently for an excavator front group, it is necessary for a designer to manage lots of parameter with an existing knowledge or with in-house know-how and develop function module that calculates working range and excavator force. By doing so, it will bring up the optimized values of parameters based on the DOE in the early design stage. In this paper, a new approach to improve the process with optimized parameters is proposed to reduce a product development time of the excavator front design.