• 제어로봇시스템학회:학술대회논문집
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• 1996.10a
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• pp.350-353
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• 1996

In this paper, based on the performance analysis of serial production lines with quality inspection machines, we develope an buffer size optimization method to maximize the production rate. The total sum of buffer sizes are given and a constant, and under this constraint, using the linear approximation method, we suggest a closed form solution for the optimization problem with an acceptable error. Also, we show that the upstream and downstream buffers of the worst performance machine have a significant effect on the production rate. Finally, the suggested methods are validated by simulations.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.273-276
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• 1998

This paper proposes a new Asynchronous Transfer Mode(ATM) switch architecture for the Broadband ISDN. The proposed switch has the architecture to prohibit the out-of-sequence in shared buffer switch system with being fixed buffer size in the out-buffered large scale ATM Switch System. then in this paper proposes cell resequence algorithm to decrease the out-of-sequence problem. also, we studied the out-of-sequence problem that was occurred by the cell transfer delay and the cell overflow due to the fixed buffer size when cell resequenced and we propose to implement optimal ACFIFO(Address Counter First In First Out) buffer size which has the minimized cell loss.

• Proceedings of the Korean Institute of Navigation and Port Research Conference
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• 2000.11a
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• pp.121-129
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• 2000

In this paper, we discuss how to operate a buffer yard in an automated container terminal, which will be used for resolving the difficulties to which the interaction between external manned trucks and internal unmanned equipment led. The determination of fleet size of material handling equipment is an important issue in designing of buffer yard in automated container terminals. This research also addresses the issue of determining buffer capacities through simulation. By using response surface methodology (RSM) for efficient experimentation, the optimal combination of design parameters under applicable operational strategies is obtained.

• IEMEK Journal of Embedded Systems and Applications
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• v.1 no.1
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• pp.8-13
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• 2006

In mobile ad hoc networks, most of on demand routing protocols such as DSR and AODV do not deal with traffic load during the route discovery procedure. To achieve load balancing in networks, many protocols have been proposed. However, existing load balancing schemes do not consider the remaining available buffer size of the interface queue, which still results in buffer overflows by congestion in a certain node which has the least available buffer size in the route. To solve this problem, we propose a load balancing protocol called Dynamic Congestion Aware Routing Protocol (DCAR) which monitors the remaining buffer length of all nodes in routes and excludes a certain congested node during the route discovery procedure. We also propose two buffer threshold values to select an optimal route selection metric between the traffic load and the minimum hop count. Through simulation study, we compare DCAR with other on demand routing protocols and show that the proposed protocol is more efficient when a network is heavily loaded.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.36 no.9B
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• pp.1082-1091
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• 2011

Power-reduction techniques based on DVFS(Dynamic Voltage and Frequency Scaling) are crucial for lengthening operating times of battery powered mobile systems. This paper proposes an optimal DVFS scheduling algorithm for decoders with memory size limitation on display buffer, which is realistic constraints not properly touched in the previous works. Furthermore, we mathematically prove that the proposed algorithm is optimal in the limited display buffer and limited clock frequency model, and also can be used for feasibility check. Simulation results show the proposed algorithm outperformed the previous heuristic algorithms by 7% in average, and the performance of all algorithms using display buffers saturates at about 10 frame size.

• IE interfaces
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• v.14 no.4
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• pp.334-340
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• 2001

The theory of constraints (TOC) has become a valuable system in modern operations management. Using the ideas and methods of the TOC, companies can achieve a large reduction of work-in-process and finished-goods inventories, significant improvement in scheduling performance, and substantial earnings increase. The purpose of this paper is to calculate the optimal size of the time buffer which is used to accommodate disruptions in production processes and provide maximum productivity of capacity constrained resources. After the problem formulation in terms of single server queueing model, we observed the system behavior by sensitivity analyses.

• Proceedings of the IEEK Conference
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• summer
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• pp.57-60
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• 2004

Next generation wireless network is evolving toward IP-based network that can various provide multimedia services. A challenge in wireless mobile Internet is support of quality of service over wireless access networks. DiffServ architecture is proposed for evolving wireless mobile Internet. In this paper we propose an algorithm for optimal buffer partitioning which requires the minimal channel capacity to satisfy the QoS requirements of input traffic. We used a partitioned buffer with size B to serve a layered traffic at each DiffServ router. We consider a traffic model with a single source generates traffic having J $(J\geq2)$ quality of service (QoS) classes. QoS in this case is described by loss probability $\varepsilon_j$. for QoS class j. Traffic is admitted or rejected based on the buffer occupancy and its service class. Traffic is generated by heterogeneous Markov-modulated fluid source (MMFS).

• Earthquakes and Structures
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• v.9 no.1
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• pp.195-219
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• 2015

A partial (hybrid) seismic isolation scheme for precast girder bridges in the form of a "buffer-gap-elastomeric bearings" system has been endorsed in the literature as an efficient seismic design system. However, no guides exist to detail an optimal gap size for different configurations. A numerical study is established herein for different scenarios according to Euro code seismic requirements in order to develop guidelines for the selection of optimal buffer-gap arrangements for various design cases. Various schemes are hence designed for ductile and limited ductility behavior of the bridge piers for different seismic demand levels. Seven real ground records are selected to perform incremental dynamic analysis of the bridges up to failure. Bridges with typical short and high piers are studied; and different values of initial gaps at piers are also investigated varying from a zero gap (i.e., fully locked) condition up to an initial gap at piers that is three quarters the gap left at abutments. Among the main conclusions is that the as-built initial gaps at piers (and especially large gap sizes that are ${\geq}1/2$ as-built gaps at abutments) do not practically reduce the seismic design demand and do not affect the reserve capacity of the bridge against failure for bridges featuring long piers, especially when these bridges are designed a priori for ductile behavior. To the contrary, the "buffer-gap-elastomeric bearings" system is more effective for the bridge schemes with short piers having a large difference between the stiffness of the bearings and that of their supporting (much stiffer) squat piers, particularly for designs with limited ductility. Such effectiveness is even amplified for the case of larger initial as-built gap sizes at piers.

• Journal of the Semiconductor & Display Technology
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• v.20 no.3
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• pp.57-64
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• 2021

The domestic semiconductor industry can produce various products that will satisfy customer needs by diversifying assembly parts and increasing compatibility between them. It is necessary to improve the production line as a method to reduce the work-in-process inventory (WIP) in the assembly line, the idle time of the worker, and the idle time of the process. The improvement of the production line is to balance the capabilities of each process as a whole, and to determine the timing of product input or the order of the work process so that the time required between each process is balanced. The purpose of this study is to find the optimal WIP and buffer size through SA (Simulated Annealing) that minimizes lead time while matching the number of two parts in a parallel assembly line with bottleneck process. The WIP level and buffer size obtained by the SA algorithm were applied to the CONWIP and DBR systems, which are the existing production systems, and the simulation was performed by applying them to the new hybrid production system. Here, the Hybrid method is a combination of CONWIP and DBR methods, and it is a production system created by setting new rules. As a result of the Simulation, the result values were derived based on three criteria: lead time, production volume, and work-in-process inventory. Finally, the effect of the hybrid production method was verified through comparative analysis of the result values.

• Journal of Institute of Control, Robotics and Systems
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• v.3 no.4
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• pp.398-405
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• 1997

This article presents a new model which is called Periodic Square-Wave(PSW) to describe the material flow of the periodic processes involving intermediate buffer. The material flows incoming into and outgoing from the intermediate buffer are assumed to be periodic square shaped. PSW model gives the same result as that of Economic Production Quantity(EPQ) model for determining optimal lot size of single stage batch storage system. However, for batch storage serial train system, PSW model gives a different optimal solution of about 6 % reduced total cost. PSW model provides the more accurate information on inventory and production system than the classical approach by maintaining simplicity and increasing computational burden.