• Title/Summary/Keyword: Operational amplifier

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Active-RC Circuit Synthesis for the Simulation of Current-Controllable Inductors and FDNRs (전류-제어 인덕터 및 FDNR 시뮬레이션을 위한 능동-RC 회로 합성)

  • Park, Ji-Mann;Shin, Hee-Jong;Chung, Won-Sup
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.40 no.12
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    • pp.54-62
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    • 2003
  • A systematic synthesis process is described lot the simulation of current-controllable inductors using operational transconductance amplifiers (OTAs). The process is used to obtain three circuits; two are believed It) be novel. The process is also applied to design current-controllable frequency-dependent negative resistances (FDNRs). Operation principles of designed circuits are presented and experimental results are used to verify theoretical predictions. The results show close agreement between predicted behavior and experimental performance. The application of a FDNR to a current-controllable band-pass filter is also presented.

Design of Frequency to Analog-Voltage Converter (주파수-아날로그 전압 변환 회로의 설계)

  • Choi, Jin-Ho
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.15 no.5
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    • pp.1119-1124
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    • 2011
  • The operation of current conveyor circuit is similar to an operational amplifier and a current conveyor circuit has the characteristics such as good linearity and stability. In this paper, a frequency-to-voltage converter circuit is designed by using a current conveyor circuit. The supply voltage is 5volts and the designed circuit is simulated by HSPICE. The range of the input frequency is from 4kHz to 200kHz. From the simulation results the error of the output voltages is less than from -1.3% to +2.5% compared to the calculated values.

A Study on the Effects of Gain Flatness of Feedforward Power Amplifier for IMT-2000 Band (IMT-2000용 피드포워드 전력 증폭기의 이득 평탄도의 영향에 관한 연구)

  • 정성찬;박천석
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.14 no.7
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    • pp.762-768
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    • 2003
  • This paper reports the effects of gain flatness for linearity improvement of feedforward power amplifier fur IMT-2000 band. To investigate the operational characteristics for gain flatness of each amplifier, WCDMA 4FA input signal was used and measured 10 W output power. Especially, linearity improvement for variation of gain flatness of each amplifier was investigated that have an effect on linearity improvement such as delay line, phase, and amplitude imbalances. Variation of gain flatness of main amplifier is 40 MHz and of error amplifier is 40 MHz and 80 MHz bandwidth, respectively. Measured results, gain flatness of main amplifier is less than 1.5 dB and of error amplifier is less than 0.5 dB for more than 20 dB improvement at 5 MHz offset. In addition to that results, the characteristics of feedforward amplifier are drastically varied by gain flatness of error amplifier and it is shown that gain flatness of error amplifier is more important factor for linearity improvement.

Design of a High Power and High Gain Two-Stage Doherty Power Amplifier (고 출력 고 이득 2단 도허티 전력증폭기의 설계)

  • Ghim, Jae-Gon;Kim, Ji-Yeon;Lee, Dong-Heon;Kim, Jong-Heon
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.17 no.11 s.114
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    • pp.1030-1039
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    • 2006
  • A high power and high gain Doherty amplifier is designed by using embedded driver amplifiers in the final stage. The operational characteristics of a two-stage Doherty amplifier are analyzed, as a function of the two-stage peaking amplifier gate biases. The driver stages and final output stages are implemented using two single-ended MRF21045s and a single push-pull packaged MRF5P21180, respectively. This two-stage Doherty amplifier demonstrated 27 dB gain with a PAE of 23 % at 15 W average output power.

A Study on Composition of VSNR Circuit by Operational Amplifier (확산증폭기에 의한 전압안정 부저항회로의 구성에 대하여)

  • 박의열
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.13 no.6
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    • pp.7-11
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    • 1976
  • A voltage-stable negative resistance circuit with operational amplifier is proposed, and circuit analysis is given all the input voltage range. The behavior of the v-i characteristics in the nogative resistance region is devided into two causes, and top points in the input v-i characteristics of the circuit is analyzed with them. Experimental results of the v-i characteristics of the proposed circuit has a good linearity in the negative region with negative resistance, -86$\Omega$~-833$\Omega$ for the input voltage, $\pm$ 1~$\pm$ 5 colts. The v-i characteristics of the circuit in all the input voltage range is discussed.

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Design of Low Power 4th order ΣΔ Modulator with Single Reconfigurable Amplifier (재구성가능 연산증폭기를 사용한 저전력 4차 델타-시그마 변조기 설계)

  • Sung, Jae-Hyeon;Lee, Dong-Hyun;Yoon, Kwang Sub
    • Journal of the Institute of Electronics and Information Engineers
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    • v.54 no.5
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    • pp.24-32
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    • 2017
  • In this paper, a low power 4th order delta-sigma modulator was designed with a high resolution of 12 bits or more for the biological signal processing. Using time-interleaving technique, 4th order delta-sigma modulator was designed with one operational amplifier. So power consumption can be reduced to 1/4 than a conventional structure. To operate stably in the big difference between the two capacitor for kT/C noise and chip size, the variable-stage amplifier was designed. In the first phase and second phase, the operational amplifier is operating in a 2-stage. In the third and fourth phase, the operational amplifier is operating in a 1-stage. This was significantly improved the stability of the modulator because the phase margin exists within 60~90deg. The proposed delta-sigma modulator is designed in a standard $0.18{\mu}m$ CMOS n-well 1 poly 6 Metal technology and dissipates the power of $354{\mu}W$ with supply voltage of 1.8V. The ENOB of 11.8bit and SNDR of 72.8dB at 250Hz input frequency and 256kHz sampling frequency. From measurement results FOM1 is calculated to 49.6pJ/step and FOM2 is calculated to 154.5dB.

Potentiostat circuits for amperometric sensor (전류법 기반 센서의 정전압 분극 장치 회로)

  • Lim, Shin-Il
    • Journal of Sensor Science and Technology
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    • v.18 no.1
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    • pp.95-101
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    • 2009
  • A simple and new CMOS potentiostat circuit for amperometric sensor is described. To maintain a constant potential between the reference and working electrodes, only one differential difference amplifier (DDA) is needed in proposed design, while conventional potentiosatat requires at least 2 operational amplifiers and 2 resistors, or more than 3 operational amplifiers and 4 resistors for low voltage CMOS integrated potentiostat. The DDA with rail-to-rail design not only enables the full range operation to supply voltage but also provides simple potentiostat system with small hardwares and low power consumption.

An Active-Only Voltage-Mode Integrator and Its Applications

  • Shinji, Ohyama;Kim, Doh-Hyun
    • 제어로봇시스템학회:학술대회논문집
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    • 2001.10a
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    • pp.158.4-158
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    • 2001
  • This paper presents a novel circuit configuration for realizing the continuous-time active-only voltage-mode integrator. The proposed integrator consists only of internally compensated type operational amplifier (OA) and operational transconductance amplifiers (OTAs). Since no external passive elements are required, the integrator is suitable for integrated circuit implementation in either bipolar or CMOS technologies. Moreover, the integrator gain can be electronically tuned by adjusting the bias currents of the OTAs. The characteristics of the proposed integrator and the effectiveness of the design procedure in realizing various analog transfer functions have been examined by PSPICE simulation.

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A Gate-Leakage Insensitive 0.7-V 233-nW ECG Amplifier using Non-Feedback PMOS Pseudo-Resistors in 0.13-μm N-well CMOS

  • Um, Ji-Yong;Sim, Jae-Yoon;Park, Hong-June
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.10 no.4
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    • pp.309-315
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    • 2010
  • A fully-differential low-voltage low-power electrocardiogram (ECG) amplifier by using the nonfeedback PMOS pseudo-resistors is proposed. It consists of two operational-transconductance amplifiers (OTA) in series (a preamplifier and a variable-gain amplifier). To make it insensitive to the gate leakage current of the OTA input transistor, the feedback pseudo-resistor of the conventional ECG amplifier is moved to input branch between the OP amp summing node and the DC reference voltage. Also, an OTA circuit with a Gm boosting block without reducing the output resistance (Ro) is proposed to maximize the OTA DC gain. The measurements shows the frequency bandwidth from 7 Hz to 480 Hz, the midband gain programmable from 48.7 dB to 59.5 dB, the total harmonic distortion (THD) less than 1.21% with a full voltage swing, and the power consumption of 233 nW in a 0.13 ${\mu}m$ CMOS process at the supply voltage of 0.7 V.

Design of High-Gain OP AMP Input Stage Using GaAs MESFETs (갈륨비소 MESFET를 이용한 고이득 연산 증폭기의 입력단 설계)

  • 김학선;김은노;이형재
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.17 no.1
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    • pp.68-79
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    • 1992
  • In the high speed analog system satellite communication system, video signal processing and optical fiber interface circuits, GaAs high gain operational amplifier is advantageous due to obtain a high gain because of its low transconductance and other drawbacks, such as low frequency dispersion and process variation. Therefore in this paper, a circuit techniques for improving the voltage gain for GaAs MESFET amplifier is presented. Also, various types of existing current mirror and current mirror proposed are compared.To obtain the high differential gain, bootstrap gain enhancement technique is used and common mode feedback is employed in differential amplifier.The simulation results show that gain is higher than that of basic amplifier about 18.6dB, and stability and frequency performance of differential amplifier are much improved.

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