• Proceedings of the KIEE Conference
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• 2005.05a
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• pp.148-151
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• 2005

This paper proposes a high speed interface using redundant multi-valued logic for high speed communication ICs. This circuit is composed of encoding circuit that serial binary data are received and converted into parallel redundant multi-valued data, and decoding circuit that convert redundant multi-valued data to parallel binary data. Because of the multi-valued data conversion, this circuit makes it possible to achieve higher operating speeds than that of a conventional binary logic. Using this logic, a 1:4 demultiplexer (DEMUX, serial-parallel converter) IC was designed using a 0.35${\mu}m$ standard CMOS Process. Proposed demultiplexer is achieved an operating speed of 3Gb/s with a supply voltage of 3.3V and with power consumption of 48mW. Designed circuit is limited by maximum operating frequency of process. Therefore, this circuit is to achieve CMOS communication ICs with an operating speed greater than 3Gb/s in submicron process of high of operating frequency.

• Transactions of the Korean Society for Noise and Vibration Engineering
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• v.14 no.5
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• pp.363-369
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• 2004

Vibration/noise analysis as well as strength of gear teeth, roller bearing life. joural bearing design are considered in order to develop the high-speed machine centrifugal pump which had a speed increaser. A Campbell diagram, in which the excitation sources caused by the mass unbalance of the rotors and the transmitted errors of the gearing are considered. shows that. at the operating speed. there are not the critical speed. A high-speed machine centrifugal pump was made in order to evaluate developed speed increaser. Also, strict API standard were introduced for reliability evaluation of developed speed increaser, and performance evaluation were carried out. The result that evaluation items about bearing vibration, shaft vibration, noise, and lubrication temperature were selected, and were tested. a high-speed machine centrifugal pump were able to know what were satisfied with API standard all.

• IEMEK Journal of Embedded Systems and Applications
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• v.6 no.3
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• pp.139-148
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• 2011

As the architecture of automotive software is complicated and LOC of software increases, there is an increasing demand for standard operating system. OSEK/VDX defines an industry standard for automotive operating system and middleware. This paper introduces an implementation of RTOS(OSCAR-OSEK) based on OSEK/VDX standard. For better speed of scheduling, we suggest a new method for ready queue implementation considering the characteristic of automotive application software. Also we introduce a method for improving the portability of RTOS on various MCUs. And, we show OSCAR-OSEK implementation and performance test results.

• Korean Journal of Air-Conditioning and Refrigeration Engineering
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• v.13 no.8
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• pp.746-756
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• 2001

An experimental study was conducted to investigated the effect of refrigerant flow control on the performance of a variable-speed heat pump operating in both cooling and heating mode. For this purpose, cooling and heating capacity, EER and refrigerant mass flow rate corresponding to an electronic valve as well as a capillary tube were measured as functions of compressor speed, length of capillary tube (or valve opening of the electronic valve), refrigerant charge, and outdoor temperature. From the comparison of experimental results, it was found that the performance variation due to the electronic valve opening became significant as the operating conditions(outdoor temperature and compressor speed) deviated from the standard condition at which heating capacity and EER were rated for the indicated capillary tube.

• JSTS:Journal of Semiconductor Technology and Science
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• v.6 no.2
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• pp.74-78
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• 2006

This paper presents a high-speed pulse-based flip-flop with pseudo MUX-type scan compatible with the conventional master-slave flip-flop with MUX-type scan. The proposed flip-flop was implemented as the standard cell library using Samsung 130nm HS technology. The data-to-output delay and power-delay-product of the proposed flip-flop are reduced by up to 59% and 49%, respectively. By using this flop-flop, ARM11 softcore has achieved the maximum 1GHz operating speed.

• Proceedings of the KSR Conference
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• 2010.06a
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• pp.1081-1099
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• 2010

The TVM 430 system manufactured by Ansaldo STS in France is currently used in ground signalling system for Kyungbu HSR. It transmits the speed information to the on-board signalling system in the form of continuous signal via the track, and the rolling stock in Kyungbu HSR runs with 300km/h max. operating speed by using the corresponding information. Looking from the recent international trends in HSR, reducing the travelling time and increasing of the line capacity is promoting via the improvement of train speed. In case of TGV Est, they are realizing the normal operation with 320km/h max. operating speed by using TVM SEI signalling system, which is similar to TVM 430. Furthermore, in case Honam HSL, which is under construction, is looking over faster speed than the limited one of Kyungbu HSR(i.e. over 300km/h). In this paper, it is assumed that the existing TVM 430 ground signalling system is used and train speed is improved, therefore the number of block section to be increased depending on the increase of train speed and the standard speed to be used in this case is drawn via the simulation of the train model and described the method accordingly.

• Journal of Advanced Marine Engineering and Technology
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• v.8 no.2
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• pp.74-80
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• 1984

In the reduction gears for marine propulsion engine such as turbine or high speed diesel engine, the standard involute double helical gears are generally used. However the addendum modification gear can be used in the reduction gear as it has flexibility for gear design on the tooth strength, scoring and operating noise. In this case, the determination of gear shaft bearing load is difficult by the alternation of operating pressure angle. In this paper, the formulas of bearing load according to the arrangements of the reduction gears are derived and the diagrams of operating pressure angle according to the modification coefficient are presented.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.23 no.4
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• pp.16-36
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• 2024

This study, developed a dynamic hard shoulder running(HSR) algorithm that includes ending speed and minimum operation time in addition to the starting speed for HSR, and presented an operation plan. The first stage of the algorithm was red, which means vehicles are prohibited from HSR. The second stage is red/amber, in which drivers are notified of HSR, and operators are given time to check whether there is any obstacle to HSR. Stage 3 is green, which vehicles are permitted for HSR. Stage 4 is amber, in which a signal is given to drivers that the end of HSR is imminent. In addition, a minimum time is applied to green and red, but if congestion is severe, red is terminated early to prevent congestion from worsening. The upstream and downstream traffic flow is managed stably through main line ramp metering and lane number matching. The operating standard speed reflects the characteristics of vehicles and drivers, and based on simulation results, 7090 was selected as the optimal operating standard speed considering traffic flow and safety aspects. Therefore it is desirable to apply the travel time divided by the minimum speed of the HSR link as the minimum operating time in order to ensure continuity of traffic flow

• Journal of IKEEE
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• v.10 no.2 s.19
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• pp.128-133
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• 2006

This paper describes a high speed interface circuit using redundant multi-valued logic for high speed communication ICs. This circuit is composed of encoding circuit that serial binary data are received and converted into parallel redundant multi-valued data, and decoding circuit that converts redundant multi-valued data to parallel binary data. Because of the multi-valued data conversion, this circuit makes it possible to achieve higher operating speeds than that of a conventional binary logic. Using this logic, the proposed 1:4 DEMUX (demultiplexer, serial-parallel converter), was designed using a 0.35um standard CMOS technology. Proposed DEMUX is achieved an operating speed of 4.5Gb/s with a supply voltage of 3.3V and with power consumption of 53mW. The operating speed of this circuit is limited by the maximum frequency which the 0.35um process has. Therefore, this circuit is to achieve CMOS communication ICs with an operating speed greater than 10Gb/s in submicron process of high operating frequency.

• Journal of the Korean Society for Precision Engineering
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• v.29 no.6
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• pp.626-631
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• 2012

In this study, fatigue life of the motor block bracket units for KTX-Sancheon trains was assessed. Design evaluation for railway structures was performed based on the UIC 566 regulation, and test and evaluation of fatigue life in welded parts was performed in accordance with standard ERRI B 12/RP17 and ERRI B 12/RP60. The actual vehicle dynamic stress testing was executed in KTX-Sancheon service line with the service operating speed. The dynamic stress was measured with commercial data acquisition system (MGC plus). The cumulative damage was evaluated by applying standard BS 7608 - Class F and cycle counting was used rain-flow counting method. As a result, the motor block bracket units for KTX-Sancheon trains was designed to fit the regulation and the safety of fatigue life for 30 years, assuming that KTX-Sancheon trains travels 600,000km annually, were confirmed under current operating conditions.