• Journal of the Korean Institute of Telematics and Electronics B
• /
• v.32B no.5
• /
• pp.661-670
• /
• 1995

This paper presents a fast massively parallel automatic test pattern generator for digital combinational logic circuits using neural networks. Automatic test pattern generation neural network(ATPGNN) evolves its state to a stable local minima by exchanging messages among neural network modules. In preprocessing phase, we calculate the essential assignments for the stuck-at faults in fault list by adopting dominator concept. It makes more neurons be fixed and the system speed up. Consequently. fast test pattern generation is achieved. Test patterns for stuck-open faults are generated through getting initialization patterns for the obtained stuck-at faults in the corresponding ATPGNN.

• Proceedings of the KIEE Conference
• /
• 2007.07a
• /
• pp.874-875
• /
• 2007

This paper introduces major potential faults of IPMSM and their simulation realization methods. The faults of IPMSM, generally, contain single-phase open circuit, single-phase or 3-phase short circuit, and uncontrolled generation. When different fault occurs, the circuit of total system including motor and inverter also will be changed. Therefore, it is necessary to analyze and establish independent model for each kind of fault. In this paper, first, the drive circuit is analyzed as different fault type. Then, the corresponding simulation results solved in Simulink@MATLAB are given. The absence of experiment results leads that the veracity of simulation results can not be verified, but the tendency will be explained by theory analysis.

• Journal of Power Electronics
• /
• v.11 no.6
• /
• pp.824-836
• /
• 2011

A new fault-tolerant control topology for open-loop motor-drive systems with Delta-connected stator windings is introduced in this paper. This new control topology enables the operation of a three-phase induction machine as a two-phase machine fed by a three-phase inverter upon a failure in one of the motor phases. This topology utilizes the "open-Delta" configuration to independently control the current in each of the two remaining healthy phases. This new control technique leads to the alleviation of any torque pulsations resulting from the consequences of the asymmetrical conditions associated with this class of faults.

• Journal of Power Electronics
• /
• v.16 no.3
• /
• pp.982-993
• /
• 2016

A method for the fault-tolerant vector control of star-connected 3-phase Induction Motor (IM) drive systems based on Field-Oriented Control (FOC) is proposed in this paper. This method enables the control of a 3-phase IM in the presence of an open-phase failure in one of its phases without the need for control structure changes to the conventional FOC algorithm. The proposed drive system significantly reduces the speed and torque pulsations caused by an open-phase fault in the stator windings. The performance of the proposed method was verified using MATLAB (M-File) simulation as well experimental tests on a 1.5kW 3-phase IM drive system. This paper experimentally compares the operation of the proposed fault-tolerant vector controller and a conventional vector controller during open-phase fault.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.19 no.3
• /
• pp.401-417
• /
• 1994

In this paper, a new testable design technique for domino CMOS circuits is proposed to detect stuck-at(s-at), stuck-open(s-op) and stuck-on(s-on) faults in the circuits by observing logic test reponses. The proposed technique adds one pMOS transistor per domino CMOS gate for s-op and s-on faults testing of nMOS transistors and one nMOS transistors and one nMOS transistor per domino gate or multilevel circuit to detect s-on faults in pMOS transistors of inverters in the circuit. The extra transistors enable the proposed testable circuit to operate like a pseudo static nMOS circuit while testing nMOS transistors in domino CMOS circuits. Therefore, the two=phase operation of a precharge phase and a evaluation phase is not needed to keep the domino CMOS circuit from malfunctionong due to circuit delays in the test mode, which reduces the testing time and the complexity of test generation. Most faults of th transistors in the proposed testable domino CMOS circuit can be detected by single test patterns. The use of single test patterns makes the testing of the proposed testable domino CMOS circuit free from path delays, timing skews, chage sharing and glitches. In the proposed design, the testing of the faults which, require test sequences also becomes free from test invalidation. The conventional automatic test pattern generators(ATPG) can be used for generating test patterns to detect faults in the circuits.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
• /
• v.23 no.6
• /
• pp.40-51
• /
• 2009

To analyze influences under open faults in switching devices of the PWM inverter and under the isolation between the inverter and motor terminal, a faulty model for the inverter-driven permanent magnet synchronous motor is presented. Even though the conventional dq motor model obtained through the transformation of phase voltage model is widely used to analyze and control AC motor, it can not be used under open faults in switching devices since the 3-phase balanced condition is no longer hold under the open fault and it is not easy to obtain motor input voltages in open phase from the pole voltage. To deal with this problem, a faulty model for an inverter-driven permanent magnet synchronous motor is derived by using the line voltage of motor according to switch open, which can be effectively used for performance evaluation of the diagnostic algorithm. The validity of the proposed faulty model is verified through comparative simulations and experiments using DSP TMS320F28335.

• Journal of international Conference on Electrical Machines and Systems
• /
• v.3 no.2
• /
• pp.190-199
• /
• 2014

In the last years, fault problem in power electronics has been more and more investigated both from theoretical and practical point of view. The fault problem can cause equipment failure, data and economical losses. And the analyze system require to ensure fault problem and also rectify failures. The current errors on these faults are applied for identified type of faults. This paper presents technique to detection and identification faults in three-phase voltage source inverter (VSI) by using time-frequency distribution (TFD). TFD capable represent time frequency representation (TFR) in temporal and spectral information. Based on TFR, signal parameters are calculated such as instantaneous average current, instantaneous root mean square current, instantaneous fundamental root mean square current and, instantaneous total current waveform distortion. From on results, the detection of VSI faults could be determined based on characteristic of parameter estimation. And also concluded that the fault detection is capable of identifying the type of inverter fault and can reduce cost maintenance.

• Proceedings of the KIEE Conference
• /
• 1993.11a
• /
• pp.154-156
• /
• 1993

In this paper, fault analysis using simulation method and fault diagnosis scheme are presented for induction motor drive system. Major faults such as inverter 'a' phase open fault, inverter 'a'-'b' phase short circuit fault and inverter 'a' phase ground fault are analyzed and simulated. On-line and off-line fault diagnosis systems are proposed.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
• /
• v.26 no.3
• /
• pp.61-68
• /
• 2012

This paper deals with a fault diagnosis algorithm for open faults in the switching devices of PWM inverter-fed IPMSM (Interior Permanent Magnet Synchronous Motor) drive. The proposed diagnostic algorithm is realized in the controller using the informations of three-phase currents or reference line-to-line voltages, without requiring additional equipments for fault detection. Under switch open fault conditions, the conventional dq model used to control an AC motor cannot directly be applied for the analysis of drive system, since three-phase balanced condition does not hold. To overcome this limitation, a fault model based on the line-to-line voltages is employed for the simulation studies. For comparative performance evaluation through the experiments, the entire control system is implemented using digital signal processor (DSP) TMS320F28335. Simulations and experimental results are presented to verify the validity of the proposed diagnosis algorithm.

• Proceedings of the KIPE Conference
• /
• 2012.07a
• /
• pp.621-622
• /
• 2012

The thermal over-current relay or electronic motor protection relay is mostly used as the open-phase detection device of the three-phase motor or load. When the over-current or overheat of electric line is generated, it detects and operates circuit breaker, but there is the defect that the sensing speed is slow, the operation can be sometimes failed, and the precision is decreased. In order to improve these problems, this paper is proposed a new control circuit topology for open-phase protection using semiconductor devices. Therefore, the proposed open-phase protection device enhances the sensing speed and precision, and has the advantage of simple fitting in the three-phase motor control panel in the field, as it manufactures into small size and light weight.