• Proceedings of the KIEE Conference
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• 2006.07d
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• pp.2149-2150
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• 2006

FLL 회로는 측정된 신호를 voltage to current converter를 거쳐 feedbak coil에 인가함으로써 외부 자장을 상쇄하여 SQUID의 동작점을 원점으로 회귀시켜 선형 구간을 유지하도록 하는 역할을 한다. FLL회로의 동자 범위와 특성을 분석하기 위해서는 일반적인 time-delayed feedback 회로와 사용된 OP amp의 slew rate, filter 의 amplitude 및 위상 특성, SQUID의 critical current, pickup coil 및 SQUID의 inductance 등 다양한 파라미터를 고려하여야 한다. 이러한 SQUID 회로의 복합적인 특성을 SQUID 에뮬레이터를 사용함으로써 FLL 회로를 손쉽게 설계할 수 있고, 또한 회로의 최적화도 쉽게 이를 수 있다. 또한 초전도에서 동작하는 SQUID 나 자기 차폐실이 없어도 FLL 회로 등을 개발할 수 있기 때문에 생체자기시스템의 개발 초기 단계에 널리 활용될 수 있다. 따라서 이 논문의 목적은 FLL을 포함한 SQUID 제어 회로를 SQUID 센서와 분리하기 위한 방법을 제안하는 것으로 자기적으로 coupling되어 있는 feedback 회로를 회로적으로 addition을 수행하게 함으로써 SQUID와 분리하여 회로의 동작 및 특성을 측정할 수 있다.

• Proceedings of the KIEE Conference
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• 2006.10c
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• pp.606-608
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• 2006

This paper describes a 8bit 10MS/s low power pipelined analog-to-digital converter(ADC). To reduce power consumption in proposed ADC, a high gain op-amp that consumes large power in MDAC(multiplying DAC) of conventional pipelined ADC is replaced with simple comparator and current sources. Moreover, differential charge transfer amplifier technique with latch in the sub-ADC reduces the power consumption to less than half compared with the conventional sub-ADC which use high speed comparator. The proposed ADC shows the power consumption of 1.8mW at supply voltage of 1.8V. This proposed ADC is suitable to apply to the portable display device. The circuit was implemented with 0.18um CMOS technology and the core size of circuit is 2.5mm${\times}$1mm.

• JSTS:Journal of Semiconductor Technology and Science
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• v.2 no.4
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• pp.273-279
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• 2002

This paper presents a fabrication technology for the integration of single crystal Si microstructures with on-chip circuitry. It is a dissolved wafer technique that combines an electro-chemical etch-stop for the protection of circuitry with an impurity-based etch-stop for the microstructures, both of which are defined in an n-epi layer on a p-type Si wafer. A CMOS op. amp. has been integrated with $p^{++}$ Si accelerometers using this process. It has a gain of 68 dB and an output swing within 0.2 V of its power supplies, unaffected by the wafer dissolution. The accelerometers have $3{\;}\mu\textrm{m}$ thick suspension beams and $15{\;}\mu\textrm{m}$ thick proof masses. The structural and electrical integrity of the fabricated devices demonstrates the success of the fabrication process. A variety of lead transfer methods are shown, and process details are discussed.

• Speech Sciences
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• v.14 no.4
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• pp.157-167
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• 2007

In this paper, we implemented a single-chip speech recognizer using the TMS320C2000 DSPs. For this implementation, we had developed very small-sized speaker-dependent recognition engine based on dynamic time warping, which is especially suited for embedded systems where the system resources are severely limited. We carried out some optimizations including speed optimization by programming time-critical functions in assembly language, and code size optimization and effective memory allocation. For the TMS320F2801 DSP which has 12Kbyte SRAM and 32Kbyte flash ROM, the recognizer developed can recognize 10 commands. For the TMS320F2808 DSP which has 36Kbyte SRAM and 128Kbyte flash ROM, it has additional capability of outputting the speech sound corresponding to the recognition result. The speech sounds for response, which are captured when the user trains commands, are encoded using ADPCM and saved on flash ROM. The single-chip recognizer needs few parts except for a DSP itself and an OP amp for amplifying microphone output and anti-aliasing. Therefore, this recognizer may play a similar role to dedicated speech recognition chips.

• Journal of information and communication convergence engineering
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• v.13 no.3
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• pp.189-196
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• 2015

In this paper, we present a rotating auto-zeroing offset cancellation technique, which can improve the performance of touch screen sensing circuits. Our target touch screen detection method employs multiple continuous sine waves to achieve a high speed for large touch screens. While conventional auto-zeroing schemes cannot handle such continuous signals properly, the proposed scheme does not suffer from switching noise and provides effective offset cancellation for continuous signals. Experimental results show that the proposed technique improves the signal-to-noise ratio by 14 dB compared to a conventional offset cancellation scheme. For the realistic simulation results, we used Cadence SPECTRE with an accurate TSP model and noise source. We also applied an asymmetric device size (10% MOS size mismatch) to the OP Amp design in order to measure the effectiveness of offset cancellation. We implemented the proposed circuit as part of a touch screen controller system-on-chip by using a Magnachip/SK Hynix 0.18-µm complementary metal-oxide semiconductor (CMOS) process.

• 한국정보디스플레이학회:학술대회논문집
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• 2003.07a
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• pp.686-689
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• 2003

This paper describes two kind of new concept for low power consumption for small area TFT-LCDs. First, the proposed analog buffer could reduce the static current by adopting new scheme. Second, new data driver structure reduced DC power consumption by reducing the number of operational amplifier (op-amp). As simulation results of Hspice, the quiescent current of proposed analog buffer is less than $0.8{\mu}A$ and the DC power consumption is reduced about $40{\sim}50%$ compared with conventional ones.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.437-438
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• 2008

This paper proposes a 8th-order single loop band-pass sigma-delta modulator that satisfies a wide bandwidth of 6MHz, which is required for a HDTV application. The proposed architecture is based on a simple analog structure that enlarges the noise shaping with a low OSR. In addition, a feedforward scheme is used to relax op-amp performance requirements. The proposed modulator has been simulated using the 0.18um 1.8v TSMC technology. The simulation results show that the bandwidth is 6MHz and SNQR is 70dB.

• Proceedings of the IEEK Conference
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• 2001.06b
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• pp.253-256
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• 2001

This paper introduces the design of high-speed analog- to-digital converter for high-definition TV, camcorders, portable equipments and implemented in a 0.65${\mu}{\textrm}{m}$ CMOS technology. Key circuits developed for low power and high speed A/D converter are a dynamic comparator that consumes no static power, a source follower buffered op amp that achives wide bandwidth using large input devices. The converter achieves low power dissipation of 40-mW at 3.3-V power supply. Measured performance includes 0.53 LSB of INL and 0.48 LSB of DNL while sampling at 60MHz.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.6
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• pp.817-824
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• 2016

A simultaneous bidirectional transceiver over a single wire has been developed in a 65 nm CMOS technology for a command and control bus. The echo signals of the simultaneous bidirectional link are cancelled by controlling the decision level of receiver comparators without power-hungry operational amplifier (op-amp) based circuits. With the clock information embedded in the rising edges of the signals sent from the source side to the sink side, the data is recovered by an open-loop digital circuit with 20 times blind oversampling. The data rate of the simultaneous bidirectional transceiver in each direction is 75 Mbps and therefore the overall signaling bandwidth is 150 Mbps. The measured energy efficiency of the transceiver is 56.7 pJ/b and the bit-error-rate (BER) is less than $10^{-12}$ with $2^7-1$ pseudo-random binary sequence (PRBS) pattern for both signaling directions.

• Proceedings of the KIEE Conference
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• 1995.11a
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• pp.376-378
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• 1995

A method is presented for the design and fabrication of the temperature compensation circuits on the Clark electrodes for measuring the dissolved oxygen(DO) concentration. The discussion includes a method of the sensor interface circuits for the DO sensor. Typical polarograms for the DO probes under test using this sensor circuits are presented. High accuracy over 99 % of the I to V conversion using the proposed circuit is verified. Temperature dependence for the test DO probe is well compensated automatically using the thermistor($2k\Omega,\;25^{\circ}C$) in series with correction resistor in the feedback loop of the op-amp circuit in the temperature range of the 0-50$^{\circ}C$.