• The Transactions of the Korean Institute of Electrical Engineers C
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• v.48 no.5
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• pp.315-318
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• 1999

We have proposed and fabricated the new bottom-gated polycrystalline silicon (poly-Si) thin film transistor (TFT) with a partial amorphous-Si region by employing the selective laser annealing. The channel layer of the proposed TFTs is composed of poly-Si region in the center and a-Si region in the edge. The TEM image shows that the local a-Si region is successfully fabricated by the effective cut out of the incident laser light in the upper a-Si layer. Our experimental results show that the ON/OFF current ratio is increased significantly by more than three orders in the new poly-Si TFT compared with conventional poly-Si TFT. The leakage current is decreased significantly due to the highly resistive a-Si re TFTs while the ON-series resistance of the local a-Si is reduced significantly due to the considerable inducement of electron carriers by the positive gate bias, so that the ON-current is not decreased much.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.11
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• pp.15-19
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• 2007

This paper reports the effects of Ar ion beam surface treatment on a $SiO_2$ dielectric layer in organic thin film transistors. We compared the electrical properties of pentacene-based OTFTs, treated by $O_2$ plasma or Ar ion beam treatments and characterized the states of the surface of the dielectric by using atomic force microscopy and X-ray photoelectron spectroscopy. For the sample which received $O_2$ plasma treatment, the mobility increased significantly but the on/off current ratio was found very low. The Ar ion beam-treated sample showed a very high on/off current ratio as well as a moderately improved mobility. XPS data taken from the dielectric surfaces after each of treatments exhibit that the ratio of between Si-O bonds and O-Si-O bonds was much higher in the $O_2$ plasma treated surface than in the Ar ion beam treated surface. We believe that our surface treatment using an inert gas, Ar, carried out an effective surface cleaning while keeping surface damage very low, and also the improved device performances was achieved as a consequence of improved surface condition.

• Current Optics and Photonics
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• v.1 no.3
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• pp.239-246
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• 2017

A compact plasmonic switching scheme, based on the phase change of a thin-film chalcogenide material ($Ge_2Sb_2Te_5$), is proposed and numerically investigated at optical-communication wavelengths. Surface plasmon polariton modal analysis is conducted for various thicknesses of dielectric and phase-change material layers, and the optimized condition is induced by finding the region of interest that shows a high extinction ratio of surface plasmon polariton modes before and after the phase transition. Full electromagnetic simulations show that multiple reflections inside the active region may conditionally increase the overall efficiency of the on/off ratio at a specific length of the active region. However, it is shown that the optimized geometrical condition, which shows generally large on/off ratio for any length of active region, can be distinguished by observing the multiple-reflection characteristic inside the active region. The proposed scheme shows an on/off switching ratio greater than 30 dB for a length of a few micrometers, which can be potentially applied to integrated active plasmonic systems.

• Biotechnology and Bioprocess Engineering:BBE
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• v.4 no.1
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• pp.46-50
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• 1999

The application of pulsed electric field was investigated in the crossflow ultrafiltration of BSA (bovine serum albumn) to economize the application time of electric current as well as to avoid inherent problems of long-term application of electric field. During the application of various cyclic patterns of pulsed electric current, the averaged filtration flowrate and the degree of concentration were maintained higher than those obtained in the absence of electric current application. The temperature increase, pH change, and BSA loss by electrodeposition were all negligible during the operation. The averaged filtration flowrate increased as the ON/OFF duration ratio of electric current was higher and as the period of ON/OFF cycle was shorter. The re-establishment of concentration polarization was dependent to the duration of current OFF state and, therefore, a longer duration of OFF state was not favorable in maintaining higher filtration flow rate. Although the averaged filtration flowrate was enhanced as the magnitude of electric current increased, the flowrate enhancement became smaller as the magnitude of current value above which the degree of electrokinetic depolarization is no further improved.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.8 no.4
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• pp.738-742
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• 2007

The variations in the device characteristics of hydrogenated amorphous thin-film transistors (a-Si:H TFTs) were studied according to the processes of pixel electrode fabrication to make active-matrix flat-panel displays. The off-state current was about 1 pA and the switching ratio was over $10^6$ before fabrication of pixel electrodes; however, the off-state current increased over 10 pA after fabrication of pixel electrodes. Surface treatment on SiNx passivation layers using plasma could improve the off-state characteristics after pixel electrode process. $N_2$ plasma treatment gave the best result. Charge accumulation on the SiNx passivation layer during the deposition of transparent conducting layer might cause the increase of off-state current after the fabrication of pixel electrodes.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.24 no.7
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• pp.525-531
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• 2011

In this paper, experimental analyses have been performed to compare the electrical characteristics of n channel LT(low temperature) and HT(high temperature) poly-Si TFTs(polycrystalline silicon thin film transistors) on quartz substrate according to activated step annealing. The size of the particles step annealed at low temperature are bigger than high temperature poly-Si TFTs and measurements show that the electric characteristics those are transconductance, threshold voltage, electric effective mobility, on and off current of step annealed at LT poly-Si TFTs are high more than HT poly-Si TFT's. Especially we can estimated the defect in the activated grade poly crystalline silicon and the grain boundary of LT poly-Si TFT have more high than HT poly-Si TFT's due to high off electric current. Even though the size of particles of step annealed at low temperature, the electrical characteristics of LT poly-Si TFTs were investigated deterioration phenomena that is decrease on/off current ratio depend on high off current due to defects in active silicon layer.

• 한국정보디스플레이학회:학술대회논문집
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• 2004.08a
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• pp.889-892
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• 2004

We developed a high performance bottom contact, organic thin-film transistor (OTFT) array on plastic using a self-organized process. The effect of OTS treatment on the PVP gate insulator for the performance of OTFT on plastic has been studied The OTFT without OTS exhibited a field-effect mobility of 0.1 $cm^2$/Vs on/off current ratio of > $10^7$. On the other hand, OTFT with OTS, exhibited a field-effect mobility of 1.3 $cm^2$/Vs and on/off current ratio of>$10^8$.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.579-580
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• 2006

Simple nonoverlapped source/drain-to-gate MOSFETs to suppress GIDL (gate-induced drain leakage) is simulated with SILVACO simulation tool. Changing spacer thickness for adjusting length of Drain to Gate nonoverlapped region, this simulation observes on/off characteristic of nonoverlapped source/drain-to-gate MOSFETs. Off current is dramatically decreased with S/D to gate nonoverlapped length increasing. The result shows that maximum on/off current ratio is achieved by adjusting nonoverlapped length.

• Proceedings of the KIEE Conference
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• 1993.07b
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• pp.1292-1294
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• 1993

This paper proposes a new structure of polycrystalline silicon(poly-Si) thin film transistor(TFT) having a thick gate-oxide below the gate edge. The new structure is fabricated by the gate re-oxidation in wet ambient. It is shown that the thick gate-oxide below the gate edge is effective in reducing the leakage current and the gate-drain overlap capacitance. We have simulated this device by using the SSUPREM4 process simulator and the SPISCES-2B device simulator. As a simulation result it is found that the new structure provides a low tentage current less than 0.2 pA and achieves a on/off ratio as high as $5{\times}10^7$.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.2
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• pp.163-168
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• 2014

Bottom gate thin-film transistors were fabricated using solution processed IGZO channel layers with various gallium composition ratios that were annealed on a hot plate. Increasing the gallium ratio from 0.1 to 0.6 induced a threshold voltage shift in the electrical characteristics, whereas the molar ratio of In:Zn was fixed to 1:1. Among the devices, the IGZO-TFTs with gallium ratios of 0.4 and 0.5 exhibited suitable switching characteristics with low off-current and low SS values. The IGZO-TFTs prepared from IGZO films with a gallium ratio of 0.4 showed a mobility, on/off current ratio, threshold voltage, and subthreshold swing value of $0.1135cm^2/V{\cdot}s$, ${\sim}10^6$, 0.8 V, and 0.69 V/dec, respectively. IGZO-TFTs annealed at $300^{\circ}C$, $350^{\circ}C$, and $400^{\circ}C$ were also fabricated. Annealing at lower temperatures induced a positive shift in the threshold voltage and produced inferior electrical properties.