• Journal of the Microelectronics and Packaging Society
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• v.22 no.4
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• pp.71-76
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• 2015

Recently, light emitting diodes (LEDs) have been studied to improve their efficiencies for the uses in various fields. Particularly in the aspect of chip structure, via hole type vertical LED chip is developed for improvement of light output power, and heat dissipations. However, current vertical type LEDs have still drawback, which is current concentration around the n-contact holes. In this research, to solve this phenomenon, we introduced isolation layer under n-contact electrodes. With this sub-electrode, even though the active area was decreased by about 2.7% compared with conventional via-hole type vertical LED, we could decrease the forward voltage by 0.2 V and wall-plug efficiency was improved approximately 4.2%. This is owing to uniform current flow through the area of n-contact.

• Journal of the Microelectronics and Packaging Society
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• v.17 no.4
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• pp.11-17
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• 2010

The electromigration phenomenon in lead-free flip-chip solder joint has been one of the serious problems. To understand the mechanism of this phenomenon, the crystallographic orientation of Sn grain in the Sn-Ag-Cu solder bump has been analyzed. Different time to failure and different microstructural changes were observed in the all test vehicle and bumps, respectively. Fast failure and serious dissolution of Cu electrode was observed when the c-axis of Sn grain parallel to electron flow. On the contrary of this, slight microstructural changes were observed when the c-axis of Sn perpendicular to electron flow. In addition, underfill could enhance the electromigration reliability to prevent the deformation of solder bump during EM test.

• Journal of the Microelectronics and Packaging Society
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• v.22 no.2
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• pp.27-31
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• 2015

Thermal management becomes a key technology as the power density of high performance and high density devices increases. Conventional heat sink or TIM methods will be limited to resolve thermal problems of next-generation IC devices. Recently, to increase heat flux through high powered IC devices liquid cooling system has been actively studied. In this study a chip-level liquid cooling system with TSV and microchannel was fabricated on Si wafer using DRIE process and analyzed the cooling characteristics. Three different TSV shapes were fabricated and the effect of TSV shapes was analyzed. The shape of liquid flowing through microchannel was observed by fluorescence microscope. The temperature differential of liquid cooling system was measured by IR microscope from RT to $300^{\circ}C$.

• Journal of the Microelectronics and Packaging Society
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• v.25 no.3
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• pp.21-30
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• 2018

Driven by the recent energy saving trend, conventional silicon based power conversion modules are being replaced by modules using silicon carbide. Previous papers have focused mainly on the electrical advantages of silicon carbide semiconductors that can be used to design switching devices with much lower losses than conventional silicon based devices. However, no systematic study of their thermomechanical reliability in power conversion modules using finite element method (FEM) simulation has been presented. In this paper, silicon and silicon carbide based power devices with three-phase switching were designed and compared from the viewpoint of thermomechanical reliability. The switching loss of power conversion module was measured by the switching loss evaluation system and measured switching loss data was used for the thermal FEM simulation. Temperature and stress/strain distributions were analyzed. Finally, a thermal fatigue simulation was conducted to analyze the creep phenomenon of the joining materials. It was shown that at the working frequency of 20 kHz, the maximum temperature and stress of the power conversion module with SiC chips were reduced by 56% and 47%, respectively, compared with Si chips. In addition, the creep equivalent strain of joining material in SiC chip was reduced by 53% after thermal cycle, compared with the joining material in Si chip.

• Journal of the Microelectronics and Packaging Society
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• v.7 no.1
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• pp.1-5
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• 2000

Co-fired resistors for high frequency MCM-C (Multi Chip Module-Cofired) were fabricated and measured their RF properties from DC to 6 GHz. LTCC (Low Temperature Co-fired Ceramics) substrates with 8 layers were used as the substrates. Resisters and electrodes were printed on the 7th layer and connected to the top layer by via holes. Deviation from DC resistance of the resistors was resulted from the resister pastes, resistor size, and via length. From the experimental results, the suitable equivalent circuit model was adopted with resistor, transmission line, capacitor, and inductor. The characteristic impedance $Z_{o}$ of the transmission line from the equivalent circuit can explain the RF behavior of the buried resistor according to the structural variation.

• Journal of the Microelectronics and Packaging Society
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• v.14 no.3
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• pp.21-27
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• 2007

Nickel bumps for ACF(anisotropic conductive film) flip chip application were fabricated by electroless and electro plating and their mechanical properties and impact reliability were examined through the compressive test, bump shear test and drop test. Stress-displacement curves were obtained from the load-displacement data in the compressive test using nano-indenter. Electroplated nickel bumps showed much lower elastic stress limits (70MPa) and elastic moduli ($7.8{\times}10^{-4}MPa/nm$) than electroless plated nickel bumps ($600-800MPa,\;9.7{\times}10^{-3}MPa/nm$). In the bump shear test, the electroless plated nickel bumps were deformed little by the test blade and bounded off from the pad at a low shear load, whereas the electroplated nickel bumps allowed large amount of plastic deformation and higher shear load. Both electroless and electro plated nickel bumps bonded by ACF flip chip method showed high impact reliability in the drop impact test.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2002.11a
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• pp.159-163
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• 2002

So far, many kinds of researches on the chip components and MCM-C RF module especially on the 3-dimensional ceramic module using embedded passives have been performed. LTCC system has many kinds of advantages, like low loss, low cost of process, stability of process etc..The electrical behaviors of components are affected by that of the material systems including dielectrics and conductors. In this study, many kinds of conductor pastes in the variation with metal content and grain size are fabricated and their effect on the characteristics of stripline resonator are examined upto 6 ㎓.

• Proceedings of the KSME Conference
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• 2007.05b
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• pp.2449-2452
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• 2007

Hot spots on thin wafers of IC packages are becoming important issues in thermal and electrical engineering fields. To investigate these hot spots, we developed a Diode Temperature Sensor Array (DTSA) that consists of an array of 32 ${\times}$32 diodes (1,024 diodes) in a 8 mm ${\times}$ 8 mm surface area. To know specifically the hot spot temperature which is affected by the chip thickness and a generated power, we made the DTSA chips, which have 21.5 ${\mu}m$, 31 ${\mu}m$, 42 ${\mu}m$, 100 ${\mu}m$, 200 ${\mu}m$, and 400 ${\mu}m$ thickness using the CMP process. And we conducted the experiment using various heater power conditions (0.2 W, 0.3 W, 0.4 W, 0.5 W). In order to validate experimental results, we performed a numerical simulation. Errors between experimental results and numerical data are less than 4%. Finally, we proposed a correlation for the hot spot temperature as a function of the generated power and the wafer thickness based on the results of the experiment. This correlation can give an easy estimate of the hot spot temperature for flip chip packaging when the wafer thickness and the generated power are given.

• Journal of the Korean Society of Manufacturing Technology Engineers
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• v.24 no.1
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• pp.117-123
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• 2015

The need for drop simulations for board-leveled flip chips in micro-system packaging has been increasing. There have been many studies on flip chips with various solder ball compositions. However, studies on flip chips with Sn-1.0Ag-0.5Cu and Sn-3.0Ag-0.5Cu have rarely been attempted because of the unknown material properties. According to recent studies, drop simulations with these solder ball compositions have proven feasible. In this study, predictions of the impact lifetime by drop simulations are performed considering Cu and Cu/Ni UBMs using LS-DYNA to alter the design parameters of the flip chips, such as thickness of the flip chip and size of the solder ball. It was found that a smaller chip thickness, larger solder ball diameter, and using the Cu/Ni UBM can improve the drop lifetime of solder balls.

• Transactions of the Korean Society of Mechanical Engineers
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• v.18 no.8
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• pp.2158-2166
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• 1994

In order to understand the package crack emanating from the edge of leadframe after the delamination between leadframe and epoxy molding compound in an electronic packaging of surface mounting type, the M-integral and J-integral in fracture mechanics are obtained. The effects of geometry, material properties and molding process temperature on the package crack are investigated taking into account the temperature dependence of the material properties, which simulates a more realistic condition. If the temperature dependence of the material properties is considered the result of analysis conforms with observations that the crack is kinked at between 50 and 65 degree. However, in case of constant material properties at the room temperature it is found that the J-integral is underestimated and the kink crack angle is different form the observation. The effects of the material properties and molding process temperature on J-integral and crack angle are less significant that the chip size for the cases considered here. It is suggested that the geometric factors such as ship size, leadframe size are to be well designed in order to prevent(or control) the occurrence and propagation of the package crack.