• Title/Summary/Keyword: On-chip

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플립칩의 매개변수 변화에 따른 보드레벨의 동적신뢰성평가 (Dynamic Reliability of Board Level by Changing the Design Parameters of Flip Chips)

  • 김성걸;임은모
    • 한국생산제조학회지
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    • 제20권5호
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    • pp.559-563
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    • 2011
  • Drop impact reliability assessment of solder joints on the flip chip is one of the critical issues for micro system packaging. Our previous researches have been showing that new solder ball compositions of Sn-3.0Ag-0.5Cu has better mechanical reliability than Sn-1.0Ag-0.5Cu. In this paper, dynamic reliability analysis using Finite Element Analysis (FEA) is carried out to assess the factors affecting flip chip in drop simulation. The design parameters are size and thickness of chip, and size, pitch and array of solder ball with composition of Sn1.0Ag0.5Cu. The board systems by JEDEC standard including 15 chips, solder balls and PCB are modeled with various design parameter combinations, and through these simulations, maximum yield stress and strain at each chip are shown at the solder balls. It is found that larger chip size, smaller chip array, smaller ball diameter, larger pitch, and larger chip thickness have bad effect on maximum yield stress and strain at solder ball of each chip.

반도체 Package 공정에서 MCP(Multi-chip Package)의 Layer Sequence 제약을 고려한 스케쥴링 방법론 (Scheduling Methodology for MCP(Multi-chip Package) with Layer Sequence Constraint in Semiconductor Package)

  • 정영현;조강훈;정유인;박상철
    • 한국시뮬레이션학회논문지
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    • 제26권1호
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    • pp.69-75
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    • 2017
  • MCP(Multi-chip Package)는 두 개 이상의 Chip을 적층하여 하나의 패키지로 합친 제품이다. MCP를 만들기 위해서는 두 개 이상의 Chip이 동일한 Substrate에 적층되기 때문에 다수의 조립 공정이 필요하다. Package 공정에서는 Lot들이 동일한 특성을 가지는 Chip으로 구성되고 MCP를 구성하는 Chip의 특성은 Layer sequence에 의해 결정된다. MCP 생산 공정에서 WIP Balance 뿐만 아니라 Throughput을 달성하기 위해서는 Chip의 Layer sequence가 중요하다. 본 논문에서는 Chip들의 Layer sequence의 제약 조건을 고려한 스케쥴링 방법론을 제안한다.

몰딩공정을 응용한 플립칩 언더필 연구 (Studies on Flip Chip Underfill Process by using Molding System)

  • 한세진;정철화;차재원;서화일;김광선
    • 반도체디스플레이기술학회지
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    • 제1권1호
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    • pp.29-33
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    • 2002
  • In the flip-chip process, the problem like electric defect or fatigue crack caused by the difference of CTE, between chip and substrate board had occurred. Underfill of flip chip to overcome this defects is noticed as important work developing in whole reliability of chip by protecting the chip against the external shock. In this paper, we introduce the underfill methods using mold and plunge and improvement of process and reliability, and the advantage which can be taken from embodiment of device.

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단일칩 LED와 RGB 멀티칩 LED의 백색광 특성 및 색 보임에 대한 주관평가 연구 (The Subjective Evaluation on White Light Property and Color Appearance of Single Chip LED and RGB Multi Chip LED)

  • 심윤주;김인태;최안섭
    • 조명전기설비학회논문지
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    • 제29권1호
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    • pp.1-8
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    • 2015
  • To produce the white light, there are a single chip method using the blue light and phosphor coating, a multi chip method by mixing R, G, B light.. Multi chip method is proper for the smart lighting system by controling color and color temperature. And color rendering of single chip LED is good by even spectral distribution. To apply application technic like smart light system, this paper analyzed the properties of single chip LED and RGB multi chip LED, and implemented the 2 part subject evaluation for single chip LED and RGB multi chip LED. The first part is comparison of properties for single chip LED and RGB multi chip and second part is color appearance evaluation of 8 colors in each lighting environment.

플립-칩 본딩된 UHF RFID 태그 칩의 임피던스 및 읽기 전력감도 산출방법 (Impedance and Read Power Sensitivity Evaluation of Flip-Chip Bonded UHF RFID Tag Chip)

  • 양진모
    • 전자공학회논문지
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    • 제50권4호
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    • pp.203-211
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    • 2013
  • 태그 안테나를 설계할 때에는 태그 칩이 패드(pad)에 마운트(mount)된 상태에서 구한 칩 임피던스(chip impedance)와 읽기 전력감도(read power sensitivity) 값이 필요하다. 하지만 칩 임피던스 값은 태그 설계와 제조공정에 따라 그 값이 달라지기 때문에 칩 제조회사들이 이 자료를 제공하지 못하고, 단지 참고할 수 있는 근사값을 만을 제고하고 있다. 본 연구는 간단한 보조기구들과 RF 측정장비들을 가지고 마운트된 칩의 임피던스와 읽기 전력감도를 산출할 수 있는 방법을 제시한다. 본 연구는 마운틴된 칩의 단자에서 직접 측정하는 것이 불가능하기 때문에 보조 픽스쳐(fixture)들이 사용되었으며, 보조 픽스쳐에서 발생되는 전기력 특성들은 등가회로 모델과 디임베드(de-embed) 기법을 사용하여 제거함으로써 칩 임피던스와 읽기 전력감도 값을 산출하였다. 값을 알고 있는 커패시터와 저항 칩을 가지고 제안된 디임베드 방법의 타당성과 정확도를 검증하였으며, 상업용 태그 칩을 대상으로 한 심험에서도 제안된 방법의 타당성을 재확인 할 수 있다.

Recent Development of Protein Microarray and Proteogen Platform

  • Han, Moon-Hi;Kang, In-Cheol;Lee, Yoon-Suk;Cho, Yong-Wan;Lee, Eun-Kyoung
    • 한국생물공학회:학술대회논문집
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    • 한국생물공학회 2005년도 생물공학의 동향(XVI)
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    • pp.47-47
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    • 2005
  • There are many different surface technologies currently applied for preparation of protein chips. However, it requires innovative surface chemistry for capture proteins to be immobilized on chip surface keeping their conformation and activity intact and their orientation right, while they bind tightly and densely in a given array spot. Proteogen has developed 'ProteoChip BP' coated with novel proprietary linker molecules $(ProLinker^{TM})$ for efficient and robust immobilizations of capture proteins by improving surface properties of molecular captures. It was demonstrated that $ProLinker^{TM}$ gave the best surface performance in preparation of protein microarray chip base plates among others currently available on the market. In particular, the $ProLinker^{TM}-based$ surface chemistry has demonstrated to provide excellent performance in preparation of 'Antibody Chip' for analysis of biomarkers as well as proteome expression profiles. The linker molecule has also shown to be well applicable for development of biosensors and micro-beads as well as protein microarray and nano-array. ProteoChip BP can be used either for preparation of high-density array by using a microarrayer or for preparation of 'Well-on-a-Chip' with low density array, which is better applicable for quantitative analysis of biomarkers or protein-protein interactions. The biomarker assay can be performed either by direct or sandwich methods of fluorescence immunoassay. Application of ProteoChip BP has been well demonstrated by the extensive studies of 1) tumor-marker assays, 2) new drug screening by using 'Integrin Chip' and 3) protein expression profile analysis. Some of experimental results will be presented.

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Development of Pattern Classifying System for cDNA-Chip Image Data Analysis

  • Kim, Dae-Wook;Park, Chang-Hyun;Sim, Kwee-Bo
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 2005년도 ICCAS
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    • pp.838-841
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    • 2005
  • DNA Chip is able to show DNA-Data that includes diseases of sample to User by using complementary characters of DNA. So this paper studied Neural Network algorithm for Image data processing of DNA-chip. DNA chip outputs image data of colors and intensities of lights when some sample DNA is putted on DNA-chip, and we can classify pattern of these image data on user pc environment through artificial neural network and some of image processing algorithms. Ultimate aim is developing of pattern classifying algorithm, simulating this algorithm and so getting information of one's diseases through applying this algorithm. Namely, this paper study artificial neural network algorithm for classifying pattern of image data that is obtained from DNA-chip. And, by using histogram, gradient edge, ANN and learning algorithm, we can analyze and classifying pattern of this DNA-chip image data. so we are able to monitor, and simulating this algorithm.

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Determination of stress state in chip formation zone by central slip-line field

  • Andrey Toropov;Ko, Sung-Lim
    • 한국정밀공학회:학술대회논문집
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    • 한국정밀공학회 2003년도 춘계학술대회 논문집
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    • pp.577-580
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    • 2003
  • Stress state of chip formation zone is one of the main problems in metal cutting mechanics. In two-dimensional case this process is usually considered as consistent shears of work material along single of several shear surfaces. separating chip from workpiece. These shear planes are assumed to be trajectories of maximum shear stress forming corresponding slip-line field. This paper suggests new approach to the constriction of slip-line field, which Implies uniform compression in chip formation zone. On the base of given model it has been found that imaginary shear line in orthogonal cutting is close to the trajectory of maximum normal stress and the problem about its determination have been considered. It has been shown that there is a second central slip-line field inside chip, which corresponds well to experimental data about stress distribution on tool rake face and tool-chip contact length. The suggested model could be useful in solution of various problems of machining.

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유한유쇼법을 이용한 미소절삭기구의 절삭인자 규명에 관한 연구 (A study on the effect of cutting parameters of micro metal cutting mechanism using finite element method)

  • 황준;남궁석
    • 한국정밀공학회지
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    • 제10권4호
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    • pp.206-215
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    • 1993
  • The finite element method is applied to analyze the mechanism of metal cutting, especially micro metal cutting. This paper introduces some effects, such as constitutive deformation laws of workpiece material, friction of tool-chip contact interfaces, tool rake angle and also simulate the cutting process, chip formation and geometry, tool-chip contact, reaction force of tool. Under the usual plane strain assumption, quasi-static analysis were performed with variation of tool-chip interface friction coefficients and tool rake angles. In this analysis, cutting speed, cutting depth set to 8m/sec, 0.02mm, respectively. Some cutting parameters are affected to cutting force, plastic deformation of chip, shear plane angle, chip thickness and tool-chip contact length and reaction forces on tool. Several aspects of the metal cutting process predicted by the finite element analysis provide information about tool shape design and optimal cutting conditions.

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Magnetic Bead-Based Immunoassay on a Microfluidic Lab-on-a-Chip

  • Park, Jin-Woo;Chong H. Ahn
    • 전자공학회지
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    • 제29권3호
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    • pp.41-48
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    • 2002
  • This paper presents a basic concept of lab-on-a-chip systems and their advantages in chemical and biological analyses. In addition, magnetic bead-based immunoassay on a microfluidic system is also presented as a typical example of lab-on-chip systems. Rapid and low volume immunoassays have been successfully achieved on the demonstrated lab-on-a-chip using magnetic beads, which are used as both immobilization surfaces and bio-molecule carriers. Total time required for an immunoassay was less than 20 minutes including sample incubation time, and sample volume wasted was less than $50{\mu}l$ during five repeated assays. Lab-on-a-chip is becoming a revolutionary tool for many different applications in chemical and biological analysis due to its fascinating advantages (fast and low cost) over conventional chemical or biological laboratories. Furthermore, simplicity of lab-on-a-chip systems will enable self-testing capability for patients or health consumers overcoming space limitation.

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