• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2005년도 춘계학술대회 논문집
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• pp.672-675
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• 2005

To imprint 70-nm wide line-patterns, we used a newly developed ultraviolet nanoimprint lithography (UV-NIL) process in which an elementwise patterned stamp (EPS), a large-area stamp, and pressurized air are used to imprint a wafer in a single step. For a single-step UV-NIL of a 4' wafer, we fabricated two identical $5'\times5'\times0.09'(W{\times}L{\times}H)$ quartz EPSs, except that one is with nanopatterns and the other without nanopatterns. Both of them consist of 16 small-area stamps, called elements, each of which is $10\;mm\;\times\;10\;mm$. UV-curable low-viscosity resin droplets were dispensed directly on each element of the EPSs. The volume and viscosity of each droplet are 3.7 nl and 7 cps. Droplets were dispensed in such a way that no air entrapment between elements and wafer occurs. When the droplets were fully pressed between ESP and wafer, some incompletely filled elements were observed because of the topology mismatch between EPS and wafer. To complete those incomplete fillings, pressurized air of 2 bar was applied to the bottom of the wafer for 2 min. Experimental results have shown that nanopatterns of the EPS were successfully transferred to the resin layer on the wafer.

• Tribology and Lubricants
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• 제32권2호
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• pp.67-71
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• 2016

This study investigates the characteristics of the sapphire wafer chemical mechanical polishing (CMP) process. The material removal rate is one of the most important factors since it has a significant impact on the production efficiency of a sapphire wafer. Some of the factors affecting the material removal rate include the pressure, platen speed and slurry. Among the factors affecting the CMP process, we analyzed the trends in the material removal rate and surface roughness, which are mechanical factors corresponding to both the pressure and platen speed, were analyzed. We also analyzed the increase in the material removal rate, which is proportional to the pressure and platen speed, using the Preston equation. In the experiment, after polishing a 4-inch sapphire wafer with increasing pressure and platen speed, we confirmed the material removal rate via thickness measurements. Further, surface roughness measurements of the sapphire wafer were performed using atomic force microscopy (AFM) equipment. Using the measurement results, we analyzed the trends in the surface roughness with the increase in material removal rate. In addition, the experimental results, confirmed that the material removal rate increases in proportion to the pressure and platen speed. However, the results showed no association between the material removal rate and surface roughness. The surface roughness after the CMP process showed a largely consistent trend. This study demonstrates the possibility to improve the production efficiency of sapphire wafer while maintaining stable quality via mechanical factors associated with the CMP process.

• 한국산학기술학회논문지
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• 제15권11호
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• pp.6464-6471
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• 2014

웨이퍼 단위의 렌즈를 성형 시 일반적으로 UV경화 방식을 사용한다. 이 경우 발생될 수 있는 문제점은 크게. 경화후 이형과정에서 성형 렌즈의 금형 고착문제, 경화 공정 중 발생하는 소재의 수축 현상으로 렌즈간의 형상 오차 발생 및 웨이퍼 단위의 변형, 위치별 렌즈 형상 편차 발생, 웨이퍼 양면의 렌즈 형상 및 센터 정렬 오차 등이다. 이중 UV경화 과정에 직접적인 영향을 받는 것은 형상 오차 및 변형으로 그 요인은 UV 조사 균일성, UV 강도에 대한 경화도, UV 경화 소재의 수축 특성이다. 따라서 소재에 대한 경화 모델링 수립 및 경화 반응에 따른 수축율과 물성 변화에 대한 이론정립이 필요하다. 또한 이러한 모델링을 해석에 구현할 수 있는 해석 툴 개발이 필요하다. 본 연구에서는 Comsol을 이용하여 수립된 모델링을 반영하고 이를 통하여 웨이퍼 단위 렌즈의 성형 공정에 대한 해석 기법을 제안하였다. 이를 통해 7.2mm에 대한 누적 공차값을 실제 성형 공정 후 결과($0.149{\mu}m$)과 비교하여 제안한 해석 방법에 의한 결과($0.215{\mu}m$)을 비교, 검증을 수행하였으며 이를 통하여 UV경화 공정 후 변형에 대한 해석 가능성을 확인하였다.

• 반도체디스플레이기술학회지
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• 제16권1호
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• pp.22-28
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• 2017

The result of stripping process for the removal of the post etch/ash Photoresist (PR) residue on an aluminum patterned wafer by using supercritical $CO_2$ ($sc-CO_2$) mixture, was investigated by scanning of electron microscope (SEM) inspection of wafer, measuring the cloud points and visual observation of the state of $sc-CO_2$ mixtures. It was found that $sc-CO_2$ mixtures were made by mixing additives and $sc-CO_2$ should form homogeneous and transparent phase (HTP) in order to effectively and uniformly remove the post etch/ash PR residue on the aluminum patterned wafer using them. The additives were formulated by mixing and co-solvents like an amine compound and fluorosurfactants used as HTP agents, and the PR residue on the wafer were able to be rapidly and effectively removed using the $sc-CO_2$ mixture of HTP. The five kinds of additives were formulated by the recipe of mixing co-solvents and surfactants, which were able to remove PR residue on the wafer by mixing with $sc-CO_2$ at the stripping temperature range from 40 to $80^{\circ}C$. The five kinds of $sc-CO_2$ mixtures which were named as PR removers were made, which were able to form HTP within the above described stripping temperature. The cloud points of $sc-CO_2$ mixtures were measured to find correlation between them and HTP.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2003년도 ICCAS
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• pp.839-844
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• 2003

This paper presents a method to segment wafer ID marks on poor quality images under uncontrolled lighting conditions of the semiconductor process. The active multiple templates matching method is suggested to search ID areas on wafers and segment them into meaningful regions and it would have been impossible to recognize characters using general OCR algorithms. This active template model is designed by applying a snake model that is used for active contour tracking. Active multiple template model searches character areas and segments them into single characters optimally, tracking each character that can vary in a flexible manner according to string configurations. Applying active multiple templates, the optimization of the snake energy is done using Greedy algorithm, to maximize its efficiency by automatically controlling each template gap. These vary according to the configuration of character string. Experimental results using wafer images from real FA environment are presented.

• Macromolecular Research
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• 제11권6호
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• pp.511-513
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• 2003

Hydroxyl groups were introduced onto the surface of a silicon wafer by O$_2$ plasma treatment. Poly(l-lactide) (1-PLA) was attached onto the surface-modified silicon wafer by the ring-opening polymerization of l-lactide using the hydroxyl group as an initiator. Lamellar single crystals of 1-PLA were grown directly on the 1-PLA-attached silicon wafer from a 0.025% solution in acetonitrile at 5$^{\circ}C$. A well-separated, lozenge-shaped, monolayered lamellar single crystal was prepared because the 1-PLA-attached silicon wafer acts as an initial nucleus.

• 소음진동
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• 제8권2호
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• pp.324-330
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• 1998

The forced vibration analysis of the outer-clamped spinnig annular disk with arbitrary in-plane is formulated to investigate the influence of non-uniform tension on the cutting accuracy of wafer cutting machine. The arbitrary in-plan force along the outer edge of an annular plate is expressed as a Fourier series. Galerkin method and modal superposition method are employed to obtain the forced responses under the static force and the impulse force in astationary coordinate. Through qualitative and quantitative analyses, it can be found that forced and impulse responses are sensitive to the non-uniformity of in-plane force, which can bring a bad effect to the accuracy of wafer cutting process. Also, in case of a spinning disk with non-uniform in-plane force, critical speed is required to define in a different way, compared with conventional definition in axi-symmetrical spinning disk.

• 한국재료학회지
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• 제15권3호
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• pp.183-188
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• 2005

It was studied in this article how the flexural strength of bare silicon chips is influenced by adopting dual wafer back-lapping process. The experimental results showed that an additional finishing process after the conventional grinding process improves the flexural strength of bare chips by more than 2-fold. In particular, this work showed that the proper removal of the grinding marks$(Ra=0.1\;{\mu}m)$existing on the wafer back-surface resulting from the grinding process significantly contiributes to the enhancement of chip strength.

• JSTS:Journal of Semiconductor Technology and Science
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• 제2권4호
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• pp.273-279
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• 2002

This paper presents a fabrication technology for the integration of single crystal Si microstructures with on-chip circuitry. It is a dissolved wafer technique that combines an electro-chemical etch-stop for the protection of circuitry with an impurity-based etch-stop for the microstructures, both of which are defined in an n-epi layer on a p-type Si wafer. A CMOS op. amp. has been integrated with $p^{++}$ Si accelerometers using this process. It has a gain of 68 dB and an output swing within 0.2 V of its power supplies, unaffected by the wafer dissolution. The accelerometers have $3{\;}\mu\textrm{m}$ thick suspension beams and $15{\;}\mu\textrm{m}$ thick proof masses. The structural and electrical integrity of the fabricated devices demonstrates the success of the fabrication process. A variety of lead transfer methods are shown, and process details are discussed.

• 대한기계학회:학술대회논문집
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• 대한기계학회 2003년도 춘계학술대회
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• pp.1065-1068
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• 2003

The nano imprint process is one of the next generation lithography has been mentioned as one of major nanoreplication techniques because it is simple process, low cost, high replication fidelity and relatively high throughput. This process requires a surface contact between a template with patterns and a wafer on a stage. After contact, the vertical moving the template to the wafer causes some directional motions of the stage. Thus the stage must move according to the motions of the template to avoid the damage of the transferred patterns on the wafer. This study is to develop the wafer stage with a passive compliance to overcome the damage. This stage is designed with the concept like that it has a monolithic, symmetry and planar 6-DOF mechanism.