• Journal of Korean Society of Occupational and Environmental Hygiene
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• v.26 no.1
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• pp.1-10
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• 2016

Objectives: The aim of this study is to review the results of exposure to chemicals and to extremely low frequency(ELF) magnetic fields generated in wafer fabrication operations in the semiconductor industry. Methods: Exposure assessment studies of silicon wafer fab operations in the semiconductor industry were collected through an extensive literature review of articles reported until the end of 2015. The key words used in the literature search were "semiconductor industry", "wafer fab", "silicon wafer", and "clean room," both singly and in combination. Literature reporting on airborne chemicals and extremely low frequency(ELF) magnetic fields were collected and reviewed. Results and Conclusions: Major airborne hazardous agents assessed were several organic solvents and ethylene glycol ethers from Photolithography, arsenic from ion implantation and extremely low frequency magnetic fields from the overall fabrication processes. Most exposures to chemicals reported were found to be far below permissible exposure limits(PEL) (10% < PEL). Most of these results were from operators who handled processes in a well-controlled environment. In conclusion, we found a lack of results on exposure to hazardous agents, including chemicals and radiation, which are insufficient for use in the estimation of past exposure. The results we reviewed should be applied with great caution to associate chronic health effects.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.54-54
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• 2009

Ag thick film has been used for electrode materials with the excellent conductivity. Ag electrode is used in screen-printed silicon solar cells as a electrode material. Compared to photolithography and buried-contact technology, screen-printing technology has the merit of fabricating low-priced cells and enormous cells in a few hours. Ag paste consists of Ag powders, vehicles and additives such as frits, metal powders (Pb, Bi, Zn). Frits accelerate the sintering of Ag powders and induce the connection between Ag electrode and Si wafer. Thermophysical properties of frits and reactions among Ag, frits and Si influence on cell performance. In this study, Ag pastes were fabricated with adding different kinds of frits. After Ag pastes were printed on silicon wafer by screen-printing technology, the cells were fired using a belt furnace. The cell parameters were measured by light I-V to determine the short-circuit current, open-circuit voltage, FF and cell efficiency. In order to study the relationship between the reactivity of Ag, frit, Si and the electrical properties of cells, the reaction of frits and Si wafer on was studied with thermal properties of frits. The interface structure between Ag electrode and Si wafer were also measured for understanding the reactivity of Ag, frit and Si wafer. The excessive reactivity of Ag, frit and Si wafer certainly degraded the electrical properties of cells. These preliminary studies suggest that reactions among Ag, frits and Si wafer should optimally be controlled for cell performances.

• Industrial Engineering and Management Systems
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• v.4 no.1
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• pp.47-53
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• 2005

The efficiency of fabrication (fab) operation is one of the key factors in order for a semiconductor manufacturing company to stay competitive. Optimization of manpower and forecasting manpower needs in a modern fab is an essential part of the future strategic planing and a very important to the operational efficiency. As the semiconductor manufacturing technology has entered the 8-inch wafer era, the complexity of fab operation increases with the increase of wafer size. The wafer handling method has evolved from manual mode in 6-inch wafer fab to semi-automated or fully automated factory in 8-inch and 12-inch wafer fab. The distribution of manpower requirement in each specialty varied as the trend of fab operation goes for downsizing manpower with automation and outsourcing maintenance work. This paper is to study the specialty distribution of manpower from the requirement in a typical 6-inch, 8-inch to 12-inch wafer fab. The human resource planning in today’s fab operation shall consider many factors, which include the stability of technical talents. This empirical study mainly focuses on the human resource planning, the manpower distribution of specialty structure and the forecast model of internal demand/supply in current semiconductor manufacturing company. Considering the market fluctuation with the demand of varied products and the advance in process technology, the study is to design a headcount forecast model based on current manpower planning for direct labour (DL) and indirect labour (IDL) in Taiwan’s fab. The model can be used to forecast the future manpower requirement on each specialty for the strategic planning of human resource to serve the development of the industry.

• Journal of the Microelectronics and Packaging Society
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• v.20 no.4
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• pp.81-85
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• 2013

Wafer stacking technology becomes more important for the next generation IC technology. It requires new process development such as TSV, wafer bonding, and wafer thinning and also needs to resolve wafer warpage, power delivery, and thermo-mechanical reliability for high volume manufacturing. In this study, Cu CMP which is the key process for wafer bonding has been studied using Cu CMP and oxide CMP processes. Wafer samples were fabricated on 8" Si wafer using a damascene process. Cu dishing after Cu CMP and oxide CMP was $180{\AA}$ in average and the total height from wafer surface to bump surface was approximately $2000{\AA}$.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2013.05a
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• pp.1265-1266
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• 2013

• Proceedings of the KSME Conference
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• 2003.11a
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• pp.1378-1383
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• 2003

A ferroelectric (called piezoelectric afterwards) wafer has been widely used as a key component of actuators or sensors of a layer type. According to recent researches, the piezoelectric wafer behaves in a nonlinear way under excessive electro-mechanical loadings. In the present paper, one-dimensional constitutive equations for the nonlinear behavior of a piezoelectric wafer are proposed based on the principles of thermodynamics and a simple viscoplasticity theory. The predictions of the developed model are compared with experimental observations.

• Proceedings of the KIEE Conference
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• 1987.07a
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• pp.433-435
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• 1987

Thermal reoxidation was carried out to eliminate hole traps at the surface of Si wafer. As the result, the good surface state of wafer was obtained and hole traps were eliminate at the inversion layer. For the evaluation of reoxidation effects. MOS diode was fabricated and its C-Y curve was plotted.

• Journal of the Korean Ceramic Society
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• v.28 no.6
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• pp.495-501
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• 1991

This study is intended to make defect-free region, denuded zone at the silicon wafer surface for semiconductor device substrates. In this experiment, initial oxygen concentration of starting material CZ-grown silicon wafer, various heat treatment combinations, denuding ambient and the amounts of oxygen reduction were measured, and then denuded zone (DZ) formation and depth were investigated. In Low/High anneal (DZ formation could be achieved), the optimum temperature for Low anneal was 700$^{\circ}C$∼750$^{\circ}C$. In case of High anneal, with the time increased, DZ depth was increased at 1000$^{\circ}C$, 1150$^{\circ}C$ respectively, but on the contrary, DZ depth was decreased at low temperature 900$^{\circ}C$. As well, out-diffusion time below 2 hours was unsuitable for effective Gettering technique even though the temperature was high, and DZ formation could be achieved when initial oxygen concentration was only above 14 ppm in silicon wafer.

• Journal of Mechanical Science and Technology
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• v.20 no.12
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• pp.2025-2033
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• 2006

This paper presents, the design of a latch mechanism for wafer containers in a standard mechanical interface environment. For an integrated circuits fabrication factory, the standard mechanical interfaced wafer container is an effective tool to prevent wafers from particle contamination during wafer storage, transporting or transferring. The latch mechanism inside the container door is used to latch and further seal the wafer container for safety and air quality. Kinematic characteristics of the mechanism are established by analyzing the required functions of the mechanisms. Based on these characteristics, a methodology for enumerating feasible latch mechanisms is developed. New mechanisms with one degree-of-freedom and up to five links are generated. An optimum design is also identified with respect to the criteria pertinent to the application. The computer-aided simulation is also built to verify the design.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2005.06a
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• pp.1-5
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• 2005

The grinding process is replacing lapping and etching process because significant cost savings and performance improvemnets is possible. This paper presents the experimental results of wafer grinding. A three-variable two-level full factorial design was employed to reveal the main effects as well as the interaction effects of three process parameters such as wheel rotational speed, chuck table rotational speed and feed rate on TTV and STIR of wafers. The chuck table rotaional speed was a significant factor and the interaction effects was significant. The ground wafer shape was affected by surface shape of chuck table.