• 제목/요약/키워드: OLED(Organic Light-Emitting Diode)

검색결과 289건 처리시간 0.022초

유기발광다이오드(OLED) 소재 제조 현장 여과 설비사용 위험성 및 개선 방안 연구 (A study on the Risks of Using Filtration Facilities at the Organic Light Emitting Diode(OLED) and Its Preventive Measures)

  • 곽종구;강찬규
    • 한국가스학회지
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    • 제27권4호
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    • pp.1-11
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    • 2023
  • OLED 소재 시장의 규모는 2019년 11억 달러에서 2023년 23억 달러로 연평균 19% 이상 지속적인 성장이 예상된다. OLED 소재 제조사에서 주로 사용하고 있는 설비 중 여과 설비는 사용 시 화재, 폭발, 누출 등의 사고들이 빈번히 발생하고 있어, 이에 대한 여과 설비사용 시의 위험성 개선이 요구된다. 해당 연구에서는 여과 설비사용에 따른 위험성을 도출하기 위해 주요공정 즉 조립 및 분해공정, 여과공정, wet cake 회수공정, 세척공정의 4가지로 나누어 사고사례조사, 사전인터뷰, 설문조사 등을 실시하여 유해 위험 요인을 도출하였다. 설문 결과의 분석은 SPSS 21을 이용하여 빈도분석, Pearson 카이제곱 검정 분석을 수행하여 분석된 결과를 활용하여 위험성 개선 방안들을 제시하였다. 이 연구가 OLED 시장 규모가 확대됨에 따라 발생할 수 있는 안전 및 위험 요인들을 다루는데 기초자료가 될 것으로 기대한다.

미세접촉프린팅공정을 이용한 플렉시블 디스플레이 유기박막구동소자 제작 (Fabrication of Organic Thin Film Transistor(OTFT) for Flexible Display by using Microcontact Printing Process)

  • 김광영;조정대;김동수;이제훈;이응숙
    • 한국정밀공학회:학술대회논문집
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    • 한국정밀공학회 2006년도 춘계학술대회 논문집
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    • pp.595-596
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    • 2006
  • The flexible organic thin film transistor (OTFT) array to use as a switching device for an organic light emitting diode (OLED) was designed and fabricated in the microcontact printing and low-temperature processes. The gate, source, and drain electrode patterns of OTFT were fabricated by microcontact printing which is high-resolution lithography technology using polydimethylsiloxane(PDMS) stamp. The OTFT array with dielectric layer and organic active semiconductor layers formed at room temperature or at a temperature tower than $40^{\circ}C$. The microcontact printing process using SAM(self-assembled monolayer) and PDMS stamp made it possible to fabricate OTFT arrays with channel lengths down to even nano size, and reduced the procedure by 10 steps compared with photolithography. Since the process was done in low temperature, there was no pattern transformation and bending problem appeared. It was possible to increase close packing of molecules by SAM, to improve electric field mobility, to decrease contact resistance, and to reduce threshold voltage by using a big dielecric.

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적응적 휘도 감소를 이용한 OLED 패널의 저전력 디스플레이 방법 및 하드웨어 구현 (Hardware Implementation of Low-power Display Method for OLED Panel using Adaptive Luminance Decreasing)

  • 조호상;최대성;서인석;강봉순
    • 한국정보통신학회논문지
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    • 제17권7호
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    • pp.1702-1708
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    • 2013
  • OLED(Organic Light-Emitting Diode)는 LCD와 달리 자체발광 특성 때문에 흰색을 표현할 때에는 R,G,B 소자가 모두 발광하여야 하므로 전력소비가 상대적으로 커지게 되는 문제점이 있다. 본 논문은 OLED 패널을 사용한 기기의 저전력 디스플레이 방법 및 하드웨어 구현에 관한 것이다. 입력 이미지의 휘도 정보를 기반으로 하여 실시간으로 화소 별 휘도 변환 값을 생성하여 적응적 휘도 조절 방법과 색도 축소 알고리즘의 기본 개념을 사용하여 새로운 색상보정 알고리즘을 사용하여 OLED 패널의 저전력 디스플레이 방법을 제안한다. 기존의 방법과 비교함으로써 제안한 방법의 성능을 확인한 결과 최대 48.43%의 전류 감소를 확인하였다. 최종적으로 제안된 알고리즘은 Verilog HDL로 하드웨어를 구현하였으며, OpenCV와 Window 프로그램을 사용하여 소프트웨어적으로 알고리즘을 검증하였다.

고분자 기판위에 다층 구조의 박막형 보호층을 적용한 투습률 향상 (Improvement of Permeation of Applied Multi-layer Encapsulation of Thin Films on Ethylene Terephthalate(PET))

  • 김종환;한진우;김영환;서대식
    • 한국전기전자재료학회논문지
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    • 제19권3호
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    • pp.255-259
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    • 2006
  • In this paper, the inorganic-organic thin film encapsulation layer was newly adopted to protect the organic layer from moisture and oxygen. Using the electron beam, Sputter and Spin-Coater system, the various kinds of inorganic and organic thin-films were deposited onto the Ethylene Terephthalate(PET) and their interface properties between organic and inorganic layer were investigated. In this investigation, the SiON and Polyimide(PI) layer showed the most suitable properties. Under these conditions, the WVTR(water vapour transition rate) for PET can be reduced from level of $0.57\;g/m^2{\cdot}day$ (bare subtrate) to $1{\times}10^{-5}\;g/m^2{\cdot}day$ after application of a SiON and Polyimide layer. These results indicates that the SiON/PI/SiON/PI/PET barrier coatings have high potential for flexible organic light-emitting diode(OLED) applications.

3-유기층 구조를 갖는 고효율 청색 유기발광소자 (High Efficiency Blue Organic Light-Emitting Diode with Three Organic Layer Structure)

  • 장지근;지현진;김현;김재민
    • 반도체디스플레이기술학회지
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    • 제11권3호
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    • pp.33-37
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    • 2012
  • Simple and high efficiency blue organic light-emitting diodes with three organic layers of N, N'-diphenyl-N,N'-bis-[4-(phenyl-m-tolylamino)-phenyl]-biphenyl-4,4'-diamine[DNTPD]/1,1-bis-(di-4-polya-minophenyl)cyclohexane[TAPC]/electron transport material [ET-137] were fabricated and their electroluminescent characteristics were evaluated according to the TAPC thickness variation in a range of $50{\sim}300{\AA}$. Electroluminescence spectra of the devices with structure of DNTPD/TAPC/ET-137 showed all the same central emission wavelengths of 455 nm under an applied voltage of 7V, which were similar with that of the device with ET-137 only. On the other hand, the electroluminescence spectra of the device with structure of DNTPD/ET-137 without TAPC layer showed double emission peaks at the wavelengths of 455 nm and 561 nm under an applied voltage of 7V. In the devices with structure of DNTPD/TAPC/ET-137, single peak blue emission was not maintained in the device with $50{\AA}$-thick TAPC above 8V by the formation of exciplex. In the device with $300{\AA}$-thick TAPC, however, single peak blue emission was maintained until 10 V. According to the thickness increase of TAPC in the fabricated devices, the current density and luminance decreased, but the luminous efficiency and roll-off characteristics were improved.

반도체 작업환경의 VOCs 농도분포 특성 (Emission Characteristics of VOCs Distributions in Semiconductor Workplace)

  • 이정주
    • 한국도시환경학회지
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    • 제18권4호
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    • pp.503-509
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    • 2018
  • 본 연구에서는 양자전이 비행시간질량분석기(PTR-ToF-MS)를 이용하여 반도체 공정의 작업환경(PHOTO, FPD, OLED, WET 공정)에서 VOCs를 실시간으로 모니터링하였다. 작업환경에서 평균 VOCs 농도는 PHOTO 6.5 ppm, FPH 6.4 ppm, WET 2.0 ppm, OLED 1.3 ppm이었다. VOCs 중 methyl ethyl ketone이 2.8 ppm (69%), acetaldehyde가 0.5 ppm (13.2%)로 나타났다. 반도체 공정 특성에 따라 다양한 VOCs 가 작업환경에서 관측되었다. 관측된 VOCs 농도는 작업환경기준보다 낮지만, 이러한 VOCs를 지속적으로 모니터링하여 효과적으로 관리해 나갈 필요가 있다.

Poly-Si TFT Technology

  • Noguchi, Takashi;Kim, D.Y.;Kwon, J.Y.;Park, Y.S.
    • 인포메이션 디스플레이
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    • 제5권1호
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    • pp.25-30
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    • 2004
  • Poly-Si TFT(Thin Film Transistor) technology are reviewed and discussed. Poly-Si TFTs fabricated on glass using low-temperature process were studied extensively for the application to LCD (Liquid Crystal Display) as well as to OLED(Organic Light Emitting Diode) Display. Currently, one of the application targets of the poly-Si TFT is emphasized on the highly functional SOG(System on Glass). Improvement of device characteristics such as an enhancement of carrier mobility has been studied intensively by enlarging the grain size. Reduction of the voltage and shrinkage of the device size are the trend of AM FPD(Active Matrix Flat Panel Display) as well as of Si LSI, which will arise a peculiar issue of uniformity for the device performance. Some approaches such as nucleation control of the grain seed or lateral grain growth have been tried, so far.

Synthesis of Phenanthridine-Containing Conjugated Copolymer and OLED Device Properties

  • Park, Lee-Soon;Jeong, Young-Chul;Han, Yoon-Soo;Kim, Sang-Dae;Kwon, Young-Hwan
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2004년도 Asia Display / IMID 04
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    • pp.588-591
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    • 2004
  • Polyazomethine type conjugated copolymers containing phenanthridine units, poly(PZ-PTI), were synthesized by Schiff-base reaction. This new conjugated copolymer exhibited improved solubility in common organic solvents due to the presence of alkyl side chains as well as phenanthridine groups. Double layer (ITO/poly(PZ-PTI)/$Alq_3$/Mg) light emitting diode (LED) exhibited enhanced EL emission and efficiency compared to that of single layer (ITO/poly(PZ-PTI)/Mg) LED. With increasing the thickness of $Alq_3$ layer in double layer (ITO/poly(PZ-PTI)/$Alq_3$/Mg) LED the emission peak gradually shifted to the single layer (ITO/$Alq_3$/Mg) LED, confirming good hole transporting behaviour of the synthesized conjugated copolymer.

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디스플레이 테스트를 위한 패턴 생성 회로 설계 (Design of Pattern Generation Circuit for Display Test)

  • 조경연
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2003년도 하계종합학술대회 논문집 II
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    • pp.1149-1152
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    • 2003
  • Now a days, many different kinds of display technologies such as Liquid Crystal Display (LCD), Organic Light Emitting Diode (OLED), and Liquid Crystal On Silicon (LCOS) are designed. And these display technologies will be used in many application products like High Definition Televisions (HDTVs) or mobile devices. In this paper, pattern generation circuit for display test is proposed. The proposed circuit will be embedded in the control circuit of display chip. Two differenct kinds of patterns is generated by the circuit. One is block pattern for color test, and the other is line pattern for pixel test. The shape of test pattern is determined by the values of registers in pattern generation circuit. The circuit is designed using Verilog HDL RTL code.

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Data Supply Voltage Reduction Scheme for Low-Power AMOLED Displays

  • Nam, Hyoungsik;Jeong, Hoon
    • ETRI Journal
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    • 제34권5호
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    • pp.727-733
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    • 2012
  • This paper demonstrates a new driving scheme that allows reducing the supply voltage of data drivers for low-power active matrix organic light-emitting diode (AMOLED) displays. The proposed technique drives down the data voltage range by 50%, which subsequently diminishes in the peak power consumption of data drivers at the full white pattern by 75%. Because the gate voltage of a driving thin film transistor covers the same range as a conventional driving scheme by means of a level-shifting scheme, the low-data supply scheme achieves the equivalent dynamic range of OLED currents. The average power consumption of data drivers is reduced by 60% over 24 test images, and power consumption is kept below 25%.