• Title/Summary/Keyword: NiO thin film

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Fabrication of Thin Film Inductors Using Ni-Zn Ferrite Core (Ni-Zn 페라이트 박막을 이용한 박막 인덕터의 제조)

  • Kim, Min-Heung;Yeo, Hwan-Gun;Hwang, Gi-Hyeon;Lee, Dae-Hyeong;Yun, Ui-Jun;Kim, Hyeong-Jun
    • Korean Journal of Materials Research
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    • v.6 no.1
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    • pp.22-28
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    • 1996
  • 고주파 이동통신의 효용이 증가할수록 고주파 회로에 들어가는 부품들의 소형화가 중요한 과제로 대두되고 있다. 인덕터는 전자회로에 이용되는 주요 부품의 하나이며, 현재 교주파용 소형 인덕터를 박막화하려는 시도가 진행중이다. 본 연구에서 열산화시킨 Si(100)기판위에 성공적으로 박막형 인덕터를 제조하였다. Core 물질로는 ion beam sputtering 법으로 증착한 Ni-Zn 페라이트와 PECVD법으로 증착한 SiO2를 사용하였다. 고온산화분위기의 박막 증착과정을 고려하여 귀금속류인 Au를 전극으로 이용하였으며, life-off법으로 미세회로를 구현하였다. 상하부 전극의 안정적인 연결을 위하여 2차 전극배선 전에 via를 채워넣었다. 제조된 박막 인덕터의 고주파 특성은 network analyzer로 측정한 후 HP사의 Mecrowave Design System으로 분석하였다.

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Evaluation of Flexible Complementary Inverters Based on Pentacene and IGZO Thin Film Transistors

  • Kim, D.I.;Hwang, B.U.;Jeon, H.S.;Bae, B.S.;Lee, H.J.;Lee, N.E.
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.02a
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    • pp.154-154
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    • 2012
  • Flexible complementary inverters based on thin-film transistors (TFTs) are important because they have low power consumption and high voltage gain compared to single type circuits. We have manufactured flexible complementary inverters using pentacene and amorphous indium gallium zinc oxide (IGZO) for the p-channel and n-channel, respectively. The circuits were fabricated on polyimide (PI) substrate. Firstly, a thin poly-4-vinyl phenol (PVP) layer was spin coated on PI substrate to make a smooth surface with rms surface roughness of 0.3 nm, which was required to grow high quality IGZO layers. Then, Ni gate electrode was deposited on the PVP layer by e-beam evaporator. 400-nm-thick PVP and 20-nm-thick ALD Al2O3 dielectric was deposited in sequence as a double gate dielectric layer for high flexibility and low leakage current. Then, IGZO and pentacene semiconductor layers were deposited by rf sputter and thermal evaporator, respectively, using shadow masks. Finally, Al and Au source/drain electrodes of 70 nm were respectively deposited on each semiconductor layer using shadow masks by thermal evaporator. The characteristics of TFTs and inverters were evaluated at different bending radii. The applied strain led to change in voltage transfer characteristics of complementary inverters as well as source-drain saturation current, field effect mobility and threshold voltage of TFTs. The switching threshold voltage of fabricated inverters was decreased with increasing bending radius, which is related to change in parameters of TFTs. Throughout the bending experiments, relationship between circuit performance and TFT characteristics under mechanical deformation could be elucidated.

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A Study of Photoelectrolysis of Water by Use of Titanium Oxide Films (산화티타늄 피막의 광 전기분해 특성에 관한 연구)

  • Park, Seong-Young;Cho, Byung-Won;Ju, Jeh-Beck;Yun, Kyung-Suk;Lee, Eung-Cho
    • Applied Chemistry for Engineering
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    • v.3 no.1
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    • pp.88-99
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    • 1992
  • For the development of semiconducting photoelectrode to be more stable and efficient in the process of photoelectrolysis of the water, pure titanium rods were oxidized by anodic oxidation, furance oxidation and flame oxidation and used as electrodes. The Indium islands were formed by electrodeposition of "In" thin film on $TiO_2$ and Ti by electrodeposition. Also $A1_2O_3$ and NiO islands were coated on Ti by the electron-beam evaporation technique. The maximum photoelectrochemical conversion efficiency(${\eta}$) was 0.98% for flame oxidized electrode($1200^{\circ}C$ for 2min in air). Anodically oxidized electrodes have photoelectrochemical conversion efficiency of 0.14%. Furnace oxidized electrode($800^{\circ}C$ for 10min in air) has 0.57% of photoelectrochemical efficiency and shows a band-gap energy of about 2.9eV. The $In_2O_3$ coated $TiO_2$ exhibits 0.8% of photoelectrochemical efficiency but much higher value of ${\eta}$ was obtained with the Increase of applied blas voltage. However, $Al_2O_3$ or NiO coated $TiO_2$ shows much low value of ${\eta}$. The efficiency was dependent on the presence of the metallic interstitial compound $TiO_{0+x}$(x<0.33) at the metal-semiconductor interface and the thickness of the suboxide layer and the external rutile scale.

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Effect of Laser Ablation on Rear Passivation Stack for N-type Bifacial Solar Cell Application (N형 양면 수광 태양전지를 위한 레이저 공정의 후면 패시베이션 적층 구조 영향성)

  • Kim, Kiryun;Chang, Hyo Sik
    • Korean Journal of Materials Research
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    • v.30 no.5
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    • pp.262-266
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    • 2020
  • In this paper, we investigated the effect of the passivation stack with Al2O3, hydrogenated silicon nitride (SiNx:H) stack and Al2O3, silicon oxynitride (SiONx) stack in the n type bifacial solar cell on monocrystalline silicon. SiNx:H and SiONx films were deposited by plasma enhanced chemical vapor deposition on the Al2O3 thin film deposited by thermal atomic layer deposition. We focus on passivation properties of the two stack structure after laser ablation process in order to improve bifaciality of the cell. Our results showed SiNx:H with Al2O3 stack is 10 mV higher in implied open circuit voltage and 60 ㎲ higher in minority carrier lifetime than SiONx with Al2O3 stack at Ni silicide formation temperature for 1.8% open area ratio. This can be explained by hydrogen passivation at the Al2O3/Si interface and Al2O3 layer of laser damaged area during annealing.

W 도핑된 ZnO 박막을 이용한 저항 변화 메모리 특성 연구

  • Park, So-Yeon;Song, Min-Yeong;Hong, Seok-Man;Kim, Hui-Dong;An, Ho-Myeong;Kim, Tae-Geun
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.02a
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    • pp.410-410
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    • 2013
  • Next-generation nonvolatile memory (NVM) has attracted increasing attention about emerging NVMs such as ferroelectric random access memory, phase-change random access memory, magnetic random access memory and resistance random access memory (RRAM). Previous studies have demonstrated that RRAM is promising because of its excellent properties, including simple structure, high speed and high density integration. Many research groups have reported a lot of metal oxides as resistive materials like TiO2, NiO, SrTiO3 and ZnO [1]. Among them, the ZnO-based film is one of the most promising materials for RRAM because of its good switching characteristics, reliability and high transparency [2]. However, in many studies about ZnO-based RRAMs, there was a problem to get lower current level for reducing the operating power dissipation and improving the device reliability such an endurance and an retention time of memory devices. Thus in this paper, we investigated that highly reproducible bipolar resistive switching characteristics of W doped ZnO RRAM device and it showed low resistive switching current level and large ON/OFF ratio. This may be caused by the interdiffusion of the W atoms in the ZnO film, whch serves as dopants, and leakage current would rise resulting in the lowering of current level [3]. In this work, a ZnO film and W doped ZnO film were fabricated on a Si substrate using RF magnetron sputtering from ZnO and W targets at room temperature with Ar gas ambient, and compared their current levels. Compared with the conventional ZnO-based RRAM, the W doped ZnO ReRAM device shows the reduction of reset current from ~$10^{-6}$ A to ~$10^{-9}$ A and large ON/OFF ratio of ~$10^3$ along with self-rectifying characteristic as shown in Fig. 1. In addition, we observed good endurance of $10^3$ times and retention time of $10^4$ s in the W doped ZnO ReRAM device. With this advantageous characteristics, W doped ZnO thin film device is a promising candidates for CMOS compatible and high-density RRAM devices.

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Simultaneous Quench Analysis of a Three-Phase 6.6 kV Resistive SFCL Based on YBCO Thin Films (YBCO 박막을 이용한 3상 6.6kV 항형 초전도 한류기의 동시Quench 분석)

  • Sim J;Kim H. R;Hyun O. B
    • Progress in Superconductivity
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    • v.6 no.1
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    • pp.46-51
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    • 2004
  • We fabricated a resistive type superconducting fault current limiter (SFCL) of 3-phase $6.6 kV_{rms}$ / rating, based on YBCO thin films grown on sapphire substrates with a diameter off inch. Each element of the SFCL was designed to have the rated voltage of $600 V_{rms}$ $/35A_{rms}$. The elements produced a single phase with 8${\times}$6 components connected in series and parallel. In addition, a NiCr shunt resistor of 23 $\Omega$ was connected in parallel to each of them for simultaneous quenches between the elements. Prior to investigating the performance of the 3 phase SFCL, we examined the quench characteristics for 8 elements connected in series. For all elements, simultaneous quenches and equal voltage distribution within 10% deviation from the average were obtained. Based on these results, performance of the SFCL for single line-to-ground faults was investigated. The SFCL successfully limited the fault current of $10 kA_{ rms}$ below 816 $A_{peak}$ within 0.12 msec right after the fault occurred. During the quench process, average temperature of all components did not exceed 250 K, and the SFCL was totally safe during the whole operation.

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Suppression of Charge Recombination Rate in Nanocrystalline SnO2 by Thin Coatings of Divalent Oxides in Dye-Sensitized Solar Cells

  • Lee, Chae-Hyeon;Lee, Gi-Won;Kang, Wee-Kyung;Lee, Doh-Kwon;Ko, Min-Jae;Kim, Kyoung-Kon;Park, Nam-Gyu
    • Bulletin of the Korean Chemical Society
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    • v.31 no.11
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    • pp.3093-3098
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    • 2010
  • The core-shell $SnO_2$@AO (A=Ni, Cu, Zn and Mg) films were prepared and the effects of coatings on photovoltaic properties were investigated. Studies on X-ray photoelectron spectroscopy, energy dispersive X-ray analysis and transmission electron microscopy showed the formation of divalent oxides on the surface of $SnO_2$ nanoparticles. It was commonly observed that all the dye-sensitized core-shell films exhibited higher photovoltage than the bare $SnO_2$ film. Transient photovoltage measurements confirmed that the improved photovoltages were related to the decreased time constants for electron recombination.

Fabrication of Etched Graphene/CuO Nanowires as Field Effect Transistors

  • Hien, Vu Xuan;Kim, Se-Yun;Kim, MyeongEon;Lee, Joon-Hyung;Kim, Jeong-Joo;Heo, Young-Woo
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.02a
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    • pp.430-430
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    • 2013
  • Field effect transistor based on semiconductor nanowires has been attracting lots of concerns and studies of scientists because of its different characteristic comparing with other morphology like thin film. Nowadays, graphene is introducing a great promise as an active layer in field effect transistor due to its unique electronic and optoelectronic properties. Thus, a mix structure between etched graphene and semiconductor nanowires is believed to expose novel electrical characteristics. In this study, CuO nanowires (20~80 nm in diameter and $1{\sim}10{\mu}m$ length) were grown during oxidizing Cu foil at $450^{\circ}C$ for 24 h. Besides, 3-layersetched graphene was deposited on Cu foil at $1,000^{\circ}C$ using a feedstock of $CH_4$/$H_2$ mixed gas in CVD system. A structure of Ni/Au electrode + CuO nanowires + etched graphene was fabricated, afterward. Finally, field effect properties of the device was revealed and compared with individual devices of just nanowires and just graphene.

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Deposition of Yttria Stabilized Zirconia by the Thermal CVD Process

  • In Deok Jeon;Latifa Gueroudji;Nong M. Hwang
    • The Korean Journal of Ceramics
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    • v.5 no.2
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    • pp.131-136
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    • 1999
  • Yttria stabilized zirconia(YSZ) films were deposited on porous NiO substrates and quartz plates by the thermal CVD using $ZrCl_4, YCl_3$ as precursors, and $O_2$ as a reactive gas at atmospheric pressure. The evaporation temperature of $ZrCl_4$ was varied from $250^{\circ}C$ to $550^{\circ}C$ while the temperatures of $YCl_3$ and the substrate were varied from $1000^{\circ}C$ to $1030^{\circ}C$. As the evaporation temperature of $ZrCl_4$ increased, the deposition rate of $ZrO_2$ decreased, contrary to our expectation. As a result of the decreased deposition rate of $ZrO_2$, the yttria content increase. The high evaporation temperature of $ZrCl_4$ makes the well-faceted crystal while the low evaporation temperature leads to the cauliflower-shaped structure. The dependence of the evaporation temperature on the growth rate and the morphological evolution was interpreted by the charged cluster model.

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Microstructure Evolution and Properties of Silicides Prepared by dc-sputtering (스퍼터링으로 제조된 니켈실리사이드의 미세구조 및 물성 연구)

  • An, Yeong-Suk;Song, O-Seong;Lee, Jin-U
    • Korean Journal of Materials Research
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    • v.10 no.9
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    • pp.601-606
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    • 2000
  • Nickel mono-silicide(NiSi) shows no increase of resistivity as the line width decreases below 0.15$\mu\textrm{m}$. Furthermore, thin silicide can be made easily and restrain the redistribution of dopants, because NiSi in created through the reaction of one nickel atom and one silicon atom. Therefore, we investigated the deposition condition of Ni films, heat treatment condition and basic properties of NiSi films which are expected to be employed for sub-0.15$\mu\textrm{m}$ class devices. The nickel silicide film was deposited on the Si wafer by using a dc-magnetron sputter, then annealed at the temperature range of $150~1000^{\circ}C$. Surface roughness of each specimen was measured by using a SPM (scanning probe microscope). Microstructure and qualitative composition analysis were executed by a TEM-EDS(transmission electron microscope-energy dispersive x-ray spectroscope). Electrical properties of the materials at each annealing temperature were measured by a four-point probe. As the results of our study, we may conclude that; 1. SPM can be employed as a non-destructive process to monitor NiSi/NiSi$_2$ transformation. 2. For annealing temperature over $800^{\circ}C$, oxygen pressure $Po_2$ should be kept below $1.5{\times}10^{-11}torr$ to avoid oxidation of residual Ni. 3. NiSi to $NiSi_2$ transformation temperature in our study was $700^{\circ}C$ from the four-point probe measurement.

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