• 한국자기학회지
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• 제10권2호
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• pp.62-66
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• 2000

비자성사이층 Cu 두께(30 $\AA$, 35 $\AA$, 40 $\AA$)를 달리한 glass(7059)/N $i_{81}$$Fe_{19}$(70 $\AA$)/Co(10 $\AA$)/Cu(t $\AA$)/Co(15 $\AA$)/N $i_{81}$$Fe_{19}$(35 $\AA$)N $i_{25}$M $n_{75}$(250 $\AA$)Ta(50 $\AA$) 스핀밸브박막(spin valve film; SVF) 을 dc 스퍼터링으로 제작하였다 이 시편을 진공 열처리 한 후 자유자성층의 상호결합세기(interlayer coupling field; $H_{inf}$ )와 보자력(coercivity; $H_{sf}$ )에 대한 열처리 순환횟수 및 비자성층 두께 의존성에 관련한 자기저항특성을 조사했다. Cu 두께가 35 $\AA$인 SVF의 경우에 교환결합세기(exchange coupling field; $H_{ex}$)가 620 Oe, 보자력( $H_{c}$)이 280 Oe 및 자기저항(magnetoresistance; MR)비가 2.5%를 보였다. $H_{inf}$ 와 $H_{cf}$ 는 모든 SVF가 열처리 순환 횟수에 따라 증가하는 경향을 보이다가 일정한 값으로 안정화되며 Cu 35 $\AA$인 경우는 열처리 순환 횟수 15회 이후에 각각 120 Oe 및 75 Oe를 유지한다. $H_{inf}$ 및 $H_{cf}$ 가 열처리 순환횟수 증가에 따라 증가하는 것은 열처리 효과에 의해 Cu층과 Co층의 계면섞임 증대에 의한 유효한 Cu층 두께 감소에 기인한다. Cu가 적정둘레 35 $\AA$ 보다 더 얇아지거나 두꺼워지면 계면섞임에 의한 효과는 각각 더 증대하거나 둔화되는 것으로 분석된다.으로 분석된다..

• 대한전기학회:학술대회논문집
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• 대한전기학회 1999년도 하계학술대회 논문집 D
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• pp.1590-1592
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• 1999

We have fabricated good quality superconducting $YBa_2Cu_3O_{7-{\delta}}$ thin films on Hastelloy(Ni-Cr-Mo alloys) with $CeO_2$ buffer layers by in-situ pulsed laser deposition in a multi-target processing chamber. Using one of electrical properties of YBCO superconducting which the resistance approaches to zero dramatically on transition temperature, we have researched to make power transmission line, we have deposited YBCO thin film on flexible metallic substrate. However, it is difficult to make films on flexible metallic substrates due to both interdiffusion problem between metallic substrate and superconducting layer and non-crystallization of YBCO on amorphous substrate. From early research, two ways-using textured metallic substrate and buffer layer-were proposed to overcome theses difficulties. We have chosen $CeO_2$ as a buffer layer which has cubic structure of $5.41{\AA}$ lattice parameter and only 0.2% of lattice mismatch with $3.82{\AA}$ of a-axis lattice parameter of YBCO on (110) direction of $CeO_2$. In order to enhance the crystallization of YBCO films on metallic substrates we deposited $CeO_2$ buffer layers at varying temperature $700^{\circ}C$ to $800^{\circ}C$ and $O_2$ pressure. By X-ray diffraction, we found that each domination of (200) and (111) orientations were strongly relied upon the deposition temperature in $CeO_2$ layer and the change of the domination of orientation affects the crystallization of YBCO upper layer.

• Transactions on Electrical and Electronic Materials
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• 제8권3호
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• pp.110-114
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• 2007

Dependence of the thermal stability of nickel silicide on the film stress of inter layer dielectric (ILD) layer has been investigated in this study and silicon nitride $(Si_3N_4)$ layer is used as an ILD layer. Nickel silicide was formed with a one-step rapid thermal process at $500^{\circ}C$ for 30 sec. $2000{\AA}$ thick $Si_3N_4$ layer was deposited using plasma enhanced chemical vapor deposition after the formation of Ni silicide and its stress was split from compressive stress to tensile stress by controlling the power of power sources. Stress level of each stress type was also split for thorough analysis. It is found that the thermal stability of nickel silicide strongly depends on the stress type as well as the stress level induced by the $Si_3N_4$ layer. In the case of high compressive stress, silicide agglomeration and its phase transformation from the low-resistivity nickel mono-silicide to the high-resistivity nickel di-silicide are retarded, and hence the thermal stability is obviously improved a lot. However, in the case of high tensile stress, the thermal stability shows the worst case among the stressed cases.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 추계학술대회 논문집 Vol.21
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• pp.259-259
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• 2008

The LTCC (Low Temperature Co-fired Ceramic) technology meets the requirements for high quality microelectronic devices and microsystems application due to a very good electrical and mechanical properties, high reliability and stability as well as possibility of making integrated three dimensional microstructures. The wet process, which has been applied to the etching of the metallic thin film on the ceramic substrate, has multi process steps such as lithography and development and uses very toxic chemicals arising the environmental problems. The other side, Plasma technology like ion beam sputtering is clean process including surface cleaning and treatment, sputtering and etching of semiconductor devices, and environmental cleanup. In this study, metallic multilayer pattern was fabricated by the ion beam etching of Ti/Pd/Cu without the lithography. In the experiment, Alumina and LTCC were used as the substrate and Ti/Pd/Cu metallic multilayer was deposited by the DC-magnetron sputtering system. After the formation of Cu/Ni/Au multilayer pattern made by the photolithography and electroplating process, the Ti/Pd/Cu multilayer was dry-etched by using the low energy-high current ion-beam etching process. Because the electroplated Au layer was the masking barrier of the etching of Ti/Pd/Cu multilayer, the additional lithography was not necessary for the etching process. Xenon ion beam which having the high sputtering yield was irradiated and was used with various ion energy and current. The metallic pattern after the etching was optically examined and analyzed. The rate and phenomenon of the etching on each metallic layer were investigated with the diverse process condition such as ion-beam acceleration energy, current density, and etching time.

• Corrosion Science and Technology
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• 제2권1호
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• pp.18-25
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• 2003

Effects of the precipitation of $\sigma$ phase on the metastable pitting as a precursor of stable pitting corrosion and also on the progress of stale pitting of the 25Cr-7Ni-3Mo-0.25N duplex stainless steel were investigated in chloride solution. Electrochemical potential and current noises of the alloy were measured in 10 % ferric chloride solution ($FeCl_3$) with zero resistance ammeter (ZRA), and then analyzed by power spectral density (PSD) and by corrosion admittance ($A_c$) spectrum. With aging at $850^{\circ}C$, the passive film of the alloy was found to get significantly unstable as represented by power spectral density (PSD) and a transition from metastable pitting state to stable one was observed. In the corrosion admittance spectrum, the number of negative $A_c$ corresponding to the state of localized corrosion increased with aging, suggesting that the precipitation of $\sigma$ phase considerably degraded the passive film by depleting Cr and Mo around it at $\alpha/\sigma$ or $\gamma/\sigma$ phase boundaries, thereby leading to the initiation of the pitting corrosion. However, the Cr and Mo at $\alpha/\sigma$ or $\gamma/\sigma$ phase boundaries which were once depleted due to the precipitation of the $\sigma$ phase were partly replenished by the diffusion of Cr and Mo from the surrounding matrix with aging time longer. The initiation of pitting seems to be associated with the precipitation density of the $\sigma$ phase with an effective size needed to induce the sufficient depletion of Cr and Mo around it.

• Journal of the Optical Society of Korea
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• 제20권1호
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• pp.130-134
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• 2016

The influence of Au/Ni-based contact formed on a lightly-doped (7.3×1017cm−3, Zn-doped) InGaAsP layer for electrical compensation of surface plasmon polariton (SPP) propagation under various rapid thermal annealing (RTA) conditions has been studied. The active control of SPP propagation is realized by electrically pumping the InGaAsP multiple quantum wells (MQWs) beneath the metal planar waveguide. The metal planar film acts as the electric contact layer and SPP waveguide, simultaneously. The RTA process can lower the metal-semiconductor electric contact resistance. Nevertheless, it inevitably increases the contact interface morphological roughness, which is detrimental to SPP propagation. Based on this dilemma, in this work we focus on studying the influence of RTA conditions on electrical control of SPPs. The experimental results indicate that there is obvious degradation of electrical pumping compensation for SPP propagation loss in the devices annealed at 400℃ compared to those with no annealing treatment. With increasing annealing duration time, more significant degradation of the active performance is observed even under sufficient current injection. When the annealing temperature is set at 400℃ and the duration time approaches 60s, the SPP propagation is nearly no longer supported as the waveguide surface morphology is severely changed. It seems that eutectic mixture stemming from the RTA process significantly increases the metal film roughness and interferes with the SPP signal propagation.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2011년도 제41회 하계 정기 학술대회 초록집
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• pp.286-286
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• 2011

최근 폴리머를 기판으로 하는 Flexible TFT (thin film transistor)나 3D-ULSI (three dimensional ultra large-scale integrated circuit)에서 높은 에너지 소비효율과, 빠른 반응 속도를 실현 시키기 위해 낮은 비저항(resistivity)을 가지며, 높은 홀 속도(carrier hall mobility)를 가지는 다결정 반도체 박막(poly-crystalline thin film)을 만들고자 하고 있다. 이를 실현 시키기 위해서는 높은 온도에서 장시간의 열처리가 필요하며, 이는 폴리머 기판의 문제점을 야기시킬 뿐 아니라 공정시간이 길다는 단점이 있었다. 이에 반도체 박막의 재결정화 온도를 낮춰주는 metal (Al, Ni, Co, Cu, Ag, Pd etc.,)을 이용하여 결정화 시키는 방법이 많이 연구 되어지고 있지만, 이 또한 재결정화가 이루어진 반도체 박막 안에 잔여 금속(residual metal)이 존재하게 되어 비저항을 높이고, 홀 속도를 감소시키는 단점이 있다. 이에 본 실험은 HiPIMS (High power impulse magnetron sputtering)와 PIII and D (plasma immersion ion implantation and deposition) 공정을 복합시킨 프로세스로 적은양의 금속이온주입을 통하여 재결정화 온도를 낮췄을 뿐 아니라, 잔여 하는 금속의 양도 매우 적은 다결정 반도체 박막을 만들 수 있었다. 분석 장비로는 박막의 결정화도를 측정하기 위해 GAXRD (glancing angle X-ray diffractometer)를 사용하였고, 잔여 하는 금속의 양과 화학적 결합 상태를 알아보기 위해 XPS를 통해 분석을 하였다. 마지막으로 홀 속도와 비저항을 측정하기 위해 Hall measurement와 Four-point prove를 사용하였다.

• Journal of Korean Vacuum Science & Technology
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• 제4권2호
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• pp.47-49
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• 2000

We report on the fabrication and characterization of InGaN/GaN multiple quantum well light emitting diode (LED) with a highly transparent Pt ohmic contact as a current spreading layer. The value of light transmittance of a Pt thin film with a thickness of 8 m on p-GaN was measured to be 85% at 450nm. The peak wavelength and the full-width at half-maximum (FWHM) of the emission spectrum of the LED at 20 mA were 453 m and 23 m, respectively. Pt-contacted LEDs show good electrical properties and high light-output efficiency compared to Ni/Au-contacted ones. These results suggest that a Pt thin film can be used as an effective current spreading layer with high light-transparency.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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• pp.341-341
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• 2012

Recently, oxide semi-conductor materials have been investigated as promising candidates replacing a-Si:H and poly-Si semiconductor because they have some advantages of a room-temperature process, low-cost, high performance and various applications in flexible and transparent electronics. Particularly, amorphous indium-gallium-zinc-oxide (a-IGZO) is an interesting semiconductor material for use in flexible thin film transistor (TFT) fabrication due to the high carrier mobility and low deposition temperatures. In this work, we demonstrated improvement of flexibility in IGZO TFTs, which were fabricated on polyimide (PI) substrate. At first, a thin poly-4vinyl phenol (PVP) layer was spin coated on PI substrate for making a smooth surface up to 0.3 nm, which was required to form high quality active layer. Then, Ni gate electrode of 100 nm was deposited on the bare PVP layer by e-beam evaporator using a shadow mask. The PVP and $Al_2O_3$ layers with different thicknesses were used for organic/inorganic multi gate dielectric, which were formed by spin coater and atomic layer deposition (ALD), respectively, at $200^{\circ}C$. 70 nm IGZO semiconductor layer and 70 nm Al source/drain electrodes were respectively deposited by RF magnetron sputter and thermal evaporator using shadow masks. Then, IGZO layer was annealed on a hotplate at $200^{\circ}C$ for 1 hour. Standard electrical characteristics of transistors were measured by a semiconductor parameter analyzer at room temperature in the dark and performance of devices then was also evaluated under static and dynamic mechanical deformation. The IGZO TFTs incorporating hybrid gate dielectrics showed a high flexibility compared to the device with single structural gate dielectrics. The effects of mechanical deformation on the TFT characteristics will be discussed in detail.

• 접착 및 계면
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• 제14권1호
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• pp.28-35
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• 2013

본 연구에서는 표면처리된 Ga-doped ZnO (GZO)를 사용해서 태양열 차단 코팅제를 제조하였으며, 표면처리 화합물의 종류와 처리조건에 따른 입자의 분산성, 가시광선투과율, 자외선차단율, 적외선차단율, 단열특성 등에 대해서 고찰하였다. IPA나 아크릴 바인더를 사용했을 때에는 무기산화물 입자의 분산특성이 낮았으나, 무기산화물 입자를 우레탄(우레아)기와 아크릴기 그리고 실리카를 포함하는 하이브리드 화합물로 표면처리한 경우에는 입자의 분산성이 향상되어 침전되는 입자가 거의 발생되지 않았고 가시광선 투과율과 헤이즈(haze)가 크게 향상되었다. 그리고 실제 단열특성을 평가하기 위해서 단열평가 장치와 sunlamp를 사용하였으며, 평가결과 열차단 필름을 사용한 경우 PET 필름 자체만 사용했을 때와 비교해서 내부온도가 $4.8^{\circ}C$ 이상 낮은 것으로 확인되었다.