• 제목/요약/키워드: Neutral point clamped inverter

검색결과 96건 처리시간 0.03초

간단한 구조를 갖는 새로운 방식의 멀티 레벨 인버터에 관한 연구 (The study of New multi-level inverter with simple structure)

  • 이병진;정병창;유철로;이성룡;한우용
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1998년도 하계학술대회 논문집 F
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    • pp.1963-1965
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    • 1998
  • In this paper, a new simplified configuration for a multi-level PWM inverter is proposed. The proposed inverter consists of an auxiliary circuit with one switching device, and 3 phase full-bridge inverter. The proposed inverter, in spite of reduction of the switching devices, offers characteristics similar to the NPC(Neutral - point - clamped)- PWM inverter. Also, since the reduction of the switching devices, the control strategy is simplified. And switching loss is reduced. In addition to, it is possible that reliable DC level voltage than former multi-level inverter. And load power application is same to conventional NPC-PWM inverter. The performance of the system is verified by simulation. In this paper, show the simulation result of the single phase full bridge inverter application.

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Torque Ripple Reduction in Three-Level Inverter-Fed Permanent Magnet Synchronous Motor Drives by Duty-Cycle Direct Torque Control Using an Evaluation Table

  • Chen, Wei;Zhao, Ying-Ying;Zhou, Zhan-Qing;Yan, Yan;Xia, Chang-Liang
    • Journal of Power Electronics
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    • 제17권2호
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    • pp.368-379
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    • 2017
  • In this paper, a direct torque control algorithm with novel duty cycle-based modulation is proposed for permanent magnet synchronous motor drives fed by neutral-point clamped three-level inverters. Compared with the standard DTC, the proposed algorithm can suppress steady-state torque ripples as well as ensure neutral-point potential balance and smooth vector switching. A unified torque/flux evaluation table with multiple voltage vectors and precise control levels is established and used in this method. This table can be used to evaluate the effects of duty-cycle vectors on torque and flux directly, and the elements of the table are independent of the motor parameters. Consequently, a high number of appropriate voltage vectors and their corresponding duty cycles can be selected as candidate vectors to reduce torque ripples by looking up the table. Furthermore, small vectors are incorporated into the table to ensure the neutral-point potential balance with the numerous candidate vectors. The feasibility and effectiveness of the proposed algorithm are verified by both simulations and experiments.

Common-Mode Voltage Elimination with an Auxiliary Half-Bridge Circuit for Five-Level Active NPC Inverters

  • Le, Quoc Anh;Park, Do-Hyeon;Lee, Dong-Choon
    • Journal of Power Electronics
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    • 제17권4호
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    • pp.923-932
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    • 2017
  • This paper proposes a novel scheme which can compensate the common-mode voltage (CMV) for five-level active neutralpoint clamped (5L-ANPC) inverters, which is based on modifying the space vector pulse width modulation (SVPWM) and adding an auxiliary leg to the inverter. For the modified SVPWM, only the 55 voltage vectors producing low CMV values among the 125 possible voltage vectors are utilized, which varies over the three voltage levels of $-V_{dc}/12$, 0 V, and $V_{dc}/12$. In addition, the compensating voltage, which is injected into the 5L-ANPC inverter system to cancel the remaining CVM through a common-mode transformer (CMT) is generated by the additional NPC leg. By the proposed method, the CMV of the inverter is fully eliminated, while the utilization of the DC-link voltage is not decreased at all. Furthermore, all of the DC-link and flying capacitor voltages of the inverter are well controlled. Simulation and experimental results have verified the validity of the proposed scheme.

중전압 응용을 위한 새로운 하이브리드 5-레벨 인버터 (A Novel Hybrid Five-Level Inverter for Medium-Voltage Applications)

  • 다오녹닷;이동춘
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2016년도 전력전자학술대회 논문집
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    • pp.485-486
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    • 2016
  • This paper proposes a new hybrid five-level voltage-source inverter topology, based on the conventional five-level active neutral-point-clamped topology (5L-ANPC), where the lower number of switching devices is required, resulting in saving the cost. The operating principle and control method of the proposed topology is described. The comparison of THD, power losses, loss distribution, and cost of components are evaluated among the proposed topology, the 5L-ANPC and 5L-DCI (diode-clamped inverters) topology.

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성층권 드론에 적용할 멀티레벨 인버터 회로 분석 및 경량화 분석 (Multi-Level Inverter Circuit Analysis and Weight Reduction Analysis to Stratospheric Drones)

  • 황광복;박희문;전향식;이정환;박진현
    • 한국산업융합학회 논문집
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    • 제26권5호
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    • pp.953-965
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    • 2023
  • The stratospheric drones are developed to perform missions such as weather observation, communication relay, surveillance, and reconnaissance at 18km to 20km, where climate change is minimal and there is no worry about a collision with aircraft. It uses solar panels for daytime flights and energy stored in batteries for night flights, providing many advantages over existing satellites. The electrical and power systems essential for stratospheric drone flight must ensure reliability, efficiency, and lightness by selecting the optimal circuit topology. Therefore, it is necessary to analyze the circuit topology of various types of multi-level inverters with high redundancy that can ensure the reliability and efficiency of the motor driving power required for stable long-term flight of stratospheric drones. By quantifying the switch element voltage drop and the number and weight of inverter components for each topology, we evaluate efficiency and lightness and propose the most suitable circuit topology for stratospheric drones.

Natural Balancing of the Neutral Point Potential of a Three-Level Inverter with Improved Firefly Algorithm

  • Gnanasundari, M.;Rajaram, M.;Balaraman, Sujatha
    • Journal of Power Electronics
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    • 제16권4호
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    • pp.1306-1315
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    • 2016
  • Modern power systems driven by high-power converters have become inevitable in view of the ever increasing demand for electric power. The total power loss can be reduced by limiting the switching losses in such power converters; increased power efficiency can thus be achieved. A reduced switching frequency that is less than a few hundreds of hertz is applied to power converters that produce output waveforms with high distortion. Selective harmonic elimination pulse width modulation (SHEPWM) is an optimized low switching frequency pulse width modulation method that is based on offline estimation. This method can pre-program the harmonic profile of the output waveform over a range of modulation indices to eliminate low-order harmonics. In this paper, a SHEPWM scheme for three-phase three-leg neutral point clamped inverter is proposed. Aside from eliminating the selected harmonics, the DC capacitor voltages at the DC bus are also balanced because of the symmetrical pulse pattern over a quarter cycle of the period. The technique utilized in the estimation of switching angles involves the firefly algorithm (FA). Compared with other techniques, FA is more robust and entails less computation time. Simulation in the MATLAB/SIMULINK environment and experimental verification in the very large scale integration platform with Spartan 6A DSP are performed to prove the validity of the proposed technique.

DSP-Based Simplified Space-Vector PWM for a Three-Level VSI with Experimental Validation

  • Ramirez, Jose Dario Betanzos;Rivas, Jaime Jose Rodriguez;Peralta-Sanchez, Edgar
    • Journal of Power Electronics
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    • 제12권2호
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    • pp.285-293
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    • 2012
  • Multilevel inverters have gained attention in high-power applications due to their numerous advantages in comparison with conventional two-level inverters. In this paper a simplified Space-Vector Modulation (SVM) algorithm for a three-level Neutral-Point Clamped (NPC) inverter is implemented on a Freescale$^{(R)}$ DSP56F8037. The algorithm is based on a simplification of the space-vector diagram for a three-level inverter so that it can be used with a two-level inverter. Once the simplification has been achieved, calculation of the dwell times and the switching sequences are carried out in the same way as for the two-level SVM method. Details of the hardware design are included. Experimental results are analyzed to validate the performance of the simplified algorithm.

NPC 인버터에 의한 유도전동기 구동시스템의 새로운 히스테리시스 전류 제어기법 (New hysteresis current control for induction motor drive with NPC inverter)

  • 김춘삼;이병송
    • 조명전기설비학회논문지
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    • 제13권1호
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    • pp.46-52
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    • 1999
  • 본 논문은 NPC 인버터의 구조를 위한 유도전동기 구동 시스템의 새로운 히스테리시스 전휴 제어기법을 제안하였다. 이러한 NPC 구조를 가지는 히스테리시스 전류제어 인버터의 구조는 각상의 인버터 출력전압을 제어하는 주 스위칭 소자와 주 스위치 OFF시에 출력전압을 0전위로 유지시키기 위한 보조 스위칭 소자로 구성된다. 이와 같이 제안된 HNPC (Hysteresis current controlled Neutral Point Clamped) 스위칭 기법은 1차, 2차 전류밴드를 가지며, 전압스위칭 신호는 1차 밴드와 실제전류의 비교 결과로서 발생하고, 2차 밴드와 실제전류의 비교 결과는 전압 스위칭 신호의 상위와 하위를 스위치의 동작을 결정하는 신호로서 동작한다. 이러한 스위칭의 결과로서 제안된 인버터 시스템의 출력 파형은 기존의 전류제어 방식과 비교하여 적은 고조파 성분의 함유특성을 가지고, 동일한 전류밴드 범위에서 낮은 스위칭 주파수를 가진다. 본 연구에서는 제안된 기법을 유도 전동기 구동 시스템에 적용하므로 이들 특성을 시뮬레이션을 통하여 고찰하였다.

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3-레벨 NPC 인버터에서 보조 레그를 이용한 공통 모드 전압 제거 (Cancellation of Common-Mode Voltages in Three-Level NPC Inverters with Auxiliary Leg)

  • 리쿠억안;이동춘
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2016년도 전력전자학술대회 논문집
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    • pp.487-488
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    • 2016
  • In this paper, a new active circuit for common-mode voltage (CMV) cancellation in three-level NPC (neutral-point clamped) inverters is proposed, which can avoid the saturation of the common-mode transformer (CMT). The proposed circuit utilizes an additional three-level leg to produce the compensating CMV of the NPC inverters, which eliminates the CMV of the inverter through the CMT.

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5-레벨 NPC/H-브릿지 인버터의 예측 제어 (Predictive Control of 5-level NPC/H-bridge inverter)

  • 조현기;곽상신
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2014년도 추계학술대회 논문집
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    • pp.21-22
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    • 2014
  • 본 논문은 5-레벨 NPC/H-브릿지 (Neutral Point Clamped/H-bridge) 인버터의 최적 제어 세트 (finite-control-set) 모델 예측 제어 (MPC: Model Predictive Control) 방법을 제안한다. NPC/H-브릿지 인버터의 출력 전류 제어 및 DC-link 커패시터 전압 균형을 유지하기 위해 출력 전류와 DC-link 커패시터 전압을 예측하고, 하나의 비용 함수 (cost function)을 통해 최적의 스위칭 상태를 출력한다. PSIM 시뮬레이션을 통해 제안된 제어 알고리즘의 검증하였다.

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