• Journal of Electrical Engineering and Technology
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• v.9 no.6
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• pp.2168-2180
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• 2014

In this paper, a generalized power loss algorithm for multilevel neutral-point clamped (NPC) PWM inverters is presented, which is applicable to any level number of multilevel inverters. In the case of three-level inverters, the conduction loss depends on the MI (modulation index) and the PF (power factor), and the switching loss depends on a switching frequency, turn-on and turn-off energy. However, in the higher level of inverters than the three-level, the loss of semiconductor devices cannot be analyzed by conventional methods. The modulation depth should be considered in addition, to find the different conducting devices depending on the MI. In a case study, the power loss analysis for the three- and five-level NPC inverters has been performed with the proposed algorithm. The validity of the proposed algorithm is verified by simulation for the three-and five-level NPC inverters and experiment for three-level NPC inverter.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.27 no.4
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• pp.8-15
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• 2013

This paper proposes a DC-link voltage variation compensation method for a 3-level single phase converter for high-speed trains. Since 3-level NPC(Neutral Point Clamped) type converters have the split DC-link causing the inherent problem of voltage fluctuations in the upper and lower capacitors, reducing the voltage difference between the top and bottom capacitors is required. In this paper, compensation time proportional to the voltage difference is added to PWM switching time to solve the voltage variation. The compensation time is obtained by a PI controller. Simulation results demonstrate the validity of the proposed method.

• Proceedings of the KIPE Conference
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• 2004.07b
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• pp.670-672
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• 2004

In this paper, single phase boost converter with low current harmonic components and high power factor are proposed. A single-phase half-bridge rectifier based on a neutral point switch clamped scheme is proposed to draw a nearly unity power factor and regulate the DC link voltage. Three power switches are employed in the proposed rectifier. This rectifier is controlled to generate a bipolar or unipolar PWM voltage waveform on the AC side. The proposed converter is implemented by a digital signal processor.

• The Transactions of the Korean Institute of Power Electronics
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• v.19 no.2
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• pp.173-183
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• 2014

In this paper, an analysis of power losses for the three-level T-type and neutral-point clamped (NPC) PWM inverters is presented, in which the conduction and switching losses of semiconductor devices of the inverters are taken into account. In the inverter operation, the conduction loss depends on the modulation index (MI) and power factor (PF), whereas the switching loss depends on the switching frequency. Power losses for the T-type and NPC inverters are analyzed and calculated at the different operating points of MI, PF and the switching frequency, in which the four different models of semiconductor devices are adopted. In the case of lower MI, the NPC-type is more efficient than the T-type, and vice versa. The validity of the power loss analysis has been verified by the simulation results.

• Journal of Power Electronics
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• v.14 no.6
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• pp.1233-1242
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• 2014

A new inverter topology for single-phase photovoltaic (PV) systems is proposed in this study. The proposed inverter offers a four-level voltage in its output terminals. This feature results in easier filtering in comparison with other conventional two-level or three-level inverters. In addition, the proposed four-level inverter (PFLI) has a transformer-less topology, which decreases the size, weight, and cost of the entire system and increases the overall efficiency of the system. Although the inverter is transformer-less, it produces a negligible leakage ground current (LGC), which makes this inverter suitable for PV grid-connected applications. The performance of the proposed inverter is compared with that of a four-level neutral point clamped inverter (FLNPCI). Theoretical analysis and computer simulations verify that the PFLI topology is superior to FLNPCI in terms of efficiency and suitability for use in PV transformer-less systems.

• Journal of Power Electronics
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• v.14 no.6
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• pp.1157-1165
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• 2014

The T-type topology is a three-level topology that has an advantage in terms of its number of switching device and its efficiency when compared to the neutral-point clamped (NPC)-type topology. With the recent increase in the usage of the T-type topology, the interest in its reliability has also increased. Therefore, a tolerance control for a T-type rectifier is necessary to improve the reliability of applications when an open-switch fault occurs. NPC-type rectifiers cannot eliminate input current distortion completely. However, the T-type rectifier is able to restore distorted current. In this paper, a tolerance control for the $S_{x2}$ and $S_{x3}$ open-switch faults of a T-type rectifier is proposed where it is advantageous in terms of efficiency when compared with other tolerance controls. The performance of the proposed tolerance control is verified through simulation and experimental results.

• Proceedings of the KIPE Conference
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• 2014.11a
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• pp.143-144
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• 2014

본 논문에서는 NPC(Neutral Point Clamped) 및 T-type IGBT 모듈을 이용하여 3상 3-레벨 인버터를 구성하고, 인버터에서 발생되어지는 도통손실과 스위칭 손실을 PSIM의 Thermal Module을 사용하여 확인한다. 또한 토폴로지 상의 차이에 의해 발생되어지는 스위치 손실을 비교 하며, 시뮬레이션에 적용한 파라미터 값들을 수식에 직접 적용하여 손실에 영향을 미치는 파라미터를 확인하고, 각 파라미터의 값의 변화가 주어진 조건에서 전체 손실에 미치는 영향을 확인한다.

• Proceedings of the KIPE Conference
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• 2014.11a
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• pp.115-116
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• 2014

기존의 2-레벨 인버터에 비해 더 나은 출력특성을 갖는 멀티레벨 인버터가 등장함에 따라 이를 좀 더 효율적으로 사용하고자 많은 연구가 진행되어 왔다. 멀티레벨 인버터 종류의 하나로 Neutral-Point-Clamped 인버터를 들 수 있는데, 이를 구동하기 위한 방식으로 여러 가지 PWM 기법들이 사용되고 있다. 기존의 방식들에서는 dc-link단의 커패시터에서 저주파수리플이 발생하는 문제가 있다. 이에 관하여, virtual space vector PWM 기법이 제안된 바 있다. 본 논문에서는 이 기법을 계통연계 방식에 적용하여 그 결과를 시뮬레이션을 통해 확인하였다.

• Proceedings of the KIPE Conference
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• 2014.11a
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• pp.119-120
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• 2014

멀티레벨 인버터는 낮은 고조파 성분을 갖고, 제한된 정격 스위칭 소자로 대용량 전력변환이 요구되는 시스템에 매우 효율적이다. 수학적인 해석방법을 통해 전도손실, 스위칭 손실, 출력 전압 전류의 THD의 해석방법을 제시하고 시뮬레이션을 통해 멀티레벨 인버터의 특성을 비교 분석을 한다. 본 논문은 기존 제안된 멀티레벨 구조인 NPC(Neutral Point Clamped) 멀티레벨 인버터, Cascaded H-bridge 멀티레벨 인버터, Flying capacitor 멀티레벨인버터를 기반으로 25MW급 대용량 인버터의 손실 및 출력특성을 비교 분석하였다.

• Proceedings of the KIPE Conference
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• 2014.11a
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• pp.187-188
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• 2014

본 논문에서는 3-레벨 NPC(Neutral Point Clamped) 인버터에서 상단 커패시터 전압과 하단 커패시터의 전압의 불균형 시 나타나는 출력 상전류 왜곡에 대한 보상기법에 대하여 제안한다. 스위칭 기법은 SVPWM(Space Vector Pulse Width Modulation)을 사용하였고 상단 커패시터 전압과 하단 커패시터 전압의 불균형이 DC-Link 전압의 0% 15% 35%일 때의 보상 전과 보상 후를 비교 분석 하여 시뮬레이션으로 출력 상전류 보상기법을 검증하였다.