• The Journal of Korean Institute of Communications and Information Sciences
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• v.37 no.8B
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• pp.647-656
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• 2012

TDMA MAC protocol in MANET requires precise network synchronization between nodes though network topology changes continuously due to node mobility and the effect of propagation environment. In this paper we propose in-band cross-layer network synchronization architecture for TDMA-based MANETs. In the proposed architecture TDMA MAC protocol and proactive routing protocol cooperate closely to rapidly detect network partition and merge caused by node mobility and to precisely maintain network synchronization. We also implement the proposed synchronization architecture in OPNET simulator and evaluate the performance of it in various simulation scenarios. Simulation results show that our architecture stably maintains network time synchronization in both network partition and merge situations.

• Proceedings of the IEEK Conference
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• 2003.07d
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• pp.1697-1700
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• 2003

The multi-user online game is a typical example of networked graphic applications. Increasing the reality of such a game requires the minimization of problems due to the network delay. In this paper, we propose a game architecture that reduces the network delay needed for message transfer, and a method for synchronization of game states in clients . The proposed game architecture is region proxy-based, and it can require a less network delay than a conventional client-server style that is usually used in commercial games. In our synchronization method, messages are processed in a batch-mode style and the number of rollbacks needed for synchronization significantly decreases. Our experiment shows that our method provides better performance than previous TSS (Trailing State Synchronization).

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.16 no.11 s.102
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• pp.1075-1085
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• 2005

The purpose of this paper is to design the architecture for synchronization of MB-OFDM UWB system that is being processed the standardization for Alt-PHY of WPAN(Wireless Personal Area Network) at IEEE802.15.3a and to analyze the implementation loss due to 4 parallel synchronization architecture for design or link margin. First an overview of the MB-OFDM UWB system based on IEEE802.15.3a Alt-PHY standard is described. The effects of non-ideal transmission conditions of the MB-OFDM UWB system including carrier frequency offset and sampling clock offset are analyzed to design a full digital architecture for synchronization. The synchronization architecture using 4-parallel structure is then proposed to consider the VLSI implementation including algorithms for carrier frequency offset and sampling clock offset to minimize the effects of synchronization errors. The overall performance degradation due to the proposed synchronization architecture is simulated to be with maximum 3.08 dB of the ideal receiver in maximum carrier frequency offset and sampling clock offset tolerance fir MB-OFDM UWB system.

• JSTS:Journal of Semiconductor Technology and Science
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• v.10 no.3
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• pp.185-192
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• 2010

This paper presents a hardware-efficient auto-correlation scheme for the synchronization of MIMO-OFDM based wireless local area network (WLAN) systems, such as IEEE 802.11n. Carrier frequency offset (CFO) estimation for the frequency synchronization requires high complexity auto-correlation operations of many training symbols. In order to reduce the hardware complexity of the MIMO-OFDM synchronization, we propose an efficient correlation scheme based on time-multiplexing technique and the use of reduced samples while preserving the performance. Compared to a conventional architecture, the proposed architecture requires only 27% logic gates and 22% power consumption with acceptable BER performance loss.

• IEMEK Journal of Embedded Systems and Applications
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• v.11 no.1
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• pp.39-46
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• 2016

According to general architecture of flight simulator made up of several independent rendering display systems, display synchronization problem between them naturally happens. In addition, since the flight simulator is usually implemented in the same networks where network delay is not big concern, it is necessary to consider different factors of existing synchronization technique. Among them, in this paper, we propose a new display synchronization scheme for flight simulator where each system has different rendering capacity. In the proposed scheme, each system is synchronized by considering maximum and minimum frames per second (FPS) while considering level of detail and latency. Also, experimental results are given to demonstrate the suitability of the proposed scheme for display synchronization scheme.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.13 no.11
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• pp.5446-5463
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• 2019

Parallel computing system components should be harmonized, and this harmonization is kept existent using synchronization time. Synchronization time affects the system in two ways. First, if we have too little synchronization time, some tasks face the problem of harmonization, as they need appropriate time to update and synchronize with the system. Second, if we allocate a large amount of time, stall system created. Random allocation of synchronization time for parallel systems slows down not only the booting time of the system but also the execution time of each application involved in the system. This paper presents a simulator used to test and allocate appropriate synchronization time for distributed and parallel heterogeneous systems. The simulator creates the parallel and heterogeneous system to be evaluated, and lets the user vary the synchronization time to optimize the booting time. NS3-cGEM5 simulator in this paper is formed by HLA-RTI federation integration of the two independent architecture and network simulators - NS3 and cGEM5. Therefore, nodes created on these simulators need synchronizations for harmonized system performance. We tested and allocated the appropriate synchronization time for our sample parallel system composed of one x86 server and three ARM clients.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.11A
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• pp.1124-1131
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• 2008

In this paper, we propose a timing synchronization scheme and its hardware architecture of the next generation IEEE 802.11n wireless LAN standard which is based on MIMO-OFDM technique. Proposed timing synchronization method takes two steps which consist of two modified auto-correlators. For coarse timing synchronization, a sliding window differentiator is used after a conventional auto-correlation in order to avoid plateau problem. The conjugate symmetry property of L-LTS is utilized for the simplification of fine timing synchronization. Since cross-correlation based methods are not required, the computational complexity and the number of multipliers can be reduced. In order to reduce the hardware complexity, we have used sign multipliers. Based on simulation results, the proposed method outperforms a conventional method. The proposed scheme can be applied to IEEE 802.11n systems and can easily be expanded to frequency synchronization scheme.

• ETRI Journal
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• v.28 no.1
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• pp.31-44
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• 2006

In a packet switching network, congestion is unavoidable and affects the quality of real-time traffic with such problems as delay and packet loss. Packet fair queuing (PFQ) algorithms are well-known solutions for quality-of-service (QoS) guarantee by packet scheduling. Our approach is different from previous algorithms in that it uses hardware time achieved by sampling a counter triggered by a periodic clock signal. This clock signal can be provided to all the modules of a routing system to get synchronization. In this architecture, a variant of the PFQ algorithm, called digitized delay queuing (DDQ), can be distributed on many line interface modules. We derive the delay bounds in a single processor system and in a distributed architecture. The definition of traffic contribution improves the simplicity of the mathematical models. The effect of different time between modules in a distributed architecture is the key idea for understanding the delay behavior of a routing system. The number of bins required for the DDQ algorithm is also derived to make the system configuration clear. The analytical models developed in this paper form the basis of improvement and application to a combined input and output queuing (CIOQ) router architecture for a higher speed QoS network.

• ETRI Journal
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• v.19 no.3
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• pp.98-115
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• 1997

The architecture of the CDMA mobile system (CMS) is developed based on three function groups - service resource, service control, and service management groups. In this paper, the CMS architecture is discussed from the point of view of implementing these functions. The variable length packets are used for transmission. The synchronization clock signals are derived form the GPS receiver. The open loop and closed loop techniques are used for the power control. The internationally accepted signaling and network protocols are employed. The call control for the primary services in designed to provide efficient mobile telecommunication services. The softer handoff is implemented in one card. The mobile assisted handoff and the network assisted handoff are employed in the soft and hard handoffs. The authentication is based on the secret data which includes random numbers. The management functions, which include the location management, resource management, cell boundary management and OAM management, are implemented to warrant the system efficiency, maximum capacity and high reliability. The architecture ensures that the CMS is flexible and expandable to provide subscribers with economic and efficient system configuration. The dynamic power control, adaptive channel allocation. and dynamic cell boundary management are recommended for future work.

• Proceedings of the Korea Information Processing Society Conference
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• 2008.11a
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• pp.1280-1283
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• 2008

The network performance of MOGs(Multiplayer Online Games) can be measured by the amount of network loads and the response times on user inputs. This paper introduces a frame locking algorithm and a game turn algorithm that have been used for game synchronization in the area of RTS(Real-time Strategy Simulation) Games, a kind of MOG; the results of performance evaluation of these two algorithms are also given. In addition, a server architecture for MOG servers in which replacing synchronization algorithms can be done easily for pursuing efficient performance evaluation, is also introduced.