• Title/Summary/Keyword: Network Processors

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Parallel Video Processing Using Divisible Load Scheduling Paradigm

  • Suresh S.;Mani V.;Omkar S. N.;Kim H.J.
    • Journal of Broadcast Engineering
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    • v.10 no.1 s.26
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    • pp.83-102
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    • 2005
  • The problem of video scheduling is analyzed in the framework of divisible load scheduling. A divisible load can be divided into any number of fractions (parts) and can be processed/computed independently on the processors in a distributed computing system/network, as there are no precedence relationships. In the video scheduling, a frame can be split into any number of fractions (tiles) and can be processed independently on the processors in the network, and then the results are collected to recompose the single processed frame. The divisible load arrives at one of the processors in the network (root processor) and the results of the computation are collected and stored in the same processor. In this problem communication delay plays an important role. Communication delay is the time to send/distribute the load fractions to other processors in the network. and the time to collect the results of computation from other processors by the root processors. The objective in this scheduling problem is that of obtaining the load fractions assigned to each processor in the network such that the processing time of the entire load is a minimum. We derive closed-form expression for the processing time by taking Into consideration the communication delay in the load distribution process and the communication delay In the result collection process. Using this closed-form expression, we also obtain the optimal number of processors that are required to solve this scheduling problem. This scheduling problem is formulated as a linear pro-gramming problem and its solution using neural network is also presented. Numerical examples are presented for ease of understanding.

Dynamics Analysis of Industrial Robot Using Neural Network (뉴럴네트워크를 이용한 산업용 로봇의 동특성 해석)

  • Lee, Jin
    • Proceedings of the Korean Society of Machine Tool Engineers Conference
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    • 1997.04a
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    • pp.62-67
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    • 1997
  • This paper reprdsents a new scheme of neural network control system analysis the robustues of robot manipulator using digital signal processors. Digtal signal processors, DSPs, are micro-processors that are particularly developed for fast numerical computations involving sums and products of variables. Digital version of most advanced control algorithms can be defined as sums and products of measured variables, thus it can be programmed and executed through DSPs. In additions, DSPs are a s fast in computation as most 32-bit micro-processors and yet at a fraction of their prices. These features make DSPs a viable computational tool in digital implementation of sophisticated controllers. Durng past decade it was proposed the well-established theorys for the adaptive control of linear systems, but there exists relatively little general theory for the adaptive control of nonlinear systems. The proposed neuro network control algorithm is one of learning a model based error back-propagation scheme using Lyapunov stability analysis method.

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An Efficient Multiprocessor Implementation of Digital Filtering Algorithms (다중 프로세서 시스템을 이용한 디지털 필터링 알고리즘의 효율적 구현)

  • Won Yong Sung
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.28B no.5
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    • pp.343-356
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    • 1991
  • An efficient real-time implementation of digital filtering algorithms using a multiprocessor system in a ring network is investigated. The development time and cost for implementing a high speed signal processing system can be considerably reduced because algorithm are implemented in software using commercially available digital signal processors. This method is based on a parallel block processing approach, where a continuously supplied input data is divided into blocks, and the blocks are processed concurrently by being assigned to each processor in the system. This approach not only requires a simple interconnection network but also reduces the number of communications among the processors very much. The data dependency of the blocks to be processed concurrently brings on dependency problems between the processors in the system. A systematic scheduling method has been developed by using a processors which can be used efficiently, the methods for solving dependency problems between the processors are investigated. Implementation procedures and results for FIR, recursive (IIR), and adaptive filtering algorithms are illustrated.

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Adaptive Control of Industrial Robot Using Neural Network (뉴럴네트워크를 이용한 산업용 로봇의 적응제어)

  • Han, S. H.;Cha, B. N.;Lee, J.
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 1997.04a
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    • pp.751-755
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    • 1997
  • This paper presents a new scheme of neural network controller to improve to improve the robustuous of robot manipulator using digital signal processors. Digital processors, DSPs, are micro-processors that are particularly developed for fast numerical computations involving sums and products of variables. Digital version of most advanced control algorithms can be defined as sums and producrs of measured variables, thus it can be programmed and executed through DSPs. In addition, DSPs are as fist in computation as most 32-bit micro-processors and yet at a fraction of their prices. These features make DSPs a viable computational tool in digital implementation of sophisticated controllers. During past decade it was proposed the well-established theorys for the adaptive control of linear systems, but there exits relativly little gensral theoral for the adaptive control of nonlinear systems. Perforating of the proposed controller is illustrated. This paper describes a new approach to the design of adaptive controller and implementation of real-time control for assembling robotic manipulator using digital signal processor. Digital signal processors used in implementing real time adaptive control algorithm are TMS320C50 series made in TI'Co..

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Optimized AntNet-Based Routing for Network Processors (네트워크 프로세서에 적합한 개선된 AntNet기반 라우팅 최적화기법)

  • Park Hyuntae;Bae Sung-il;Ahn Jin-Ho;Kang Sungho
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.42 no.5 s.335
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    • pp.29-38
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    • 2005
  • In this paper, a new modified and optimized AntNet algorithm which can be implemented efficiently onto network processor is proposed. The AntNet that mimics the activities of the social insect is an adaptive agent-based routing algorithm. This method requires a complex arithmetic calculating system. However, since network processors have simple arithmetic units for a packet processing, it is very difficult to implement the original AntNet algorithm on network processors. Therefore, the proposed AntNet algorithm is a solution of this problem by decreasing arithmetic executing cycles for calculating a reinforcement value without loss of the adaptive performance. The results of the simulations show that the proposed algorithm is more suitable and efficient than the original AntNet algorithm for commercial network processors.

An Efficient Distributed Algoritm for the Weighted Shortest-path Updating Problem (최단 경로 갱신문제를 해결하는 분산알고리듬)

  • Park, Jeong-Ho;Lee, Gyeong-O;Gang, Gyu-Cheol
    • The Transactions of the Korea Information Processing Society
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    • v.7 no.6
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    • pp.1778-1784
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    • 2000
  • We consider the weighted shortest path updating problem, that is, the problem to reconstruct the weighted shortest paths in response to topology change of the network. This appear proposes a distributed algorithms that reconstructs the weighted shortest paths after several processors and links are added and deleted. its message complexity and ideal-time complexity are O(p$^2$+q+n') and O(p$^2$+q+n') respectively, where n' is the number of processors in the network after the topology change, q is the number of added links, and p is the total number of processors in he biconnected components (of the network before the topology change) including the deleted links or added links.

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A Distributed Algorithmfor Weighted Shortest Path Problem (최단경로문제를 해결하는 효율적인 분산 알고리즘)

  • Park, Jeong-Ho;Park, Yun-Yong
    • The Transactions of the Korea Information Processing Society
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    • v.6 no.1
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    • pp.42-48
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    • 1999
  • Consider the situation that informations necessary to solve a certain problem are distributed among processors on a network. It is called a distributed algorithm that in this situation each processor exchanges the message with adjacent processors to solve the problems. This paper proposes a distributed algorithm to solve the problem that constructs the weighted shortest path tree in an asynchronous network system. In general, a distributed algorithm is estimated by the number of messages(message complexity of the distributed algorithm proposed in this paper are O(n53) and O(nln) respectively. where n is the number of processors on the network.

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Adaptive Control of Industrial Robot Using Neural Network (신경회로망을 이용한 산업용 로봇의 적응제어)

  • 장준화;윤정민;차보남;안병규;한성현
    • Proceedings of the Korean Society of Machine Tool Engineers Conference
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    • 2002.04a
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    • pp.387-392
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    • 2002
  • This paper presents a new scheme of neural network controller to improve the robustuous of robot manipulator using digital signal processors. Digital signal processors, DSPs, are micro-processors that are particularly developed for fast numerical computations involving sums and products of variables. Digital version of most advanced control algorithms can be defined as sums and products of measured variables, thus it can be programmed and executed through DSPs. In addition, DSPs are as fast in computation as most 32-bit micro-processors and yet at a fraction of their prices. These features make DSPs a viable computational tool in digital implementation of sophisticated controllers. During past decade it was proposed the well-established theorys for the adaptive control of linear systems, but there exists relatively little general theory for the adaptive control of nonlinear systems. Perforating of the proposed controller is illustrated. This paper describes a new approach to the design of adaptive controller and implementation of real-time control for assembling robotic manipulator using digital signal processor. Digital signal processors used in implementing real time adaptive control algorithm are TMS320C50 series made in TI'Co..

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Adaptive Control of Industrial Robot Using Neural Network (신경회로망을 이용한 산업용 로봇의 적응제어)

  • 차보남;장준화;한덕기;이명재;한성현
    • Proceedings of the Korean Society of Machine Tool Engineers Conference
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    • 2001.10a
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    • pp.134-139
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    • 2001
  • This paper presents a new scheme of neural network controller to improve the robustuous of robot manipulator using digital signal processors. Digital signal processors, DSPs, are micro-processors that are particularly developed for fast numerical computations involving sums and products of variables. Digital version of most advanced control algorithms can be defined as sums and products of measured variables, thus it can be programmed and executed through DSPs. In addition, DSPs are as fast in computation as most 32-bit micro-processors and yet at a fraction of their prices. These features make DSPs a viable computational tool in digital implementation of sophisticated controllers. During past decade it was proposed the well-established theorys for the adaptive control of linear systems, but there exists relatively little general theory for the adaptive control of nonlinear systems. Perforating of the proposed controller is illustrated. This paper describes a new approach to the design of adaptive controller and implementation of real-time control for assembling robotic manipulator using digital signal processor. Digital signal processors used in implementing real time adaptive control algorithm are TMS320C50 series made in TI'Co..

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Message Routing Method for Inter-Processor Communication of the ATM Switching System (ATM 교환기의 프로세서간통신을 위한 메시지 라우팅 방법)

  • Park, Hea-Sook;Moon, Sung-Jin;Park, Man-Sik;Song, Kwang-Suk;Lee, Hyeong-Ho
    • Proceedings of the IEEK Conference
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    • 1998.10a
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    • pp.289-440
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    • 1998
  • This paper describes an interconnection network structure which transports information among processors through a high speed ATM switch. To efficiently use the high speed ATM switch for the message-based multiprocessor, we implemented the cell router that performs multiplexing and demultiplexing of cells from/to processors. In this system, we use the expanded internal cell format including 3bytes for switch routing information. This interconnection network has 3 stage routing strategies: ATM switch routing using switch routing information, cell router routing using a virtual path identifier (VPI) and cell reassembly routing using a virtual channel indentifier (VCI). The interconnection network consists of the NxN folded switch and N cell routers with the M processor interface. Therefore, the maximum number of NxM processors can be interconnected for message communication. This interconnection network using the ATM switch makes a significant improvement in terms of message passing latency and scalability. Additionally, we evaluated the transmission overhead in this interconnection network using ATM switch.

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