• Title/Summary/Keyword: Network Processor[1]

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A Study on the Implementation of Embedded DHCP Server Based on ARM (ARM 기반의 임베디드 DHCP서버 구축에 관한 연구)

  • Kim Hyeong-Gyun;Lee Sang-Beom
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.10 no.8
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    • pp.1490-1494
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    • 2006
  • Most network equipment is an embedded system designed to execute specific function. An embedded system is an electronic control system mixing hardware and software to execute only fixed function for the purpose of system, not confuter, performing diverse function for a wide use. Early embedded system executed only simple function, combining specific function with optimization, a micro size, and low power, but it has developed to meet complex and diverse system. The purpose of this study is to realize DHCP server based on embedded system. To achieve this, embedded Linux was ported in ez Bord-M01 mounted with Intel Strong ARM SA1110 processor, and ethernet-based network was constructed for network function. In this way, this study suggests embedded DHCP server where Window and Linux client hosts are dynamically configurated as network information by dynamically assigning network information in embedded board.

Model Validation of a Fast Ethernet Controller for Performance Evaluation of Network Processors (네트워크 프로세서의 성능 예측을 위한 고속 이더넷 제어기의 상위 레벨 모델 검증)

  • Lee Myeong-jin
    • Journal of KIISE:Computing Practices and Letters
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    • v.11 no.1
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    • pp.92-99
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    • 2005
  • In this paper, we present a high-level design methodology applied on a network system-on-a-chip(SOC) using SystemC. The main target of our approach is to get optimum performance parameters for high network address translation(NAT) throughput. The Fast Ethernet media access controller(MAC) and its direct memory access(DMA) controller are modeled with SystemC in transaction level. They are calibrated through the cycle-based measurement of the operation of the real Verilog register transfer language(RTL). The NAT throughput of the model is within $\pm$10% error compared to the output of the real evaluation board. Simulation speed of the model is more than 100 times laster than the RTL. The validated models are used for intensive architecture exploration to find the performance bottleneck in the NAT router.

Large-scale AC/DC EMT Level System Simulations by a Real Time Digital Simulator (RTDS) in KEPRI-KEPCO

  • Park, In Kwon;Lee, Jaegul;Song, Jiyoung;Kim, Yonghak;Kim, Taekyun
    • KEPCO Journal on Electric Power and Energy
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    • v.3 no.1
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    • pp.17-21
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    • 2017
  • Recently, the Korea Enhanced Power system Simulator (KEPS) was upgraded with new processor cards and various peripheral devices. The purpose of the upgrade is for the large-scale AC/DC simulation studies for different purposes such as FACTS, PMU applications, and SPS. The need for such study is now growing in KEPCO network. Frequently, traditional ways of performing the necessary study had been found to be less adequate for guiding the key decisions in the company. Therefore, the growing needs, as well as the revealed inadequacy of the traditional system studies, had been attributing to the momentum for the upgrade project. This paper explains the details of the upgrade project. As an example of presenting the effectiveness of the upgraded RTDS system in KEPRI-KEPCO, a large-scale AC/DC real time simulation case which includes the entire Korean network and a planned MMC-HVDC system is introduced.

A Design and Implementation of N-IDS Model based on Multi-Thread (멀티 쓰레드 기반 N-IDS 모델의 설계 및 구현)

  • 주수홍;엄윤섭;김상철;홍승표;이재호
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2003.10a
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    • pp.542-547
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    • 2003
  • A network based intrusion detection system(N-IDS), can detect intruders coming in through packets in real time environment. The ability of capture of packet is the most important factor when we evaluate the performance of the system. The time delay between the time handling one packet capture and next one is variant become of packet handling mechanism. So for N-IDS can not settle this problem because most systems use a single processor. In this thesis, we solve the problem of irregular tine delay with a file socket and multi-thread processing. We designed and implement, the Crasto system. By an accurate observation, the performance testing shows that the Crasto reduces the capture delay time to 1/5 comparing to the existing single process N-IDS, and maintain delay time regularly.

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Design of VDL Mode 2 Protocol under AOA Network for the Implementation of Bit-oriented ATS Applications (AOA망 환경에서 ATS 애플리케이션 구현을 위한 VDL Mode 2 데이터링크 프로토콜 설계)

  • Bae, Joong-won;Kim, Hyoun-kyoung;Kim, In-kyu;Kim, Tae-sik;Kim, Dong-min
    • Journal of Aerospace System Engineering
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    • v.1 no.4
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    • pp.13-21
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    • 2007
  • As one of YHF digital data link technologies, VDL Mode 2 is designed to be an air-to-ground subnetwork of the Aeronautical Telecommunication Network (ATN) based on the Open System Interconnection (OSI) architecture. VDL Mode 2 can be used in ATS Applications especially for CPDLC and ADS. And it is also expected to replace ACARS (Aircraft Communications Addressing and Reporting System) which has broadly been used in AOC for over 20 years. This paper presents the design result of VDL Mode 2 system under AOA (ACARS Over AVLC) environment for the implementation of bit-oriented ATS applications. The system is composed of airborne and ground subsystem. Airborne subsystem consists of VDR, CMU and an aircraft test equipment with CPDLC/ADS client applications for operational test and ground system consists of Ground Station which includes ground VDR and ground communication controller, simple DSP (Datalink Service Processor) and a ground test equipment with CPDLC/ADS server applications.

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An Efficient VM-Level Scaling Scheme in an IaaS Cloud Computing System: A Queueing Theory Approach

  • Lee, Doo Ho
    • International Journal of Contents
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    • v.13 no.2
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    • pp.29-34
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    • 2017
  • Cloud computing is becoming an effective and efficient way of computing resources and computing service integration. Through centralized management of resources and services, cloud computing delivers hosted services over the internet, such that access to shared hardware, software, applications, information, and all resources is elastically provided to the consumer on-demand. The main enabling technology for cloud computing is virtualization. Virtualization software creates a temporarily simulated or extended version of computing and network resources. The objectives of virtualization are as follows: first, to fully utilize the shared resources by applying partitioning and time-sharing; second, to centralize resource management; third, to enhance cloud data center agility and provide the required scalability and elasticity for on-demand capabilities; fourth, to improve testing and running software diagnostics on different operating platforms; and fifth, to improve the portability of applications and workload migration capabilities. One of the key features of cloud computing is elasticity. It enables users to create and remove virtual computing resources dynamically according to the changing demand, but it is not easy to make a decision regarding the right amount of resources. Indeed, proper provisioning of the resources to applications is an important issue in IaaS cloud computing. Most web applications encounter large and fluctuating task requests. In predictable situations, the resources can be provisioned in advance through capacity planning techniques. But in case of unplanned and spike requests, it would be desirable to automatically scale the resources, called auto-scaling, which adjusts the resources allocated to applications based on its need at any given time. This would free the user from the burden of deciding how many resources are necessary each time. In this work, we propose an analytical and efficient VM-level scaling scheme by modeling each VM in a data center as an M/M/1 processor sharing queue. Our proposed VM-level scaling scheme is validated via a numerical experiment.

An Energy Control Model of Smart Video Devices for the Internet of Things (사물 인터넷 환경을 위한 스마트 비디오 디바이스의 에너지 제어 모델)

  • Jeong, Jae-Won;Lee, Myeong-Jin
    • Journal of Advanced Navigation Technology
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    • v.19 no.1
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    • pp.66-73
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    • 2015
  • In this paper, an architecture of a perpetual smart video device and its energy control model for the internet of things (IoT) are proposed. The smart video device consists of a processor, an image sensor, a video codec, and a network controller. In the proposed energy control model, energy consumed by image sensing, video encoding, and transmission and energy harvested by solar panels are defined as an input and an output of a battery, an energy buffer. Frame rate, quantization parameter, and operating frequency of processor are defined as the energy control parameters, and these parameters control the input and the output energy of the energy buffer, finally control the energy left in the battery. The proposed energy control model is validated by the energy consumption measurement of the smart phone based platform for various combinations of energy control parameters, and can be used for the design of perpetual smart video device.

Development and Application of Total Maximum Daily Loads Simulation System Using Nonpoint Source Pollution Model (비점원오염모델을 이용한 오염총량모의시스템의 개발 및 적용)

  • Kang, Moon-Seong;Park, Seung-Woo
    • Journal of Korea Water Resources Association
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    • v.36 no.1
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    • pp.117-128
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    • 2003
  • The objectives of this study are to develop the total maximum daily loads simulation system, TOLOS that is capable of estimating annual nonpoint source pollution from small watersheds, to monitor the hydrology and water quality of the Balkan HP#6 watershed, and to validate TOLOS with the field data. TOLOS consists of three subsystems: the input data processor based on a geographic information system, the models, and the post processor. Land use pattern at the tested watershed was classified from the Landsat TM data using the artificial neutral network model that adopts an error back propagation algorithm. Paddy field components were added to SWAT model to simulate water balance at irrigated paddy blocks. SWAT model parameters were obtained from the GIS data base, and additional parameters calibrated with field data. TOLOS was then tested with ungauged conditions. The simulated runoff was reasonably good as compared with the observed data. And simulated water quality parameters appear to be reasonably comparable to the field data.

Development of a Distributed Motion Controller Using CAN

  • Cho, Myoung-Chol;Jeon, Jae-Wook
    • 제어로봇시스템학회:학술대회논문집
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    • 2002.10a
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    • pp.43.2-43
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    • 2002
  • $\textbullet$ A PC can control the fixed number of motors because the number of slots is limited. $\textbullet$ We propose a distributed motion controller using CAN. $\textbullet$ TMS320F243 of TI Which is a DSP with embedded CAN-module was used as the main processor. $\textbullet$ The command from GUI is transmitted to each motion controller through CAN-bus $\textbullet$ CAN communications may occur at a maximum recommended rate of 1Mbit/sec. $\textbullet$ The user can control more motors easily by connecting to the CAN network which has the CAN receive. $\textbullet$ This distributed motion controller may be used usefully in factory automation or an unmanned factory.

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Implementation of a B-Link Interface Logic for a SCI Interconnect (SCI 연결망의 B-Link 인터페이스 회로 구현)

  • 한종석;모상만;기안도;한우종
    • Proceedings of the IEEK Conference
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    • 1999.11a
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    • pp.412-415
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    • 1999
  • In this paper, we describe an implementation of the B-Link bus interface logic for a directory controller and a remote access cash controller in the SCI-based CC-NUMA multimedia server developed by ETRI . The CC-NUMA multimedia server is composed of a number of Pentium III SHV nodes and a SCI interconnection network. To communicate with remote nodes, each node has a CC-Agent which consists of a processor bus interface(PIF). a directory controller(DC), a remote access cash controller(RC), and two SCI 1ink controllers(LCs). The B-Link bus interface logic is developed for a directory controller and a remote access cash controller in order to communicate with a SCI link controller on a B-Link bus. It consists of a sending master controller a receiving slave controller, and asynchronous data buffers. And It performs a self-arbitration, a data packet transmission, a queue allocation, an early terminal ion. and a cut-through data path.

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