• 제목/요약/키워드: Nano-thickness

검색결과 842건 처리시간 0.026초

광조형물의 패턴두께에 따른 표면 거칠기 저감을 위한 공정연구 (A Study on the reduction of surface roughness by analyzing the thickness of photocurable sculpture)

  • 김영수;양형찬;김고범;당현우;도양회;최경현
    • 동력기계공학회지
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    • 제20권4호
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    • pp.75-82
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    • 2016
  • In this paper, we developed a 3D printing system using a photo-curing resin in order to reduce the surface roughness of a sculpture produced with the 3D printer. Using the pattern of the resulting variable thickness, that gave rise to a stepped shape, and the area error of the photo-curable sculpture, a study was carried out for the process to reduce the surface roughness. At a given value of stage velocity (40~70 mm/s) and output air pneumatic pressure (20~60 kPa), the minimum pattern thickness of the pattern was achieved $65{\mu}m$ and the maximum pattern thickness of up to $175{\mu}m$. To increases the pattern resolution to about $40{\mu}m$, the process conditions should be optimized. 3D surface Nano profiler was used to find the surface roughness of the sculpture that was measured to be minimum $4.7{\mu}m$ and maximum $8.7{\mu}m$. The maximum surface roughness was reduced about $1.2{\mu}m$ for the maximum thickness of the pattern. In addition, a FDM was used to fabricate the same sculpture and its surface roughness measurements were also taken for comparison with the one fabricated using photo-curing. Same process conditions were used for both fabrication setups in order to perform the comparison efficiently. The surface roughness of the photo-curable sculpture is $5.5{\mu}m$ lower than the sculpture fabricated using FDM. A certain circuit patterns was formed on the laminated surface of the photo-curable sculpture while there was no stable pattern on the laminated surface of the FDM based sculpture the other hand.

DC마그네트론 스퍼터링으로 Pd박막 입힌 Nafion막의 특성 (Characteristics of Nafion Membranes with Pd Thin Films Deposited by DC Magnetron Sputtering Technique)

  • 황기호;조원일;조병원;윤성렬;하흥용;오인환;김광범
    • 전기화학회지
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    • 제5권2호
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    • pp.68-73
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    • 2002
  • 상용 고분자 전해질인 Nafion 115 및 Nafion 117막 위에 do magnetron sputtering방법으로 Pd박막을 다양한 두께로 증착한 다음, 개질된 고분자 전해질 막의 morphology, proton 전도도(conductivity), 메탄을 투과도(permeability)를 측정하였으며, membrane and electrode assemblies(MEA)를 구성하여 DMFC 단위전지 성능을 측정하였다. Pd 박막은 Nafion막이 지니고 있는 단점인 메탄을 crossover에 대한 barrier로서 작용하였지만, 동시에 Nafion막의 고유 특성인 proton전도도의 감소를 가져왔다. Pd박막에 의하여 개질된 Nafion막의 메탄올에 대한 투과도와 proton전도도는 Nafion 막 상에 증착된 Pd 박막의 두께가 증가할수록 직선적으로 감소하는 경향을 나타냈다 개질된 Nafon 막을 사용하여 제작한 direct methanol fuel cell(DMFC)단위전지의 성능은 전체적으로 약간 저하되었다.

나노급 수소화된 비정질 실리콘층 두께에 따른 저온형성 니켈실리사이드의 물성 연구 (Property of Nickel Silicides with Hydrogenated Amorphous Silicon Thickness Prepared by Low Temperature Process)

  • 김종률;최용윤;박종성;송오성
    • 대한금속재료학회지
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    • 제46권11호
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    • pp.762-769
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    • 2008
  • Hydrogenated amorphous silicon(a-Si : H) layers, 120 nm and 50 nm in thickness, were deposited on 200 $nm-SiO_2$/single-Si substrates by inductively coupled plasma chemical vapor deposition(ICP-CVD). Subsequently, 30 nm-Ni layers were deposited by E-beam evaporation. Finally, 30 nm-Ni/120 nm a-Si : H/200 $nm-SiO_2$/single-Si and 30 nm-Ni/50 nm a-Si:H/200 $nm-SiO_2$/single-Si were prepared. The prepared samples were annealed by rapid thermal annealing(RTA) from $200^{\circ}C$ to $500^{\circ}C$ in $50^{\circ}C$ increments for 30 minute. A four-point tester, high resolution X-ray diffraction(HRXRD), field emission scanning electron microscopy (FE-SEM), transmission electron microscopy (TEM), and scanning probe microscopy(SPM) were used to examine the sheet resistance, phase transformation, in-plane microstructure, cross-sectional microstructure, and surface roughness, respectively. The nickel silicide on the 120 nm a-Si:H substrate showed high sheet resistance($470{\Omega}/{\Box}$) at T(temperature) < $450^{\circ}C$ and low sheet resistance ($70{\Omega}/{\Box}$) at T > $450^{\circ}C$. The high and low resistive regions contained ${\zeta}-Ni_2Si$ and NiSi, respectively. In case of microstructure showed mixed phase of nickel silicide and a-Si:H on the residual a-Si:H layer at T < $450^{\circ}C$ but no mixed phase and a residual a-Si:H layer at T > $450^{\circ}C$. The surface roughness matched the phase transformation according to the silicidation temperature. The nickel silicide on the 50 nm a-Si:H substrate had high sheet resistance(${\sim}1k{\Omega}/{\Box}$) at T < $400^{\circ}C$ and low sheet resistance ($100{\Omega}/{\Box}$) at T > $400^{\circ}C$. This was attributed to the formation of ${\delta}-Ni_2Si$ at T > $400^{\circ}C$ regardless of the siliciation temperature. An examination of the microstructure showed a region of nickel silicide at T < $400^{\circ}C$ that consisted of a mixed phase of nickel silicide and a-Si:H without a residual a-Si:H layer. The region at T > $400^{\circ}C$ showed crystalline nickel silicide without a mixed phase. The surface roughness remained constant regardless of the silicidation temperature. Our results suggest that a 50 nm a-Si:H nickel silicide layer is advantageous of the active layer of a thin film transistor(TFT) when applying a nano-thick layer with a constant sheet resistance, surface roughness, and ${\delta}-Ni_2Si$ temperatures > $400^{\circ}C$.

모스아이 패턴의 충전공정에 대한 점탄성 유한요소해석 (Viscoelastic Finite Element Analysis of Filling Process on the Moth-Eye Pattern)

  • 김국원;이기연;김남웅
    • 한국산학기술학회논문지
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    • 제15권4호
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    • pp.1838-1843
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    • 2014
  • 나노 임프린트 리소그래피는 수십 나노미터에서 수십 마이크론에 이르는 패턴을 간단하고 저비용으로 대면적 기판에 제작할 수 있어 차세대 패터닝 기술로 주목 받고 있다. 특히, 발광소자, 태양전지, 디스플레이 등의 분야에서는 저반사 나노패턴, 광결정 패턴 등 기능성 패턴을 제작하고 이를 적용하는 연구가 활발히 진행 중에 있다. NIL공정을 통해 성공적으로 패턴을 전사시키기 위해서는 적절한 공정조건의 선택이 필요하다. 이에 본 연구에서는 열 나노임프린트를 이용하여 모스아이 패턴을 전사할 때, 충전과정 및 잔류층 형성을 수치 해석하여 폴리머 레지스트의 점탄성 거동을 살펴 보았고, 레지스트 초기 코팅 두께의 변화 및 가압력의 변화가 충전과정 및 잔류층에 미치는 영향을 조사하였다. 해석결과 본 논문에서 고려된 PMMA의 경우, 4MPa 이상의 압력에서 100초 내로 충전공정이 완료되는 것으로 나타났다.

Thermal Stability Enhanced Ge/graphene Core/shell Nanowires

  • 이재현;최순형;장야무진;김태근;김대원;김민석;황동훈;;황성우;황동목
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2012년도 제43회 하계 정기 학술대회 초록집
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    • pp.376-376
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    • 2012
  • Semiconductor nanowires (NWs) are future building block for nano-scale devices. Especially, Ge NWs are fascinated material due to the high electrical conductivity with high carrier mobility. It is strong candidate material for post-CMOS technology. However, thermal stability of Ge NWs are poor than conventional semiconductor material such as Si. Especially, when it reduced size as small as nano-scale it will be melted around CMOS process temperature due to the melting point depression. Recently, Graphene have been intensively interested since it has high carrier mobility with single atomic thickness. In addition, it is chemically very stable due to the $sp^2$ hybridization. Graphene films shows good protecting layer for oxidation resistance and corrosion resistance of metal surface using its chemical properties. Recently, we successfully demonstrated CVD growth of monolayer graphene using Ge catalyst. Using our growth method, we synthesized Ge/graphene core/shell (Ge@G) NW and conducted it for highly thermal stability required devices. We confirm the existence of graphene shell and morphology of NWs using SEM, TEM and Raman spectra. SEM and TEM images clearly show very thin graphene shell. We annealed NWs in vacuum at high temperature. Our results indicated that surface melting phenomena of Ge NWs due to the high surface energy from curvature of NWs start around $550^{\circ}C$ which is $270^{\circ}C$ lower than bulk melting point. When we increases annealing temperature, tip of Ge NWs start to make sphere shape in order to reduce its surface energy. On the contrary, Ge@G NWs prevent surface melting of Ge NWs and no Ge spheres generated. Furthermore, we fabricated filed emission devices using pure Ge NWs and Ge@G NWs. Compare with pure Ge NWs, graphene protected Ge NWs show enhancement of reliability. This growth approach serves a thermal stability enhancement of semiconductor NWs.

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유도결합플라즈마를 이용한 TaN 박막의 식각 특성 (Etching Property of the TaN Thin Film using an Inductively Coupled Plasma)

  • 엄두승;우종창;김동표;김창일
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2009년도 하계학술대회 논문집
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    • pp.104-104
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    • 2009
  • Critical dimensions has rapidly shrunk to increase the degree of integration and to reduce the power consumption. However, it is accompanied with several problems like direct tunneling through the gate insulator layer and the low conductivity characteristic of poly-silicon. To cover these faults, the study of new materials is urgently needed. Recently, high dielectric materials like $Al_2O_3$, $ZrO_2$ and $HfO_2$ are being studied for equivalent oxide thickness (EOT). However, poly-silicon gate is not compatible with high-k materials for gate-insulator. To integrate high-k gate dielectric materials in nano-scale devices, metal gate electrodes are expected to be used in the future. Currently, metal gate electrode materials like TiN, TaN, and WN are being widely studied for next-generation nano-scale devices. The TaN gate electrode for metal/high-k gate stack is compatible with high-k materials. According to this trend, the study about dry etching technology of the TaN film is needed. In this study, we investigated the etch mechanism of the TaN thin film in an inductively coupled plasma (ICP) system with $O_2/BCl_3/Ar$ gas chemistry. The etch rates and selectivities of TaN thin films were investigated in terms of the gas mixing ratio, the RF power, the DC-bias voltage, and the process pressure. The characteristics of the plasma were estimated using optical emission spectroscopy (OES). The surface reactions after etching were investigated using X-ray photoelectron spectroscopy (XPS) and auger electron spectroscopy (AES).

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지르코니아 블록 폐기물을 이용한 싱글코어의 제조법 (Production of Single Core with Waste Zirconia Block)

  • 조준호;서정일;배원태
    • 대한치과기공학회지
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    • 제35권1호
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    • pp.57-64
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    • 2013
  • Purpose: Waste parts of zirconia blocks and powders were remained after CAD/CAM process. In order to make these residual zirconia fit for practical use, zirconia single cores were produced by drain casting process. Methods: Remained zirconia blocks were reduced to powders with zirconia mortar, and screened with 180 mesh sieve. Zirconia slip was prepared from waste parts of zirconia by ball milling. Plaster molds for forming cores by slip casting were also prepared. Formed cores were removed from mold after partial drying. Dried cores were biscuit fired at $1,100^{\circ}C$ for 1hour. Biscuit fired cores were treated with tools to control the fitness and thickness. Finished cores were $2^{nd}$ fired at $1,500^{\circ}C$ for 1hour. Microstructure of cross section of core was observed by SEM. Results: When mill pot was filled with 100g of zirconia and alumina mixed powder, 300g of zirconia ball, and 180g of distilled water, the optimum slip for drain casting was obtained. Gypsum plaster for ceramic forming was more suitable then yellow stone plaster for casting process. SEM photograph showed the microstructure of fully dense with uniform grain size of zirconia and well dispersed alumina grains into the zirconia matrix. Conclusion: Zirconia single cores were produced by drain casting process. Drain casting is useful process to make these residual zirconia fit for practical use. Further study will be focused on the preparation of the bridge type cores by casting.

지르코니아 광페룰 사출성형용 WC 코아 핀의 Diamond Like Carbon 코팅 (Diamond Like Carbon Coating on WC Core Pin for Injection Molding of Zirconia Optical Ferrule)

  • 박현우;정세훈;김현영;이광민
    • 한국재료학회지
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    • 제20권11호
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    • pp.570-574
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    • 2010
  • A diamond-like carbon (DLC) film deposited on a WC disk was investigated to improve disk wear resistance for injection molding of zirconia optical ferrule. The deposition of DLC films was performed using the filtered vacuum arc ion plating (FV-AIP) system with a graphite target. The coating processing was controlled with different deposition times and the other conditions for coating, such as input power, working pressure, substrate temperature, gas flow, and bias voltage, were fixed. The coating layers of DLC were characterized using FE-SEM, AFM, and Raman spectrometry; the mechanical properties were investigated with a scratch tester and a nano-indenter. The friction coefficient of the DLC coated on the WC was obtained using a pin-on-disk, according to the ASTM G163-99. The thickness of DLC films coated for 20 min. and 60 min. was about 750 nm and 300 nm, respectively. The surface roughness of DLC films coated for 60 min. was 5.9 nm. The Raman spectrum revealed that the G peak of DLC film was composed of $sp^3$ amorphous carbon bonds. The critical load (Lc) of DLC film obtained with the scratch tester was 14.6 N. The hardness and elastic modulus of DLC measured with the nano-indenter were 36.9 GPa and 585.5 GPa, respectively. The friction coefficient of DLC coated on WC decreased from 0.2 to 0.01. The wear property of DLC coated on WC was enhanced by a factor of 20.

졸-겔 방법으로 제조된 Er doped $Al_2O_3/SiO_2$ 필름의 다공성과 결정성에 대한 광 발광 특성 (The dependence of porosity and crystallity on photoluminescence properties of Er doped $Al_2O_3/SiO_2$ films prepared by sol-gel method)

  • 권정오;김재홍;석상일;정동운
    • 한국재료학회:학술대회논문집
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    • 한국재료학회 2003년도 추계학술발표강연 및 논문개요집
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    • pp.137-137
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    • 2003
  • Optical amplificator have been used to compensate the losses in the optical signal transmission and processing. Today, there has been increasing demand for the very low cost optical amplifier. Sol-gel offers considerable potential both low cost manufacture, and for great flexibility in materials composition and structure. In addition, the sol-gel process is a very attractive method for producing porous materials with controlled structure. In this work, we present the potoluminescence properties of Er doped A1$_2$O$_3$/SiO$_2$ films. Erbium doped alumina nano sol was prepared by Al(NO$_3$)$_3$.9$H_2O$ and Er(NO$_3$)$_3$.5$H_2O$ through hydrolysis and peptization, and then GPS (3-Glycidoxypropyltrimethoxysilane) was added into Er doped alumina nano sol for organic- inorganic hybridization. Er doped A1$_2$O$_3$/SiO$_2$ film was obtained by spin coating, dip coating and thermal treatment from 30$0^{\circ}C$~120$0^{\circ}C$, and there were crack-free after thermal treatment. The thickness of film was measured SEM, and the porosity of film was characterized by BET and TGA. The crystal phase of Er doped A1$_2$O$_3$/SiO$_2$ were determined by XRD. Finally, the photoluminescence properties of Er doped A1$_2$O$_3$/SiO$_2$ films will be discuss with the consideration of porosity and crystallity.

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FIB를 이용한 CoNi 복합실리사이드 나노배선의 패턴가공과 형상 분석 (Patterning and Characterization of Co/Ni Composite Silicide using EIB)

  • 송오성;김상엽;윤기정
    • 한국산학기술학회논문지
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    • 제7권3호
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    • pp.332-337
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    • 2006
  • 기판전면에 패턴 없이 15 nm Co/15 nm Ni/70 nm polysilicon/200 nm $SiO_2$/Si(100) 구조로 적층된 구조로부터 급속열처리기 (rapid thermal annealer : RTA)를 이용하여 40초간 700, 900, $1000^{\circ}C$의 실리사이드화 온도를 변화시키면서 CoNi 복합실리사이드를 형성하였다. 완성된 두께 100 nm 정도의 CoNi 복합실리사이드층으로 배선층을 만든다고 상정하여, 이중 집속이온빔(dual beam focused ion beam : FIB)을 써서 30 kV에서 표면전류를 $1{\sim}100$ pA 범위에서 조절하면서 나노급 선폭제작의 가능성을 확인하였다. 각 온도별 복합실리사이드에 동일한 이온빔 조건으로 $100{\mu}m$ 길이의 패턴을 만들고, 이온빔으로 양 끝단에 트렌치를 만들어 FE-SEM으로 각 조건에서의 선폭, 두께, 최종 에칭형상을 확인하였다. 기존 형상변형이 많아서 나노급 선폭 구현이 불리한 폴리사이드 공정에 비해서, 최초로 새로운 저저항 복합실리사이드에 대해서 100 nm 이하의 나노급 피치를 가진 선폭 제작이 $30kV{\sim}30pA$ 범위에서 가능하였다.

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