• Title/Summary/Keyword: Nano-thick nickel silicide

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Property of Nickel Silicides with Hydrogenated Amorphous Silicon Thickness Prepared by Low Temperature Process (나노급 수소화된 비정질 실리콘층 두께에 따른 저온형성 니켈실리사이드의 물성 연구)

  • Kim, Jongryul;Choi, Youngyoun;Park, Jongsung;Song, Ohsung
    • Korean Journal of Metals and Materials
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    • v.46 no.11
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    • pp.762-769
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    • 2008
  • Hydrogenated amorphous silicon(a-Si : H) layers, 120 nm and 50 nm in thickness, were deposited on 200 $nm-SiO_2$/single-Si substrates by inductively coupled plasma chemical vapor deposition(ICP-CVD). Subsequently, 30 nm-Ni layers were deposited by E-beam evaporation. Finally, 30 nm-Ni/120 nm a-Si : H/200 $nm-SiO_2$/single-Si and 30 nm-Ni/50 nm a-Si:H/200 $nm-SiO_2$/single-Si were prepared. The prepared samples were annealed by rapid thermal annealing(RTA) from $200^{\circ}C$ to $500^{\circ}C$ in $50^{\circ}C$ increments for 30 minute. A four-point tester, high resolution X-ray diffraction(HRXRD), field emission scanning electron microscopy (FE-SEM), transmission electron microscopy (TEM), and scanning probe microscopy(SPM) were used to examine the sheet resistance, phase transformation, in-plane microstructure, cross-sectional microstructure, and surface roughness, respectively. The nickel silicide on the 120 nm a-Si:H substrate showed high sheet resistance($470{\Omega}/{\Box}$) at T(temperature) < $450^{\circ}C$ and low sheet resistance ($70{\Omega}/{\Box}$) at T > $450^{\circ}C$. The high and low resistive regions contained ${\zeta}-Ni_2Si$ and NiSi, respectively. In case of microstructure showed mixed phase of nickel silicide and a-Si:H on the residual a-Si:H layer at T < $450^{\circ}C$ but no mixed phase and a residual a-Si:H layer at T > $450^{\circ}C$. The surface roughness matched the phase transformation according to the silicidation temperature. The nickel silicide on the 50 nm a-Si:H substrate had high sheet resistance(${\sim}1k{\Omega}/{\Box}$) at T < $400^{\circ}C$ and low sheet resistance ($100{\Omega}/{\Box}$) at T > $400^{\circ}C$. This was attributed to the formation of ${\delta}-Ni_2Si$ at T > $400^{\circ}C$ regardless of the siliciation temperature. An examination of the microstructure showed a region of nickel silicide at T < $400^{\circ}C$ that consisted of a mixed phase of nickel silicide and a-Si:H without a residual a-Si:H layer. The region at T > $400^{\circ}C$ showed crystalline nickel silicide without a mixed phase. The surface roughness remained constant regardless of the silicidation temperature. Our results suggest that a 50 nm a-Si:H nickel silicide layer is advantageous of the active layer of a thin film transistor(TFT) when applying a nano-thick layer with a constant sheet resistance, surface roughness, and ${\delta}-Ni_2Si$ temperatures > $400^{\circ}C$.

Microstructure Characterization on Nano-thick Nickel Cobalt Composite Silicide on Polycrystalline Substrates (다결정 실리콘 기판 위에 형성된 나노급 니켈 코발트 복합실리사이드의 미세구조 분석)

  • Song, Oh-Sung
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.8 no.2
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    • pp.195-200
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    • 2007
  • We fabricated thermally-evaporated 10 nm-Ni/70 w-Poly-Si/200 $nm-SiO_2/Si$ and $10nm-Ni_{0.5}Co_{0.5}/70$ nm-Poly-Si/200 $nm-SiO_2/Si$ structures to investigate the microstructure of nickel monosilicide at the elevated temperatures required fur annealing. Silicides underwent rapid anneal at the temperatures of $600{\sim}1100^{\circ}C$ for 40 seconds. Silicides suitable for the salicide process formed on top of the polycrystalline silicon substrate mimicking the gates. A four-point tester was used to investigate the sheet resistances. A transmission electron microscope and an Auger depth profile scope were employed for the determination of cross sectional microstructure and thickness. 20nm thick nickel cobalt composite silicides on polycrystalline silicon showed low resistance up to $900^{\circ}C$, while the conventional nickle silicide showed low resistance below $900^{\circ}C$. Through TEM analysis, we confirmed that the 70nm-thick nickel cobalt composite silicide showed a unique silicon-silicide mixing at the high silicidation temperature of $1000^{\circ}C$. We identified $Ni_3Si_2,\;CoSi_2$ phase at $700^{\circ}C$ using an X-ray diffractometer. Auger depth profile analysis also supports the presence of this mixed microstructure. Our result implies that our newly proposed NiCo composite silicide from NiCo alloy films process may widen the thermal process window for the salicide process and be suitable for nano-thick silicides.

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Property and Microstructure Evolution of Nickel Silicides on Nano-thick Polycrystalline Silicon Substrates (나노급 다결정 실리콘 기판 위에 형성된 니켈실리사이드의 물성과 미세구조)

  • Kim, Jong-Ryul;Choi, Young-Youn;Song, Oh-Sung
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.9 no.1
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    • pp.16-22
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    • 2008
  • We fabricated thermally-evaporated 10 nm-Ni/30 nm and 70 nm Poly-Si/200 nm-$SiO_2/Si$ structures to investigate the thermal stability of nickel silicides formed by rapid thermal annealing(RTA) of the temperature of $300{\sim}1100^{\circ}C$ for 40 seconds. We employed for a four-point tester, field emission scanning electron microscope(FE-SEM), transmission electron microscope(TEM), high resolution X-ray diffraction(HRIXRD), and scanning probe microscope(SPM) in order to examine the sheet resistance, in-plane microstructure, cross-sectional microstructure evolution, phase transformation, and surface roughness, respectively. The silicide on 30 nm polysilicon substrate was stable at temperature up to $900^{\circ}C$, while the one on 70 nm substrate showed the conventional $NiSi_2$ transformation temperature of $700^{\circ}C$. The HRXRD result also supported the existence of NiSi-phase up to $900^{\circ}C$ for the Ni silicide on the 30 nm polysilicon substrate. FE-SEM and TEM confirmed that 40 nm thick uniform silicide layer and island-like agglomerated silicide phase of $1{\mu}m$ pitch without residual polysilicon were formed on 30 nm polysilicon substrate at $700^{\circ}C\;and\;1000^{\circ}C$, respectively. All silicides were nonuniform and formed on top of the residual polysilicon for 70 nm polysilicon substrates. Through SPM analysis, we confirmed the surface roughness was below 17 nm, which implied the advantage on FUSI gate of CMOS process. Our results imply that we may tune the thermal stability of nickel monosilicide by reducing the height of polysilicon gate.

Patterning and Characterization of Co/Ni Composite Silicide using EIB (FIB를 이용한 CoNi 복합실리사이드 나노배선의 패턴가공과 형상 분석)

  • Song Oh-Sung;Kim Sang-Yeob;Jung Yoon-Ki
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.7 no.3
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    • pp.332-337
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    • 2006
  • We prepared 100 nm-thick CoNi composite silicide on a 70 nm-thick polysilicon substrate. Composite silicide laye.s were formed by rapid thermal annealing(RTA) at the temperatures of $700^{\circ}C,\;900^{\circ}C,\;1000^{\circ}C$ for 40 seconds. A Focused ion beam (FIB) was used to make nano-patterns with the operation range of 30 kV and $1{\sim}100$ pA. We investigated the change of thickness, line width, and the slope angle of the silicide patterns by FIB. More easily made with the FIB process than with the conventional polycide process. We successfully fabricated sub-100nm etched patterns with FIB condition of 30kv-30pA. Our result implies that we may integrate nano patterns with our newly proposed CoNi composite silicides.

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Property of Nickel Silicide with 60 nm and 20 nm Hydrogenated Amorphous Silicon Prepared by Low Temperature Process (60 nm 와 20 nm 두께의 수소화된 비정질 실리콘에 따른 저온 니켈실리사이드의 물성 변화)

  • Kim, Joung-Ryul;Park, Jong-Sung;Choi, Young-Youn;Song, Oh-Sung
    • Journal of the Korean Vacuum Society
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    • v.17 no.6
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    • pp.528-537
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    • 2008
  • 60 nm and 20 nm thick hydrogenated amorphous silicon(a-Si:H) layers were deposited on 200 nm $SiO_2$/single-Si substrates by inductively coupled plasma chemical vapor deposition(ICP-CVD). Subsequently, 30 nm-Ni layers were deposited by an e-beam evaporator. Finally, 30 nm-Ni/(60 nm and 20 nm) a-Si:H/200 nm-$SiO_2$/single-Si structures were prepared. The prepared samples were annealed by rapid thermal annealing(RTA) from $200^{\circ}C$ to $500^{\circ}C$ in $50^{\circ}C$ increments for 40 sec. A four-point tester, high resolution X-ray diffraction(HRXRD), field emission scanning electron microscopy(FE-SEM), transmission electron microscopy(TEM), and scanning probe microscopy(SPM) were used to examine the sheet resistance, phase transformation, in-plane microstructure, cross-sectional microstructure, and surface roughness, respectively. The nickel silicide from the 60 nm a-Si:H substrate showed low sheet resistance from $400^{\circ}C$ which is compatible for low temperature processing. The nickel silicide from 20 nm a-Si:H substrate showed low resistance from $300^{\circ}C$. Through HRXRD analysis, the phase transformation occurred with silicidation temperature without a-Si:H layer thickness dependence. With the result of FE-SEM and TEM, the nickel silicides from 60 nm a-Si:H substrate showed the microstructure of 60 nm-thick silicide layers with the residual silicon regime, while the ones from 20 nm a-Si:H formed 20 nm-thick uniform silicide layers. In case of SPM, the RMS value of nickel silicide layers increased as the silicidation temperature increased. Especially, the nickel silicide from 20 nm a-Si:H substrate showed the lowest RMS value of 0.75 at $300^{\circ}C$.

Property of Nickel Silicides on ICP-CVD Amorphous Silicon with Silicidation Temperature (ICP-CVD 비정질 실리콘에 형성된 처리온도에 따른 저온 니켈실리사이드의 물성 변화)

  • Kim, Jong-Ryul;Choi, Young-Youn;Park, Jong-Sung;Song, Oh-Sung
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.9 no.2
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    • pp.303-310
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    • 2008
  • We fabricated hydrogenated amorphous silicon(a-Si:H) 140 nm thick film on a $180\;nm-SiO_2/Si$ substrate with an inductively-coupled plasma chemical vapor deposition(ICP-CVD) equipment at $250^{\circ}C$. Moreover, 30 nm-Ni film was deposited with a thermal-evaporator sequently. Then the film stack was annealed to induce silicides by a rapid thermal annealer(RTA) at $200{\sim}500^{\circ}C$ in every $50^{\circ}C$ for 30 minuets. We employed a four-point tester, high resolution X-ray diffraction(HRXRD), field emission scanning electron microscope(FE-SEM), transmission electron microscope(TEM), and scanning probe microscope(SPM) in order to examine the sheet resistance, phase transformation, in-plane microstructure, cross-sectional microstructure evolution, and surface roughness, respectively. We confirmed that nano-thick high resistive $Ni_3Si$, mid-resistive $Ni_2Si$, and low resistive NiSi phases were stable at the temperature of <300, $350{\sim}450^{\circ}C$, and >$450^{\circ}C$, respectively. Through SPM analysis, we confirmed the surface roughness of nickel silicide was below 12 nm, which implied that it was superior over employing the glass and polymer substrates.

Nano-thick Nickel Silicide and Polycrystalline Silicon on Polyimide Substrate with Extremely Low Temperature Catalytic CVD (폴리이미드 기판에 극저온 Catalytic-CVD로 제조된 니켈실리사이드와 실리콘 나노박막)

  • Song, Ohsung;Choi, Yongyoon;Han, Jungjo;Kim, Gunil
    • Korean Journal of Metals and Materials
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    • v.49 no.4
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    • pp.321-328
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    • 2011
  • The 30 nm-thick Ni layers was deposited on a flexible polyimide substrate with an e-beam evaporation. Subsequently, we deposited a Si layer using a catalytic CVD (Cat-CVD) in a hydride amorphous silicon (${\alpha}$-Si:H) process of $T_{s}=180^{\circ}C$ with varying thicknesses of 55, 75, 145, and 220 nm. The sheet resistance, phase, degree of the crystallization, microstructure, composition, and surface roughness were measured by a four-point probe, HRXRD, micro-Raman spectroscopy, FE-SEM, TEM, AES, and SPM. We confirmed that our newly proposed Cat-CVD process simultaneously formed both NiSi and crystallized Si without additional annealing. The NiSi showed low sheet resistance of < $13{\Omega}$□, while carbon (C) diffused from the substrate led the resistance fluctuation with silicon deposition thickness. HRXRD and micro-Raman analysis also supported the existence of NiSi and crystallized (>66%) Si layers. TEM analysis showed uniform NiSi and silicon layers, and the thickness of the NiSi increased as Si deposition time increased. Based on the AES depth profiling, we confirmed that the carbon from the polyimide substrate diffused into the NiSi and Si layers during the Cat-CVD, which caused a pile-up of C at the interface. This carbon diffusion might lessen NiSi formation and increase the resistance of the NiSi.

Nano-thick Nickel Silicide and Polycrystalline Silicon on Glass Substrate with Low Temperature Catalytic CVD (유리 기판에 Catalytic CVD 저온공정으로 제조된 나노급 니켈실리사이드와 결정질 실리콘)

  • Song, Ohsung;Kim, Kunil;Choi, Yongyoon
    • Korean Journal of Metals and Materials
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    • v.48 no.7
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    • pp.660-666
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    • 2010
  • 30 nm thick Ni layers were deposited on a glass substrate by e-beam evaporation. Subsequently, 30 nm or 60 nm ${\alpha}-Si:H$ layers were grown at low temperatures ($<220^{\circ}C$) on the 30 nm Ni/Glass substrate by catalytic CVD (chemical vapor deposition). The sheet resistance, phase, microstructure, depth profile and surface roughness of the $\alpha-Si:H$ layers were examined using a four-point probe, HRXRD (high resolution Xray diffraction), Raman Spectroscopy, FE-SEM (field emission-scanning electron microscopy), TEM (transmission electron microscope) and AES depth profiler. The Ni layers reacted with Si to form NiSi layers with a low sheet resistance of $10{\Omega}/{\Box}$. The crystallinty of the $\alpha-Si:H$ layers on NiSi was up to 60% according to Raman spectroscopy. These results show that both nano-scale NiSi layers and crystalline Si layers can be formed simultaneously on a Ni deposited glass substrate using the proposed low temperature catalytic CVD process.

Thermal Stability Enhancement of Nickel Monosilicides by Addition of Pt and Ir (Pt와 Ir 첨가에 의한 니켈모노실리사이드의 고온 안정화)

  • Yoon, Ki-Jeong;Song, Oh-Sung
    • Journal of the Microelectronics and Packaging Society
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    • v.13 no.4
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    • pp.27-36
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    • 2006
  • We fabricated thermally evaporated 10 nm-Ni/(poly)Si, 10 nm-Ni/l nm-Ir/(poly)Si and 10 nm-Ni/l nm-Pt/(poly)Si films to investigate the thermal stability of nickel monosilicides at the elevated temperatures by rapid annealing them at the temperatures of $300{\sim}1200^{\circ}C$ for 40 seconds. Silicides of 50 nm-thick were formed on top of both the single crystal silicon actives and the polycrystalline silicon gates. A four-point tester was used to examine sheet resistance. A scanning electron microscope and field ion beam were employed for thickness and microstructure evolution characterization. An X-ray diffractometer and an Auger depth profiler were used for phase and composition analysis, respectively. Nickel silicides with platinum have no effect on widening the NiSi stabilization temperature region. Nickel silicides with iridium farmed on single crystal silicon showed a low resistance up to $1200^{\circ}C$ while the ones formed on polycrystalline silicon substrate showed low resistance up to $850^{\circ}C$. The grain boundary diffusion and agglomeration of silicides lowered the NiSi stable temperature with polycrystalline silicon substrates. Our result implies that our newly proposed Ir added NiSi process may widen the thermal process window for nano CMOS process.

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