• 한국전기전자재료학회논문지
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• 제16권4호
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• pp.330-335
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• 2003

This paper reports the optimum structure of the vacuum packaged Porous poly-silicon Nano-Structured (PNS) emitter. The PNS layer was obtained by electrochemical etching process into polycrystalline silicon layer in a process controlled to anodizing condition. Current-voltage studies were carried out to optimize process condition of electron emission properties as a function of anodizing condition and top electrode thickness. Also, we measured in advance the electron emission properties as a function of substrate temperature because the vacuum packaged process was performed under the condition of high temperature ambient (430$^{\circ}C$). Auger Electron Spectrometer (AES) studies shows that Au as a top-electrode was diffused to PNS layer during temperature experiments. Thus, we optimized the thickness of top-electrode in order to make the vacuum package PNS emitter. As a result, the vacuum Packaged PNS emitter was successfully emitted by optimizing process.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 추계학술대회 논문집
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• pp.33-33
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• 2009

Silicon nano-structures have great potential in bionic sensor applications. Atomic force microscopy (AFM) anodic oxidation have many advantages for the nanostructure fabrication, such as simple process in atmosphere at room temperature, compatibility with conventional Si process. In this work, we fabricated simple FET structures with channel width W~ 10nm (nanowire) and $1{\mu}m$ (nano-ribbon) on ~10, 20 and 100nm-thinned silicon-on-insulator (SOI) wafers in order to investigate the surface effect on the transport characteristics of nano-channel. For further quantitative analysis, we carried out the 2D numerical simulations to investigate the effect of channel surface states on the carrier distribution behavior inside the channel. The simulated 2D cross-sectional structures of fabricated devices had channel heights of H ~ 10, 20, and 100nm, widths of L ~ $1{\mu}m$ and 10nm respectively, where we simultaneously varied the channel surface charge density from $1{\times}10^{-9}$ to $1{\times}10^{-7}C/cm2$. It has been shown that the side-wall charge of nanowire channel mainly affect the I-V characteristics and this was confirmed by the 2D numerical simulations.

• 한국전기전자재료학회논문지
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• 제18권12호
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• pp.1075-1079
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• 2005

The Pseudo MOSFET measurements technique has been used for the electrical characterization of the nano SOI wafer. Silicon islands for the Pseudo MOSFET measurements were fabricated by selective etching of surface silicon film with dry or wet etching to examine the effects of the etching process on the device properties. The characteristics of the Pseudo MOSFET were not changed greatly in the case of thick SOI film which was 205 nm. However the characteristics of the device were dependent on etching process in the case of less than 100 nm thick SOI film. The sub 100 nm SOI was obtained by thinning the silicon film of standard thick SOI wafer. The thickness of SOI film was varied from 88 nm to 44 nm by chemical etching. The etching process effects on the properties of pseudo MOSFET characteristics, such as mobility, turn-on voltage, and drain current transient. The etching Process dependency is greater in the thinner SOI wafer.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2009년도 제37회 하계학술대회 초록집
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• pp.204-204
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• 2009

• 한국결정성장학회:학술대회논문집
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• 한국결정성장학회 1997년도 Proceedings of the 13th KACG Technical Meeting `97 Industrial Crystallization Symposium(ICS)-Doosan Resort, Chunchon, October 30-31, 1997
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• pp.187-187
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• 1997

Silicon nitride is the most excellent materials among structural ceramics. It has been reported that fracture toughness was improved with adding second phase particles, whisker, fiber etc. However, containing of second phase particles enhanced fracture toughness, however flexural strength was degraded. As adding nanosize SiC particles into silicon nitride, the physical properties of fluxural strength, fracture toughness, the modulus of elasticity. In this study, 2wt% $Al_2$O$_3$ and 4 wt% $Y_2$O$_3$ were added into UBE E-10 and 0, 10, 20, 30, 40, 50 vol% nano-SiC powder (Sumitomo T1 powder) were added, respectively. It is hot pressed at 185$0^{\circ}C$ for 1 hour. Most of structural ceramics for engineering application are wear resistance. In this study, wear behaviors (in water) of silicon nitride with varying the amount of nano-size silicon carbide were investigated, and was compared to physical properties. Simultaneously wear mechanism will be found out.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제43회 하계 정기 학술대회 초록집
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• pp.254-255
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• 2012

Interest in nano-crystalline silicon (nc-Si) thin films has been growing because of their favorable processing conditions for certain electronic devices. In particular, there has been an increase in the use of nc-Si thin films in photovoltaics for large solar cell panels and in thin film transistors for large flat panel displays. One of the most important material properties for these device applications is the macroscopic charge-carrier mobility. Hydrogenated amorphous silicon (a-Si:H) or nc-Si is a basic material in thin film transistors (TFTs). However, a-Si:H based devices have low carrier mobility and bias instability due to their metastable properties. The large number of trap sites and incomplete hydrogen passivation of a-Si:H film produce limited carrier transport. The basic electrical properties, including the carrier mobility and stability, of nc-Si TFTs might be superior to those of a-Si:H thin film. However, typical nc-Si thin films tend to have mobilities similar to a-Si films, although changes in the processing conditions can enhance the mobility. In polycrystalline silicon (poly-Si) thin films, the performance of the devices is strongly influenced by the boundaries between neighboring crystalline grains. These grain boundaries limit the conductance of macroscopic regions comprised of multiple grains. In much of the work on poly-Si thin films, it was shown that the performance of TFTs was largely determined by the number and location of the grain boundaries within the channel. Hence, efforts were made to reduce the total number of grain boundaries by increasing the average grain size. However, even a small number of grain boundaries can significantly reduce the macroscopic charge carrier mobility. The nano-crystalline or polymorphous-Si development for TFT and solar cells have been employed to compensate for disadvantage inherent to a-Si and micro-crystalline silicon (${\mu}$-Si). Recently, a novel process for deposition of nano-crystralline silicon (nc-Si) thin films at room temperature was developed using neutral beam assisted chemical vapor deposition (NBaCVD) with a neutral particle beam (NPB) source, which controls the energy of incident neutral particles in the range of 1~300 eV in order to enhance the atomic activation and crystalline of thin films at room temperature. In previous our experiments, we verified favorable properties of nc-Si thin films for certain electronic devices. During the formation of the nc-Si thin films by the NBaCVD with various process conditions, NPB energy directly controlled by the reflector bias and effectively increased crystal fraction (~80%) by uniformly distributed nc grains with 3~10 nm size. The more resent work on nc-Si thin film transistors (TFT) was done. We identified the performance of nc-Si TFT active channeal layers. The dependence of the performance of nc-Si TFT on the primary process parameters is explored. Raman, FT-IR and transmission electron microscope (TEM) were used to study the microstructures and the crystalline volume fraction of nc-Si films. The electric properties were investigated on Cr/SiO2/nc-Si metal-oxide-semiconductor (MOS) capacitors.

• 대한화학회지
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• 제60권5호
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• pp.299-309
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• 2016

In this study, the physicochemical and electrochemical properties of carbon nanomaterials and synthesized nano-carbon/Si composites were studied. The nano-carbon/Si composites were ball-milled to a nano size and coated with pyrolytic carbon using Chemical Vapor Deposition (CVD). They were then finely mixed with respective nano-carbon materials. The physicochemical properties of samples were analyzed using Scanning Electron Microscopy (SEM), Energy Dispersive X-ray Spectroscopy (EDS), Raman spectroscopy, X-ray Diffraction (XRD), X-ray Photoelectron Spectroscopy (XPS), and surface area analyzer. The electrochemical characteristics were investigated using the galvanostatic charge-discharge and cyclic voltammetry (CV) measurements. Three-electrode cells were fabricated using the carbon nanomaterials and nano-carbon/Si composites as anode materials and LiPF₆ and LiClO₄ as electrolytes of Li secondary batteries. Reversibility using LiClO₄ as an electrolyte was superior to that of LiPF₆ as the electrolyte. The initial discharge capacities of nano-carbon/Si composites were increased compared to the initial discharge capacities of nano-carbon materials.

• 한국기계가공학회지
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• 제12권5호
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• pp.30-35
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• 2013

In order to increase cell efficiency in crystalline silicon solar cell, reduction of light reflection is one of the essential problem. Until now silicon wafer was textured by wet etching process which has random patterns along crystal orientation. In this study, high aspect ratio patterns are manufactured by nano imprint process and reflectance could be minimized under 1%. After that, screen printed solar cell was fabricated on the textured wafer and I-V characteristics was measured by solar simulator. Consequently cell efficiency of solar cell fabricated using the wafer textured by nano imprint process increased 1.15% than reference solar cell textured by wet etching. Internal quantum efficiency was increased in the range of IR wave length but decreased in the UV wavelength. In spite of improved result, optimization between nano imprinted pattern and solar cell process should be followed.

• Transactions on Electrical and Electronic Materials
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• 제16권2호
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• pp.103-105
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• 2015

Effect of silicon doping into ZnSnO systems was investigated using solution process. Addition of silicon was used to suppress oxygen vacancy generation. The transfer characteristics of the device showed threshold voltage shift toward the positive direction with increasing Si content due to the high binding energy of silicon atoms with oxygen. As a result, the carrier concentration was decreased with increasing Si content.

• 전기화학회지
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• 제14권4호
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• pp.191-195
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• 2011

Wet chemical etching methods were utilized to conduct Si surface texturing, which could enhance photoelectrochemical hydrogen generation rate. Two different etching methods tested, which were anisotropic metal-catalyzed electroless etching and isotropic etching. The Si nano-texture that was fabricated by the anisotropic etching showed ~25% increase in photocurrent for H2 generation. The photocurrent enhancement was attributed to the reduced reflection loss at the nano-textured Si surface, which provided a layer of intermediate density between water and the Si substrate.