• Title/Summary/Keyword: Nand Flash Memory

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An Efficient Dual Queue Strategy for Improving Storage System Response Times (저장시스템의 응답 시간 개선을 위한 효율적인 이중 큐 전략)

  • Hyun-Seob Lee
    • Journal of Internet of Things and Convergence
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    • v.10 no.3
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    • pp.19-24
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    • 2024
  • Recent advances in large-scale data processing technologies such as big data, cloud computing, and artificial intelligence have increased the demand for high-performance storage devices in data centers and enterprise environments. In particular, the fast data response speed of storage devices is a key factor that determines the overall system performance. Solid state drives (SSDs) based on the Non-Volatile Memory Express (NVMe) interface are gaining traction, but new bottlenecks are emerging in the process of handling large data input and output requests from multiple hosts simultaneously. SSDs typically process host requests by sequentially stacking them in an internal queue. When long transfer length requests are processed first, shorter requests wait longer, increasing the average response time. To solve this problem, data transfer timeout and data partitioning methods have been proposed, but they do not provide a fundamental solution. In this paper, we propose a dual queue based scheduling scheme (DQBS), which manages the data transfer order based on the request order in one queue and the transfer length in the other queue. Then, the request time and transmission length are comprehensively considered to determine the efficient data transmission order. This enables the balanced processing of long and short requests, thus reducing the overall average response time. The simulation results show that the proposed method outperforms the existing sequential processing method. This study presents a scheduling technique that maximizes data transfer efficiency in a high-performance SSD environment, which is expected to contribute to the development of next-generation high-performance storage systems

Influence of the hydrogen post-annealing on the electrical properties of metal/alumina/silicon-nitride/silicon-oxide/silicon capacitors for flash memories

  • Kim, Hee-Dong;An, Ho-Myoung;Seo, Yu-Jeong;Zhang, Yong-Jie;Kim, Tae-Geun
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.11a
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    • pp.122-122
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    • 2008
  • Recently, Metal/Alumina/Silicon-Nitride/Silicon-Oxide/Silicon (MANOS) structures are one of the most attractive candidates to realize vertical scaling of high-density NAND flash memory [1]. However, as ANO layers are miniaturized, negative and positive bias temperature instability (NBTI/PBTI), such as the flat band voltage shift, ${\Delta}V_{FB}$, the interfacial trap density increase, ${\Delta}D_{it}$, the gate leakage current, ${\Delta}I_G$. and the retention characteristics, in MONOS capacitors, becomes an important issue in terms of reliability. It is well known that tunnel oxide degradation is a result of the oxide and interfacial traps generation during FN (Fowler-Nordheim) stress [2]. Because the bias temperature stress causes an increase of both interfacial-traps and fixed oxide charge could be a factor, witch can degrade device reliability during the program and erase operation. However, few studies on NBTI/PBTI have been conducted on improving the reliability of MONOS devices. In this work, we investigate the effect of post-annealing gas on bias temperature instability (BTI), such as the flat band voltage shift, ${\Delta}V_{FB}$, the interfacial trap density shift, ${\Delta}I_G$ retention characteristics, and the gate leakage current characteristics of MANOS capacitors. MANOS samples annealed at $950^{\circ}C$ for 30 s by a rapid thermal process were treated via additional annealing in a furnace, using annealing gases $N_2$ and $N_2-H_2$ (2 % hydrogen and 98 % nitrogen mixture gases) at $450^{\circ}C$ for 30 min. MANOS samples annealed in $N_2-H_2$ ambient had the lowest flat band voltage shift, ${\Delta}V_{FB}$ = 1.09/0.63 V at the program/erase state, and the good retention characteristics, 123/84 mV/decade at the program/erase state more than the sample annealed at $N_2$ ambient.

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An Empirical Study on Linux I/O stack for the Lifetime of SSD Perspective (SSD 수명 관점에서 리눅스 I/O 스택에 대한 실험적 분석)

  • Jeong, Nam Ki;Han, Tae Hee
    • Journal of the Institute of Electronics and Information Engineers
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    • v.52 no.9
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    • pp.54-62
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    • 2015
  • Although NAND flash-based SSD (Solid-State Drive) provides superior performance in comparison to HDD (Hard Disk Drive), it has a major drawback in write endurance. As a result, the lifetime of SSD is determined by the workload and thus it becomes a big challenge in current technology trend of such as the shifting from SLC (Single Level Cell) to MLC (Multi Level cell) and even TLC (Triple Level Cell). Most previous studies have dealt with wear-leveling or improving SSD lifetime regarding hardware architecture. In this paper, we propose the optimal configuration of host I/O stack focusing on file system, I/O scheduler, and link power management using JEDEC enterprise workloads in terms of WAF (Write Amplification Factor) which represents the efficiency perspective of SSD life time especially for host write processing into flash memory. Experimental analysis shows that the optimum configuration of I/O stack for the perspective of SSD lifetime is MinPower-Dead-XFS which prolongs the lifetime of SSD approximately 2.6 times in comparison with MaxPower-Cfq-Ext4, the best performance combination. Though the performance was reduced by 13%, this contributions demonstrates a considerable aspect of SSD lifetime in relation to I/O stack optimization.

Effect of Amine Functional Group on Removal Rate Selectivity between Copper and Tantalum-nitride Film in Chemical Mechanical Polishing

  • Cui, Hao;Hwang, Hee-Sub;Park, Jin-Hyung;Paik, Ungyu;Park, Jea-Gun
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.06a
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    • pp.546-546
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    • 2008
  • Copper (Cu) Chemical mechanical polishing (CMP) has been an essential process for Cu wifing of DRAM and NAND flash memory beyond 45nm. Copper has been employed as ideal material for interconnect and metal line due to the low resistivity and high resistant to electro-migration. Damascene process is currently used in conjunction with CMP in the fabrication of multi-level copper interconnects for advanced logic and memory devices. Cu CMP involves removal of material by the combination of chemical and mechanical action. Chemicals in slurry aid in material removal by modifying the surface film while abrasion between the particles, pad, and the modified film facilitates mechanical removal. In our research, we emphasized on the role of chemical effect of slurry on Cu CMP, especially on the effect of amine functional group on removal rate selectivity between Cu and Tantalum-nitride (TaN) film. We investigated the two different kinds of complexing agent both with amine functional group. On the one hand, Polyacrylamide as a polymer affected the stability of abrasive, viscosity of slurry and the corrosion current of copper film especially at high concentration. At higher concentration, the aggregation of abrasive particles was suppressed by the steric effect of PAM, thus showed higher fraction of small particle distribution. It also showed a fluctuation behavior of the viscosity of slurry at high shear rate due to transformation of polymer chain. Also, because of forming thick passivation layer on the surface of Cu film, the diffusion of oxidant to the Cu surface was inhibited; therefore, the corrosion current with 0.7wt% PAM was smaller than that without PAM. the polishing rate of Cu film slightly increased up to 0.3wt%, then decreased with increasing of PAM concentration. On the contrary, the polishing rate of TaN film was strongly suppressed and saturated with increasing of PAM concentration at 0.3wt%. We also studied the electrostatic interaction between abrasive particle and Cu/TaN film with different PAM concentration. On the other hand, amino-methyl-propanol (AMP) as a single molecule does not affect the stability, rheological and corrosion behavior of the slurry as the polymer PAM. The polishing behavior of TaN film and selectivity with AMP appeared the similar trend to the slurry with PAM. The polishing behavior of Cu film with AMP, however, was quite different with that of PAM. We assume this difference was originated from different compactness of surface passivation layer on the Cu film under the same concentration due to the different molecular weight of PAM and AMP.

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A Design and Implementation for a Reliable Data Storage in a Digital Tachograph (디지털 자동차운행기록계에서 안정적인 데이터 저장을 위한 설계 및 구현)

  • Baek, Sung Hoon;Son, Myunghee
    • KIPS Transactions on Computer and Communication Systems
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    • v.1 no.2
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    • pp.71-78
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    • 2012
  • The digital tachograph is a device that automatically records speed and distance of a vehicle, together with the driver's activity and vehicle status at an accident. It records vehicle speed, break status, acceleration, engine RPM, longitude and latitude of GPS, accumulated distance, and so on. European Commission regulation made digital tachographs mandatory for all trucks from 2005. Republic of Korea made digital tachographs mandatory for all new business vehicles from 2011 and is widening the range of vehicles that must install digital tachographs year by year. This device is used to analyze driver's daily driving information and car accidents. Under a car accident that makes the device reliability unpredictable, it is very important to store driving information with maximum reliability for its original mission. We designed and implemented a practical digital tachograph. This paper presents a storage scheme that consists of a first storage device with small capacity at a high reliability and a second storage device with large capacity at a low cost in order to reliably records data with a hardware at a low cost. The first storage device records data in a SLC NAND flash memory in a log-structured style. We present a reverse partial scan that overcomes the slow scan time of log-structured storages at the boot stage. The scheme reduced the scan time of the first storage device by 1/50. In addition, our design includes a scheme that fast stores data at a moment of accident by 1/20 of data transfer time of a normal method.