• The Transactions of the Korean Institute of Power Electronics
• /
• v.13 no.1
• /
• pp.9-14
• /
• 2008

Since they use the low switching frequency in multilevel inverter systems, they generate the high low frequency harmonic components. Generally, LC filter is used at the output terminal of inverter systems to solve this problem. But it causes a voltage drop at the output terminal by use of damping resistors, and causes the problem in which system efficiency decreases due to power loss of the damping resistor. In this paper, we proposed an output filter design method for NPC three-level inverter systems with low switching frequency. And we analyzed the efficiency of the proposed filter system, and the effectiveness of the proposed system is verified by simulation and experimental results.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.14 no.4
• /
• pp.333-342
• /
• 2009

Three-level Diode Clamped Multilevel Inverter, generally known as Neutral-Point-Clamped (NPC) Inverter, has an inherent problem causing Neutral Point (NP) potential variation. Until now, in many literatures NP potential problem has been investigated and lots of solutions have also been proposed. However, under fault and fault tolerant control, distinctive feature for NP potential variation problem was rarely published from the standpoint of reliability. In this paper, NP potential is analytically investigated both normal and faulty conditions under carrier based PWM. Subsequently, relation between fault detection time and size of capacitor is analyzed. This information is explored by simulation and experiment results, which contribute to enhance the reliability of inverter system.

• Journal of Electrical Engineering and Technology
• /
• v.9 no.6
• /
• pp.2168-2180
• /
• 2014

In this paper, a generalized power loss algorithm for multilevel neutral-point clamped (NPC) PWM inverters is presented, which is applicable to any level number of multilevel inverters. In the case of three-level inverters, the conduction loss depends on the MI (modulation index) and the PF (power factor), and the switching loss depends on a switching frequency, turn-on and turn-off energy. However, in the higher level of inverters than the three-level, the loss of semiconductor devices cannot be analyzed by conventional methods. The modulation depth should be considered in addition, to find the different conducting devices depending on the MI. In a case study, the power loss analysis for the three- and five-level NPC inverters has been performed with the proposed algorithm. The validity of the proposed algorithm is verified by simulation for the three-and five-level NPC inverters and experiment for three-level NPC inverter.

• Journal of the Korean Society for Railway
• /
• v.15 no.2
• /
• pp.129-134
• /
• 2012

In this paper, speed control of IPMSM drives for the next generation domestic high speed railway system using NPC 3-level inverters is presented. The NPC multilevel inverter is suitable for the high-voltage and high-power motor drive system because it has advantages in that the voltage rating of the power semiconductor devices and output current harmonics are reduced. For the speed control of IPMSM using NPC 3-level inverters, maximum torque control is applied in the constant torque region, and filed weakening control is applied in the constant power region. Simulation programs based on MATLAB/Simulink are developed. Finally the designed system is verified and their characteristics are analyzed by the simulation results.

• Proceedings of the KIPE Conference
• /
• 2008.06a
• /
• pp.385-387
• /
• 2008

Three-level Diode Clamped Multilevel Inverter, generally known as Neutral-Point-Clamped(NPC) inverter, has an inherent problem causing Neutral Point(NP) potential variation. Until now, in many literatures NP potential problem has been investigated and lots of solutions have also been proposed. However, in the case of NP potential variation was rarely published from the standpoint of reliability. In this paper, NP potential is analytically investigated both normal and fault conditions under carrier based PWM. Subsequently, relation between fault detection time and size of capacitor is analyzed. This information is explored by simulation results, which contribute to enhance the reliability of the NPC inverter system.

• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.57 no.7
• /
• pp.1200-1207
• /
• 2008

In this paper, a novel fault detection method is proposed when the neutral-point-clamped inverter has a open-circuit fault in the switching device. This proposed method is configured with simple circuit and is achieved by a simple algorithm using the inherent characteristic of the continuous Pulse Width Modulation. Also, this method has the fast fault detection ability and is much simpler to embody, in comparison with conventional fault detection methods. This ability to detect fault minimizes harmful effect which are such as DC-link voltage unbalance and overstress to other switching devices. Therefore, this proposed fault detection method can improve reliability of NPC inverter system. Experimental results are presented to verify the validity of proposed fault detection method.

• Journal of Electrical Engineering and Technology
• /
• v.8 no.3
• /
• pp.544-558
• /
• 2013

This paper proposes a simplified and efficient control scheme for Unified Power Quality Conditioner (UPQC) based on three-level (NPC) inverter capable to mitigate source current harmonics and compensate all voltage disturbances perturbations such us, voltage sags, swells, unbalances and harmonics. The UPQC is designed by the integration of series and shunt active filters (AFs) sharing a common dc bus capacitor. The dc voltage is maintained constant using proportional integral voltage controller. The shunt and series AF are designed using a three-phase three-level (NPC) inverter. The synchronous reference frame (SRF) theory is used to get the reference signals for shunt and the power reactive theory (PQ) for a series APFs. The reference signals for the shunt and series APF are derived from the control algorithm and sensed signals are injected in tow controllers to generate switching signals for series and shunt APFs. The performance of proposed UPQC system is evaluated in terms of power factor correction and mitigation of voltage, current harmonics and all voltage disturbances compensation in three-phase, three-wire power system using MATLAB-Simulink software and SimPowerSystem Toolbox. The simulation results demonstrate that the proposed UPQC system can improve the power quality at the common connection point of the non-linear load.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.10 no.1
• /
• pp.61-69
• /
• 2005

The topology of NPC inverter coupled with the large number of devices used increases the probability of device failure. It's necessary to develop an optimal remedial strategy which can be used to continue the application when fault occurs. The fault tolerance is obtained by the use of the proposed method. The proposed method utilizes that the one phase load with the failed power device could be connected to the center-tap of the DC-link capacitor in order to dc-link voltage with balance and the sinusoidal phase current with constant amplitude under the single power device fault condition. The strategy described in this paper is expected to provide an economic alternative to more expensive redundancy techniques.

• Proceedings of the KIEE Conference
• /
• 1998.07f
• /
• pp.1963-1965
• /
• 1998

In this paper, a new simplified configuration for a multi-level PWM inverter is proposed. The proposed inverter consists of an auxiliary circuit with one switching device, and 3 phase full-bridge inverter. The proposed inverter, in spite of reduction of the switching devices, offers characteristics similar to the NPC(Neutral - point - clamped)- PWM inverter. Also, since the reduction of the switching devices, the control strategy is simplified. And switching loss is reduced. In addition to, it is possible that reliable DC level voltage than former multi-level inverter. And load power application is same to conventional NPC-PWM inverter. The performance of the system is verified by simulation. In this paper, show the simulation result of the single phase full bridge inverter application.

• Journal of Power Electronics
• /
• v.19 no.3
• /
• pp.702-713
• /
• 2019

Multilevel Inverters (MLIs) are widely used in medium voltage applications due to their various advantages. In addition, there are numerous types of MLIs for such applications. However, the diode-less 3-level (3L) T-type Neutral Point Clamped (NPC) MLI is the most advantageous due to its low conduction losses and high potential efficiency. The power circuit of a 3L T-type NPC is derived by the conventional two level inverter by a slight modification. In order to explore the MLI performance for various Pulse Width Modulation (PWM) schemes, this paper examines the operation of a 3L (five level line to line) T-type NPC MLI for various types of Multi-Carriers Pulse Width Modulation (MCPWM) schemes. These PWM schemes are compared in terms of their voltage profile, total harmonic distortion (THD) and conduction losses. In addition, a 3L T-type NPC MLI is also compared with the conventional NPC in terms of number of switches, clamping diodes, main diodes and capacitors. Moreover, the capacitor-balancing problem is also investigated using the Neutral Point Fluctuation (NPF) method with all of the MCPWM schemes. A 1kW 3L T-type NPC MLI is simulated in MATLAB/Simulink and implemented experimentally and its performance is tested with a 1HP induction motor. The results indicate that the 3L T-type NPC MLI has better performance than conventional NPC MLIs.