• Applied Science and Convergence Technology
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• v.23 no.5
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• pp.248-253
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• 2014

Air Gap Membrane Distillation (AGMD) is one of several technologies that can be used to solve problems fresh water availability. AGMD exhibits several advantages, including low conductive heat loss and higher thermal efficiency, due to the presence of an air gap between the membrane and condensation wall. A previous study by Bhardwaj found that the condensation surface properties (materials and contact angle) affected the total collected fresh water in the solar distillation process. However, the process condition differences between solar distillation and AGMD might result in different condensation phenomena. In contrast, N. Miljkovic showed that a hydrophobic surface has higher condensation heat transfer. Moreover, to the best of our knowledge, there is no study that investigates the effect of condensation surface properties in AGMD to overall process performance (i.e. flux and thermal efficiency). Thus, in this study, we treated the AGMD condensation surface to make it hydrophobic or hydrophilic. The condensation surface could be made hydrophilic by immersing and boiling plate in deionized (DI) water, which caused the formation of hydrophilic aluminum hydroxide (AlOOH) nanostructures. Afterwards, the treated plate was coated using hexamethyldisiloxane (HMDSO) through plasma-enhanced chemical vapor deposition (PECVD). The result indicated that condensation surface properties do not affect the permeate flux or thermal efficiency significantly. In general, the permeate flux and thermal efficiency for the treated plates were lower than those of the non-treated plate (pristine). However, at a 1 mm and 3 mm air gap, the treated plate outperformed the non-treated plate (pristine) in terms of permeate flux. Therefore, although surface wettability effect was not significant, it still provided a little influence.

• Journal of the Korean Ceramic Society
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• v.49 no.6
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• pp.631-636
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• 2012

Conventional SONOS (poly-silicon/oxide/nitride/oxide/silicon) type memory is associated with a retention issue due to the continuous demand for scaled-down devices. In this study, $Al_2O_3/Y_2O_3/SiO_2$ (AYO) multilayer structures using a high-k $Y_2O_3$ film as a charge-trapping layer were fabricated for nonvolatile memory applications. This work focused on improving the retention properties using a $Y_2O_3$ layer with different tunnel oxide thickness ranging from 3 nm to 5 nm created by metal organic chemical vapor deposition (MOCVD). The electrical properties and reliabilities of each specimen were evaluated. The results showed that the $Y_2O_3$ with 4 nm $SiO_2$ tunnel oxide layer had the largest memory window of 1.29 V. In addition, all specimens exhibited stable endurance characteristics (program/erasecycles up to $10^4$) due to the superior charge-trapping characteristics of $Y_2O_3$. We expect that these high-k $Y_2O_3$ films can be candidates to replace $Si_3N_4$ films as the charge-trapping layer in SONOS-type flash memory devices.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.06a
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• pp.19-19
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• 2007

Excimer laser annealing (ELA) 방법을 이용하여 결정화하고 게이트 절연체로써 high-k 물질을 가지는 다결정 실리콘박막 트랜지스터의 전기적 특성을 평가하였다. 다결정 실리콘 박막 트랜지스터는 비결정질 실리콘 박막 트랜지스터 보다 높은 전계 효과 이동도와 운전 용이한 장점을 가진다. 기존의 결정화 방법으로는 다결정 실리콘 박막 트랜지스터의 높은 열 공급을 피할 수 없기 때문에, 매몰 산화막 위의 비결정질 박막은 저온에서 다결정 실리콘 결정화를 위해 KrF excimer laser (248nm)를 이용하여 가열 냉각 공정을 했다. 게다가 케이트 절연체로써 atomic layer deposition (ALD) 방법에 의해 저온에서 20 nm의 고 유전율을 가지는 $HfO_2$ 박막을 증착하였다. 알루미늄은 n-MOS 박막 트랜지스터의 게이트 전극으로 사용되었다. 금속 케이트 전극을 사용하여 게이트 공핍 효과와 관계되는 케이트 절연막 두께의 증가를 예방할 수 있고, 게이트 저항의 감소에 의해 소자 속도를 증가 시킬 수 있다. 추가적으로, 비결정질 실리콘 박막의 결정화 기술로써 사용된 ELA 방법은 SPC (solid phase crystallization) 방법과 SLS (sequential lateral solidification) 방법에 의해 비교되었다. 결과적으로, ELA 방법에 의해 결정화된 다결정 실리콘 박막의 결정도와 표면 거칠기는 SPC와 SLS 방법에 비해 개선되었다. 또한, 우리는 ELA 결정화 방법에 의한 다결정 실리콘 박막 트랜지스터로부터 우수한 소자 특성을 얻었다.

• Proceedings of the Korean Vacuum Society Conference
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• 2000.02a
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• pp.60-60
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• 2000

The adhesion interface formation between copper and poly(ethylene terephthalate)(PET), poly(methyl methacrylate)(PMMA) and Polyimide films was treated using Ion assisted reaction system to sequential sputter deposition by High-Frequency ion source. The ion beam modification system used a new type of low power HF ion thruster for space application as new low thruster electric propulsion system. Low power HF ion thruster with diameter 100mm gives the opportunity to obtain beams of Ar+ with currents 20~150 mA (current density 0.5~3.5 mA/cm2) and energy 200~2500eV at HF power level 10~150 W. Using Ar as a working gas it is possible to obtain thrust within 3~8 mN. Contact angles for untreated films were over 95$^{\circ}$ and 80 for Pet, 10o for PMMA and 12o for PI samples as a condition of ion assisted reaction at the ion dose of 10$\times$1016 ions/cm2, the ion beam potential of 1.2 keV and 4 ml/min for environmental gas flow rate. 900o peel tests yielded values of 15 to 35 for PET, 18 to 40 and 12 to 36 g/min. respectively. High resolution X-ray photoelectron spectrocopy is the Cls region for Cu metal on these polymer substrates showed increases in C=O-O groups for polymide, whereas PET and PMMA treated samples showed only C=O groups with increase the ion dose. Finally, unstable polymer surface can be changed from hydrophobic to hydrophilic formation such as C-O and C=O that were confirmed by the XPS analysis, conclusionally, the ion assisted reaction is very effective tools to attach reactive ion species to form functional groups on C-C bond chains of PET, PMMA and PI.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.206-206
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• 2010

정보화 기술이 급속히 발전함에 따라서 보다 많은 양의 data를 전송, 처리, 저장 하게 되면서 이를 처리 할 수 있는 대용량, 고속, 비휘발성의 차세대 메모리의 개발이 요구 되고 있다. 이 중 저항 변화 메모리(ReRAM)는 일반적으로 전이금속산화물을 이용한 MIM 구조로서 적당한 전기 신호를 가하면 저항이 높아서 전도되지 않는 상태(Off state)에서 저항이 낮아져 전도가 가능한 상태(On state)로 바뀌는 메모리 특성을 가진다. ReRAM은 비휘발성 메모리이며 종래의 비휘발성 기억소자인 Flash memory 보다 access time이 $10^5$배 이상 빠르며, 2~5V 이하의 낮은 전압에서 동작이 가능하다. 또한 구조가 간단하여 공정상의 결함을 현저히 줄일 수 있다는 점 등 많은 장점들이 있어서 Flash memory를 대체할 수 있는 유력한 후보로 여겨지고 있다. 저항 변화의 특징을 잘 나타내는 물질에는 $TiO_2$, $Al_2O_3$, $NiO_2$, $HfO_2$, $ZrO_2$등의 많은 전이금속산화물들이 있다. 본 연구에서는 Reactive DC-magnetron Sputtering 방법과 DC-magnetron sputter를 이용하여 Ti를 증착한 후 Oxidation 방법으로 각각 증착한 $TiO_2$박막을 사용하여 저항변화특성을 관찰하였다. $TiO_2$상부에 Atomic Layer Deposition (ALD)를 이용하여 $HfO_2$ 박막을 증착하여 표면처리를 하고, 또한 $TiO_2$에 다른 전이 금속박막 층을 추가 증착하여 저항변화 특성에 접합한 조건을 찾는 연구를 진행하였다. 하부 전극과 상부 전극 물질로는 Si 100 wafer 위에 Pt 또는 TiN을 사용하였다. 저항변화 특성을 평가하기 위해 Agilent E5270B를 이용하여 current-voltage (I-V)를 측정하였다. X-ray Diffraction (XRD)를 이용하여 증착 된 전기금속 박막 물질의 결정성을 관찰했으며, Atomic Force Microscopy (AFM)을 이용하여 증착 된 샘플의 표면을 관찰했다. SEM과 TEM을 통해서는 sample의 미세구조를 확인 하였다.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.180-180
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• 2010

Thin film transistors (TFTs) based on oxide semiconductors have emerged as a promising technology, particularly for active-matrix TFT-based backplanes. Currently, an amorphous oxide semiconductor, such as InGaZnO, has been adopted as the channel layer due to its higher electron mobility. However, accurate and repeatable control of this complex material in mass production is not easy. Therefore, simpler polycrystalline materials, such as ZnO and $SnO_2$, remain possible candidates as the channel layer. Inparticular, ZnO-based TFTs have attracted considerable attention, because of their superior properties that include wide bandgap (3.37eV), transparency, and high field effect mobility when compared with conventional amorphous silicon and polycrystalline silicon TFTs. There are some technical challenges to overcome to achieve manufacturability of ZnO-based TFTs. One of the problems, the stability of ZnO-based TFTs, is as yet unsolved since ZnO-based TFTs usually contain defects in the ZnO channel layer and deep level defects in the channel/dielectric interface that cause problems in device operation. The quality of the interface between the channel and dielectric plays a crucial role in transistor performance, and several insulators have been reported that reduce the number of defects in the channel and the interfacial charge trap defects. Additionally, ZnO TFTs using a high quality interface fabricated by a two step atomic layer deposition (ALD) process showed improvement in device performance In this study, we report the fabrication of high performance ZnO TFTs with a $Si_3N_4$ gate insulator treated using plasma. The interface treatment using electron cyclotron resonance (ECR) $O_2$ plasma improves the interface quality by lowering the interface trap density. This process can be easily adapted for industrial applications because the device structure and fabrication process in this paper are compatible with those of a-Si TFTs.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.382-382
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• 2010

$TaO_2$ thin films as gate dielectrics have been proposed to overcome the problems of tunneling current and degradation mobility in achieving a thin equivalent oxide thickness. An extremely thin $SiO_2$ layer is used in order to separate the carrier in MOSFETchannel from the dielectric field fluctuation caused by phonons in the dielectric which decreases the carrier mobility. The electronic and optical properties influenced the device performance to a great extent. The atomic structure of amorphous and crystalline Tantalum oxide ($TaO_2$) gate dielectrics thin film on Si (100) were grown by utilizing atomic layer deposition method was examined using Ta-K edge x-ray absorption spectroscopy. By using X-ray photoelectron spectroscopy and reflection electron energy loss spectroscopy (REELS) the electronic and optical properties was obtained. In this study, the band gap (3.400.1 eV) and the optical properties of $TaO_2$ thin films were obtained from the experimental inelastic scattering cross section of reflection electron energy loss spectroscopy (REELS) spectra. EXAFS spectra show that the ordered bonding of Ta-Ta for c-$TaO_2$ which is not for c-$TaO_2$ thin film. The optical properties' e.g., index refractive (n), extinction coefficient (k) and dielectric function ($\varepsilon$) were obtained from REELS spectra by using QUEELS-$\varepsilon$(k, $\omega$)-REELS software shows good agreement with other results. The energy-dependent behaviors of reflection, absorption or transparency in $TaO_2$ thin films also have been determined from the optical properties.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.381-381
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• 2010

$(ZrO_2)_{0.66}(HfO_2)_{0.34}$ thin films as gate dielectrics have been proposed to overcome the problems of tunneling current and degradation mobility inachieving a thin equivalent oxide thickness. An extremely thin $SiO_2$ layer is used in order to separate the carrier in MOSFET channel from the dielectric field fluctuation caused by phonons in the dielectric which decreases the carrier mobility. The electronic and optical properties influenced the device performance to a great extent. $(ZrO_2)_{0.66}(HfO_2)_{0.34}$ dielectric films on p-Si (100) were grown by atomic layer deposition method, for which the conduction band offsets, valence band offsets and band gapswere obtained by using X-ray photoelectron spectroscopy and reflection electron energy loss spectroscopy. The band gap, valence and conduction band offset values for $(ZrO_2)_{0.66}(HfO_2)_{0.34}$ dielectric thin film, grown on Si substrate were about 5.34, 2.35 and 1.87 eV respectively. This band alignment was similar to that of $ZrO_2$. In addition, The dielectric function (k, $\omega$), index of refraction n and the extinction coefficient k for the $(ZrO_2)_{0.66}(HfO_2)_{0.34}$ thin films were obtained from a quantitative analysis of REELS data by comparison to detailed dielectric response model calculations using the QUEELS-$\varepsilon$(k, $\omega$)-REELS software package. These optical properties are similar with $ZrO_2$ dielectric thin films.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.117-117
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• 2010

나노입자 제조 기술이 점차 발전하면서 금속산화물, 반도체용 및 태양전지용, 신소재 등 다양한 응용분야에 사용하고 있다. 따라서 이와 같은 나노입자 제조방법으로는 펄스 레이저 용사법(pulsed laser ablation), 플라즈마 아크 합성법(plasma arc synthesis), 열분해법(pyrolysis), plasma-enhanced chemical vapor deposition (PECVD)법 등과 같은 기상공정이 많이 사용되고 있다. 기상공정은 기존의 공정에 비해 고순도 입자의 대량 생산, 다성분 입자의 화학적 균질성 유지, 비교적 간단하고 깨끗한 공정 등의 장점을 가지고 있다. 기상공정에서 일반적인 입자 형성 메커니즘은 기체 상태의 화학 물질이 물리적 공정 혹은 화학 반응에 의해 과포화상태에 도달하게 되며, 이 때 동질 핵생성(homogeneous nucleation)이 일어나고 생성된 핵(nuclei)에 기체가 응축되고 충돌, 응집하면서 입자는 성장하게 된다. 열분해법은 실리콘 나노입자를 생산하는 기상공정 중 하나이다. 일반적으로 열분해 공정은 지속적으로 열이 가해지는 반응기 내에 반응기체인 $SiH_4$을 주입하고, 운반기체는 He, $H_2$, Ar, $N_2$ 등을 사용하였을 때, 높은 열로 인해 $SiH_4$가 분해되며, 이 때 가스-입자 전환 현상(gas to particle conversion)이 일어나 실리콘 입자가 형성된다. 그러나 입자 형성과정은 $SiH_4$ 농도, 유량, 작동 압력, 온도 등 매우 다양한 요소에 영향을 받는다. 고, 복잡한 화학반응 메커니즘에 의해 명확히 규명되지는 못하고 있다. 이에 본 연구에서는 복잡한 화학반응을 해석하는 상용코드 CHEMKIN 4.1.1을 이용하여 열분해 반응기 내에서의 실리콘 입자 형성, 성장, 응집, 전송 모델을 만들고 이를 수치해석하였다. 표면 반응, 응집, 전송에 의한 입자 성장 메커니즘을 포함하고 있는 aerosol dynamics model을 method of moment법으로 해를 구하였으며, 이를 실험 결과와 비교하여 모델링을 검증하였다. 또한 반응기의 온도, 압력, 가스 농도, 유량 등의 요소를 고려하여 실리콘 나노입자를 형성하는 최적의 조건을 연구하였다.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.37-37
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• 2010

Silicate-silsesquioxane or siloxane-silsesquioxane hybrid thin films are strong candidates as matrix materials for ultra low dielectric constant (low-k) thin films. We synthesized the silicate-silsesquioxane hybrid resins from tetraethoxyorthosilicate (TEOS) and methyltrimethoxysilane (MTMS) through hydrolysis and condensation polymerization by changing their molar ratios ([TEOS]:[MTMS] = 7:3, 5:5, and 3:7), spin-coating on Si(100) wafers. In the case of [TEOS]:[MTMS] 7:3, the dielectric permittivity value of the resultant thin film was measured at 4.30, exceeding that of the thermal oxide (3.9). This high value was thought to be due to Si-OH groups inside the film and more extensive studies were performed in terms of electronic, ionic, and orientational polarizations using Debye equation. The relationship between the mechanical properties and the synthetic conditions of the silicate-silsesquioxane precursors was also investigated. The synthetic conditions of the low-k films have to be chosen to meet both the low orientational polarization and high mechanical properties requirements. In addition, we have investigated a new solution-based approach to the synthesis of semiconducting chalcogenide films for use in thin-film transistor (TFT) devices, in an attempt to develop a simple and robust solution process for the synthesis of inorganic semiconductors. Our material design strategy is to use a sol-gel reaction to carry out the deposition of a spin-coated CdS film, which can then be converted to a xerogel material. These devices were found to exhibit n-channel TFT characteristics with an excellent field-effect mobility (a saturation mobility of ${\sim}\;48\;cm^2V^{-1}s^{-1}$) and low voltage operation (< 5 V). These results show that these semiconducting thin film materials can be used in low-cost and high-performance printable electronics.