• Journal of Digital Contents Society
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• v.19 no.6
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• pp.1219-1224
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• 2018

Nowaday, smart mobile devices on Internet of Things are required to process and deliver greate amount of data in real-time. Therefore, heterogeneous mult-core architecture such the big.LITTLE core architecture, which shows high energy conservation while guaranteeing high performance, are widely employed on up to date smart mobile devices. The LITTLE cores should be highly utilized to gain higher energy conservation because LITTLE cores have much higher energy efficiency than big cores. In this paper, we propose a core selection algorithm, which tries to firstly assign a real-time task on a LITTLE core rather a big core while the task can be finished within its own deadline. We also perform simulation as performance evaluation to show that our proposed algorithm shows higher energy conservation while guaranteeing the required performance.

• The Journal of the Korea Contents Association
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• v.5 no.6
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• pp.10-19
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• 2005

It may not be strange to anticipate that the forth-coming epoch of electronic government would bring us lots of convenience on account of ubiquitous environment with mobile devices. Such environment enables us to access the up-to-date information anytime and also a worker to carry out administration services to perform one's line of duty at anytime with electronic, handy devices such as PDA. What we now recognize from the field of electronic traffic administration services is that the office work flow as well as the public services has been remarkably improved by using of not only text but video and image information under the distributed, mobile environment. One of key requirements of this kinds of services is the feature of exchanging various information among multiple information publishers and subscribers. We call this feature Messaging Services generally The study in this paper focuses on the architecture design of the Messaging Engine software, complying with the pattern-oriented software architecture design methodology. And our contribution also goes to the discovery of three architecture patterns found in the design process and the efficient multi-threading architecture compared to one of the Messaging Engine solutions.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.5
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• pp.979-985
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• 2016

In this paper, a distributed instant message system with multiple servers architecture which can distribute system load effectively using an extended media control channel has been presented. A media control channel provides establishing a reliable control channel and also keeping a reliable control channel between SIP server and client in the field of real-time media transport area. In this study, a new instant message system architecture which can distribute massive instant message including multimedia data to multiple servers has been presented. The presented instant message system architecture can distribute system load by extending media control channel. For this purpose, media control channel messages, which distribute system load to multiple servers dynamically according to increasing number of users, have been designed in our presented system. And, in our research, an exchanging procedures of media control channel messages between servers have also been presented. The performance of the proposed system has been analysed by simulation.

• Journal of the Korea Computer Industry Society
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• v.5 no.3
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• pp.345-354
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• 2004

In these days, such services are popularized as E-commerce, E-government, multimedia services, and home networking applications. Most web traffics generated contemporarily basically use the Hyper Text Transfer Protocol(HTTP). Unfortunately, the HTTP is improper for these applications that comprise significant components of the web traffics. In this paper, we introduce a real-time contents compression architecture that maximizes the web service performance as well as reduces the response time. This architecture is built into the linux kernel-based web accelerating module. It guarantees not only the freshness of compressed contents but also the minimum time delay using an server-state adaptive algorithm, which can determine whether the server sends the compressed message considering the consumption of server resources when heavy requests reach the web server Also, We minimize the CPU overhead of the web server by exclusively implementing the compression kernel-thread. The testing results validates that this architecture saves the bandwidth of the web server and that elapsed time improvement is dramatic.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.10 s.352
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• pp.45-53
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• 2006

In this paper, we proposed a parallel hardware architecture for deblocking filter in K264/AVC. The deblocking filter has high efficiency in H.264/AVC, but it also has high computational complexity. For real time video processing, we chose a two 1-D parallel filter architecture, and tried to reduce memory access using dual-port SRAM. The proposed architecture has been described in Verilog-HDL and synthesized on Hynix 0.25um CMOS Cell Library using Synopsys Design Compiler. The hardware size was about 27.3K logic gates (without On-chip Memory) and the maximum operating frequency was 100Mhz. It consumes 258 clocks to process one macroblock, witch means it can process 47.8 HD1080P(1920pixel* 1080pixel) frames per second. It seems that it can be used for real time H.264/AVC encoding and decoding of various multimedia applications.

• The KIPS Transactions:PartC
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• v.11C no.6 s.95
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• pp.781-786
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• 2004

In these days, such services are popularized as E-commerce, E- government, multimedia services, and home networking applications. Most web traffics generated contemporarily basically use the Hyper Text Transfer Protocol(HTTP). Unfortunately, the HTTP is improper for these applications that comprise significant components of the web traffics. In this paper, we introduce a real-time contents compression architecture that maximizes the web service performance as well as reduces the response time. This architecture is built into the linux kernel-based web accelerating module. It guarantees not only the freshness of compressed contents but also the minimum time delay using an server-state adaptive algorithm, which can determine whether the server sends the compressed message considering the consumption of sewer resources when heavy requests reach the web server. Also, We minimize the CPU overhead of the web server by exclusively implementing the compression kernel-thread. The testing results validates that this architecture saves the bandwidth of the web server and that elapsed time improvement is dramatic.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.5C
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• pp.371-381
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• 2005

In this paper, we propose an advanced hardware architecture for the CAVLC entropy encoder/decoder engine for real time video compression. The CAVLC (Context-based Adaptive Variable Length Coding) is a lossless compression method in H.264/AVC and it has high compression efficiency but has computational complexity. The reference memory size is optimized using partitioned storing method and memory reuse method which are based on partiality of memory referencing. We choose the hardware architecture which has the most suitable one in several encoder/decoder architectures for the mobile devices and improve its performance using parallel processing. The proposed architecture has been verified by ARM-interfaced emulation board using Altera Excalibur and also synthesized on Samsung 0.18 um CMOS technology. The synthesis result shows that the encoder can process about 300 CIF frames/s at 150MHz and the decoder can process about 250 CIF frames/s at 140Mhz. The hardware architectures are being used as core modules when implementing a complete H.264/AVC video encoder/decoder chip for real-time multimedia application.

• Proceedings of the Korea Society for Industrial Systems Conference
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• 2003.05a
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• pp.8-13
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• 2003

Historically, IP-based internets have been able to provide a simple best-effort delivery service to all applications they carry. Best effort treats all packets equally, with no service level, packet loss, and delay. But the needs of users have changed. The want to use the new real-time, multimedia, and multicasting applications. Thus, there is a strong need to be able to support a variety of traffic with a variety of quality-of-service requirements. The DiffServ architecture, proposed by the Internet Engineering Task Force(IETF), has become the most viable solution for provising QoS over IP networks. The DiffServ architecture does not specify any handling method between AF out-profile packets and BE packets. This paper propose a mechanism for supporting inter class fairness in the DiffServ architecture. Ⅰ proposed a modified Weighted Round Robin method to protect the BE traffic from AF out-profile packets in the core routers. The proposed technique is evaluated through simulation. Simulation results indicate that the proposed method provides better protection not only for BE packets from AF out-profile packets, but also for the AF in-profile packets in congested networks.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.13 no.4
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• pp.29-37
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• 2013

Multiplayer games typically organized based on a client-server(CS) or peer-to-peer(PP) architecture. The CS architecture is not scalable with the number of players due to a large bandwidth requirement at the server. The PP architecture, on the other hand, introduces significant overhead for the players, as each player needs to check the consistency between its local state and the state of all other players. We then propose a method that combines the merits of CS and PP. In this method, players exchange updates with lower priority in a peer-to-peer manner but communicate directly with a central server for the other updates. As a result, the proposed method has a lower network bandwidth requirement than the server of a CS architecture and the server bandwidth bottleneck is removed. For another important issue about multiplayer games, this method always maintains state consistency among players correctly. The performance of this method is evaluated through extensive simulation experiments and analysis.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.47 no.6
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• pp.49-57
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• 2010

In the near future IPTV services will be emerged the various types through Internet, but IMS based IPTV service is one of the very attractive IPTV services. This paper describes the interconnecting architectures of Web based IPTV contents provider to IMS(IP Multimedia System) network and describes the three difference architectures as method to find its IP address. One is the architecture using DNS or HSS to find IP address of Web based IPTV contents provider and connecting gateway function to I-CSCF in IMS. The other is the architecture connecting gateway AS to ISC interface of S-CSCF in IMS. This paper describes the characteristics of traffic generating due to interconnect the Web contents provider, and the traffic model of each architectures. The proposed each architecture is emulated the session establishment delay characteristics in CoD service of IPTV by the simulation. This paper shows that the architecture connecting gateway AS to ISC interface of S-CSCF is the excellent method compare to other two methods in view of the session establishment delay.