• Title/Summary/Keyword: Multilevel PWM inverter

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Half and Full-Bridge Cell based Stand-Alone Photovoltaic Multi-Level Inverter (하프ㆍ풀-브리지 셀을 이용한 독립형 태양광 멀티레벨 인버터)

  • Kang Feel-Soon;Oh Seok-Kyu;Park Sung-Jun;Kim Jang-Mok;Kim Cheul-U
    • The Transactions of the Korean Institute of Power Electronics
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    • v.9 no.5
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    • pp.438-447
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    • 2004
  • A new multilevel PWM inverter using a half-bridge and full-bridge cells is proposed for the use of stand-alone photovoltaic inverters. The configuration of the proposed multilevel PWM inverter is based on a prior 11-level shaped PWM inverter. Among three full-bridge cells employed in the prior inverter, one cell is substituted by a half-bridge cell. Owing to this simple alteration, the proposed inverter has three promising merits. First it increases the number of output voltage levels resulted in high quality output voltages. Second, it reduces two power switching devices by means of employing a half-bridge cell. Third, it reduces power imposed on a transformer connected with the half-bridge unit. That is to say, most power is transferred to loads via cascaded transformers connected with low switching inverters, which are used to synthesize the fundamental output voltage levels whereas the output of a transformer linked to a high switching inverter is used to improve the final output voltage waves; thus, it is desirable in the point of the improvement of the system efficiency. By comparing to the prior 11-level PWM inverter, it assesses the performance of the proposed inverter as a stand-alone photovoltaic inverter. The validity of the proposed inverter is verified by computer-aided simulations and experimental results.

Efficient Hybrid Carrier Based Space Vector Modulation for a Cascaded Multilevel Inverter

  • Govindaraju, C.;Baskaran, K.
    • Journal of Power Electronics
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    • v.10 no.3
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    • pp.277-284
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    • 2010
  • This paper presents a novel hybrid carrier based space vector modulation for cascaded multilevel inverters. The proposed technique inherits the properties of carrier based space vector modulation and the fundamental frequency modulation strategy. The main characteristic of this modulation are the reduction of power loss, and improved harmonic performance. The carrier based space vector modulation algorithm is implemented with a TMS320F2407 digital signal processor. A Xilinx Complex Programmable Logic Device is used to develop the hybrid PWM control algorithm and it is integrated with a digital signal processor for hybrid carrier based space vector PWM generation. The inverter offers less weighted total harmonic distortion and it operates with equal electrostatic and electromagnetic stress among the power devices. The feasibility of the proposed technique is verified by spectral analysis, simulation, and experimental results.

New Three-Phase Multilevel Inverter with Shared Power Switches

  • Ping, Hew Wooi;Rahim, Nasrudin Abd.;Jamaludin, Jafferi
    • Journal of Power Electronics
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    • v.13 no.5
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    • pp.787-797
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    • 2013
  • Despite the advantages offered by multilevel inverters, one of the main drawbacks that prevents their widespread use is their circuit complexity as the number of power switches employed is usually high. This paper presents a new multilevel inverter topology with a considerable reduction in the number of power switches used through the switch-sharing approach. The fact that the proposed inverter applies two bidirectional power switches for sharing among the three phases does not prevent it from producing seven levels in the line-to-line output voltage waveforms. A modified scheme of space vector modulation via the application of virtual voltage vectors is developed to generate the PWM signals of the power switches. The performance of the proposed inverter is investigated through MATLAB/SIMULINK simulations and is practically tested using a laboratory prototype with a DSP-based modulator. The results demonstrate the satisfactory performance of the inverter and verify the effectiveness of the modulation method.

Reconfigurable Selective Harmonic Elimination Technique for Wide Range Operations in Asymmetric Cascaded Multilevel Inverter

  • Kavitha, R;Rani, Thottungal
    • Journal of Power Electronics
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    • v.18 no.4
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    • pp.1037-1050
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    • 2018
  • This paper presents a novel reconfigurable selective harmonic elimination technique to control harmonics over a wide range of Modulation Indexes (MI) in Multi-Level Inverter (MLI). In the proposed method, the region of the MI is divided into various sectors and expressions are formulated with different switching patterns for each of the sectors. A memetic BBO-MAS (Biogeography Based Optimization - Mesh Adaptive direct Search) optimization algorithm is proposed for solving the Selective Harmonic Elimination - Pulse Width Modulation (SHE-PWM) technique. An experimental prototype is developed using a Field Programmable Gate Array (FPGA) and their FFT spectrums are analyzed over a wide range of MI using a fluke power logger. Simulation and experimental results have validated the performance of the proposed optimization algorithms and the reconfigurable SHE-PWM technique. Further, the sensitivity of the harmonics has been analyzed considering non-integer variations in the magnitude of the input DC sources.

Performance Analysis of a Novel Reduced Switch Cascaded Multilevel Inverter

  • Nagarajan, R.;Saravanan, M.
    • Journal of Power Electronics
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    • v.14 no.1
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    • pp.48-60
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    • 2014
  • Multilevel inverters have been widely used for high-voltage and high-power applications. Their performance is greatly superior to that of conventional two-level inverters due to their reduced total harmonic distortion (THD), lower switch ratings, lower electromagnetic interference, and higher dc link voltages. However, they have some disadvantages such as an increased number of components, a complex pulse width modulation control method, and a voltage-balancing problem. In this paper, a novel nine-level reduced switch cascaded multilevel inverter based on a multilevel DC link (MLDCL) inverter topology with reduced switching components is proposed to improve the multilevel inverter performance by compensating the above mentioned disadvantages. This topology requires fewer components when compared to diode clamped, flying capacitor and cascaded inverters and it requires fewer carrier signals and gate drives. Therefore, the overall cost and circuit complexity are greatly reduced. This paper presents modulation methods by a novel reference and multicarrier based PWM schemes for reduced switch cascaded multilevel inverters (RSCMLI). It also compares the performance of the proposed scheme with that of conventional cascaded multilevel inverters (CCMLI). Simulation results from MATLAB/SIMULINK are presented to verify the performance of the nine-level RSCMLI. Finally, a prototype of the nine-level RSCMLI topology is built and tested to show the performance of the inverter through experimental results.

A Unified Carrier Based PWM Method In Multilevel Inverters

  • Nho Nguyen Van;Youn Myung Joong
    • Journal of Power Electronics
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    • v.5 no.2
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    • pp.142-150
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    • 2005
  • This paper presents a systematic approach to study the carrier based pulse width modulation (PWM) techniques applied to diode-clamped and cascade multilevel inverters by using multi-modulating patterns. This method is based on the description of controllable redundant parameters in the modulating signals. A unified mathematical formulation is presented for carrier based PWM methods, which obtains outputs similar to the corresponding space vector PWM. A full and separate control of the fundamental voltage, vector redundancies and phase redundancies can be obtained in the carrier based PWM. In this paper, the proposed PWM method and corresponding algorithm for generating multi-modulating signals will be formulated and demonstrated by our simulations.

Output Filler Design for Noise Reduction of Induction Motor Drive System using H-Bridge 7-Level Inverters (H-Bridge 7레벨 인버터를 이용한 유도전동기 구동시스템의 노이즈 저감을 위한 출력 필터설계)

  • Kim, Soo-Hong;Ahn, Young-Oh;Kim, Yoon-Ho;Bang, Sang-Seok;Kim, Kwang-Seob
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.20 no.3
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    • pp.36-44
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    • 2006
  • In general, the generated harmonics and noise of the PWM inverter are affected by PWM switching method, switching frequency, dv/dt and di/dt. Since multilevel inverters are often applied to the high power system, and operates with low switching frequency, theyproduce large size of harmonic contents and noise. Thus it is necessary to install output filters in the multilevel inverter. In this paper a filter design approach for the harmonic and noise reduction the three phase induction motor driving system using H-bridge 7-level inverter system is presented. The passive filter that has low cost and simple structure and can effectively reduce harmonics and noise, is designed and applied to the three phase induction motor drive having multilevel inverter system. The designed system is implemented and verified by simulation and experiments.

Cascaded H-bridge Multilevel Inverter for High Precision and Linear Control of the Rate of Ozone Yielding

  • Park, Sung-Jun;Kang, Feel-Soon
    • Journal of international Conference on Electrical Machines and Systems
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    • v.2 no.3
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    • pp.321-329
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    • 2013
  • A multilevel inverter employing a cascade transformer is proposed for a silent-discharge-tube ozone generating system. The proposed inverter consists of four full-bridge inverters and fourteen transformers which have a series-connected secondary. It can accurately control the amplitude of the output voltage; hereby, it improves a linear characteristic of the rate of ozone yielding. The power regulation characteristics and operational principle of the proposed system are explained from a practical point of view. High precision ozone generating performance of the proposed multilevel inverter is verified by computer-aided simulations and experiment results.

Cascaded-transformer-based 3$^{n-1}$+2 level PWM Inverter (다단 변압기 기반 3$^{n-1}$+2 레벨 PWM 인버터)

  • Kang, Feel-Soon;Park, Jin-Hyun
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • v.9 no.2
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    • pp.681-684
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    • 2005
  • This paper presents a useful multilevel PWM inverter scheme based on a (3$^{n-1}$+2) level generation technique. It consists of a PWM inverter, an assembly of LEVEL inverters, and cascaded transformers. To produce high quality output voltage waves, it synthesizes a large number of output voltage levels using cascaded transformers, which have a series-connected secondary. By a suitable selection of secondary turn-ration of the transformer, the amplitude of an output voltage is appeared at the rate of an integer to an input dc source. Operational principles and analysis are illustrated in depth. The validity of the proposed system is verified through computer-aided simulations and experimental results using prototypes generation output voltages of an 11-level and a 29-level, respectively. And their results are compared with conventional counterparts.

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High Efficiency H-Bridge Multilevel Inverter System Using Bidirectional Switches (양방향 스위치를 이용한 고효율 H-Bridge 멀티레벨 인버터 시스템)

  • Lee, Hwa-Chun;Hwang, Jung-Goo;Kim, Sun-Pil;Choi, Woo-Seok;Lee, Sang-Hyeok;Park, Seong-Mi;Park, Sung-Jun
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.28 no.10
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    • pp.16-26
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    • 2014
  • This paper proposes new 13-level inverter topology and DC/DC converter buck-boost structure topology for multilevel, compounding uni-directional and bi-directional switches, and proposes high-efficient multilevel inverter system in which the proposed two PCS(Power Conditioning System) was connected in series. In proposed multilevel inverter of forming a output 13-level phase voltage by using total 18 switching parts, Then bi-directional switch has a characteristic of reducing conduction loss and controlling the reactive power effectively by separating electrically from the neutral point. DC/DC converter for supplying in dependent 3 DC voltage to the proposed multi-level inverter generates 180-degree phase shifted PWM by the symmetrically combined structure of 2 buck-boost converter and twice switching frequency efficiency can be obtained, meanwhile, the converter can step up/down the output voltage and 20% output can be generated comparing the input voltage. This proposed system is verified with the simulation and laboratory test.